US20120138665A1

US20120138665A1 - Method for fabricating optical semiconductor device

Info

Publication number: US20120138665A1
Application number: US13/311,064
Authority: US
Inventors: Yoshiki Oka
Original assignee: Sumitomo Electric Device Innovations Inc
Current assignee: Sumitomo Electric Device Innovations Inc
Priority date: 2010-12-03
Filing date: 2011-12-05
Publication date: 2012-06-07
Also published as: JP2012119637A; US20160129513A1; US20170225250A9; US10328511B2

Abstract

A method for fabricating an optical semiconductor device, including: melting a solder supplied on a carrier; mounting a semiconductor laser chip on the melted solder with a tool for holding the semiconductor laser chip; cooling the solder; releasing the tool from the semiconductor laser chip after the solder is cooled; remelting the solder after the tool is released from the semiconductor laser chip; and recooling the remelted solder.

Description

CROSS-REFERENCE TO RELATED APPLICATION

This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2010-270799, filed on Dec. 3, 2010, the entire contents of which are incorporated herein by reference.

BACKGROUND

(i) Technical Field
A certain aspect of the embodiments discussed herein is related to a method for fabricating an optical semiconductor device.
(ii) Related Art
There is known an optical semiconductor device in which a semiconductor laser and a related optical component are integrated and mounted on a carrier (see Japanese Patent Application Publication No. 2004-289011). When an optical component such as the semiconductor laser is mounted on the carrier, a solder supplied on the surface of the carrier is melted, the optical component is mounted and positioned on the solder, and then the solder is cooled and the optical component is fixed to the carrier.

SUMMARY

However, the present inventor has found a problem that the optical component warps after the solder is cooled by using the above-mentioned method.
It is an object of the present invention to provide a method for fabricating an optical semiconductor device that can restrain warpage of the optical component mounted on the carrier.
According to an aspect of the present invention, there is provided a method for fabricating an optical semiconductor device, including: melting a solder supplied on a carrier; mounting a semiconductor laser chip on the melted solder with a tool for holding the semiconductor laser chip; cooling the solder; releasing the tool from the semiconductor laser chip after the solder is cooled; remelting the solder after the tool is released from the semiconductor laser chip; and recooling the remelted solder.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of a configuration of an semiconductor laser to be mounted on an optical semiconductor device;

FIG. 2 is a flowchart of a method for fabricating the optical semiconductor device;

FIGS. 3A to 3D are cross-sectional diagrams illustrating the method for fabricating the optical semiconductor device;

FIG. 4A is a cross-sectional diagram of a tool;

FIG. 4B is a top view of the tool, as viewed from a front edge direction;

FIG. 5A is a schematic top view of the semiconductor laser;

FIG. 5B is a schematic view in the case where a layer containing an optical waveguide layer is seen through from an upper surface;

FIG. 6 is a top view illustrating the method for fabricating the optical semiconductor device;

FIG. 7A is a schematic cross-sectional diagram of the optical semiconductor device fabricated by a conventional method;

FIG. 7B is a schematic cross-sectional diagram of the optical semiconductor device fabricated by a method of the present embodiment;

FIG. 8 is a graph indicating a measurement result of a warpage amount of an optical component;

FIG. 9 is a flowchart of the method for fabricating the optical semiconductor device according to a second embodiment; and

FIG. 10 is a top view of the optical semiconductor device according to a third embodiment.

DETAILED DESCRIPTION

FIG. 1 is a schematic cross-sectional diagram of the whole configuration of a semiconductor laser 60 to be mounted on an optical semiconductor device according to a first embodiment. As illustrated in FIG. 1, the semiconductor laser 60 has a structure in which a SOA (Semiconductor Optical Amplifier) region C, a SG-DFB (Sampled Grating Distribution Feedback) region A, and a CSG-DBR (Chirped Sample Grating Distributed Reflector) region B are coupled in order. In the semiconductor laser 60, the SG-DFB region A and the CSG-DBR region B function as a wavelength selection portion selecting a wavelength, and the SOA region C functions as a light amplification portion amplifying a laser light.
The SG-DFB region A has a structure in which a lower cladding layer 2, an active layer 3, an upper cladding layer 6, a contact layer 7 and an electrode 8 are laminated on a substrate 1. The CSG-DBR region B has a structure in which the lower cladding layer 2, an optical waveguide layer 4, the upper cladding layer 6, an insulating layer 9 and heaters 10 are laminated on the substrate 1. Each of the heaters 10 has a power supply electrode 11 and a ground electrode 12. The SOA region C has a structure in which the lower cladding layer 2, an optical amplification layer 19, the upper cladding layer 6, a contact layer 20 and an electrode 21 are laminated on the substrate 1.
The substrate 1, the lower cladding layer 2 and the upper cladding layer 6 of the SG-DFB region A, the CSG-DBR region B and the SOA region C are formed as a unit respectively. The active layer 3, the optical waveguide layer 4, and the optical amplification layer 19 are formed on the same plane. An AR (Anti Reflection) layer 16 is formed on an facet of the substrate 1, the lower cladding layer 2, the active layer 3 and the upper cladding layer 6 on the side of the SOA region C. The AR layer 16 acts as a front facet of the semiconductor laser 60. A reflection layer 17 is formed on an facet of the substrate 1, the lower cladding layer 2, the optical waveguide layer 4, and the upper cladding layer 6 on the side of the CSG-DBR region B. The reflection layer 17 acts as a rear facet of the semiconductor laser 60.
A plurality of diffraction gratings (corrugations) 18 are formed in the lower cladding layer 2 of the SG-DFB region A and the CSG-DBR region B in a given interval. The SG-DFB region A and the CSG-DBR region B have a plurality of segments. The segment is a region in which one region having the diffraction grating 18 and one space portion not having the diffraction grating 18 are combined. The diffraction grating 18 is made of a material having a refractive index that is different from that of the lower cladding layer 2.
In the CSG-DBR region B, at least two of the segments have a different optical length. Thus, intensity of each of reflection peak wavelengths in the CSG-DBR region B depends on wavelength. On the other hand, each optical length of the segments in the SG-DFB region A is substantially equal to each other. Therefore, intensity of each of reflection peak wavelengths in the SG-DFB region A does not depend on wavelength. According to the combination of the SG-DFB region A and the CSG-DBR region B, a desirable wavelength is selected by overlapping the reflection peak wavelength of the SG-DFB region A with the reflection peak wavelength of the CSG-DBR region B, by using vernier effect. Thus, the semiconductor laser 60 can perform a stable laser oscillation at the desirable wavelength.
The substrate 1 is, for example, a crystal substrate made of n-type InP. The lower cladding layer 2 has n-type conductivity. The upper cladding layer 6 has p-type conductivity. The lower cladding layer 2 and the upper cladding layer 6 are, for example, made of InP. The lower cladding layer 2 and the upper cladding layer 6 confines a light in the active layer 3, the optical waveguide layer 4 and the optical amplification layer 19.
The active layer 3 is made of semiconductor having a gain. The active layer 3 may have quantum well structure in which a well layer made of Ga_0.32In_0.68As_0.92P_0.08having a thickness of 5 nm and a barrier layer made of Ga_0.22In_0.78As_0.47P_0.53having a thickness of 10 nm are laminated alternately.
The optical waveguide layer 4 is, for example, made of bulk semiconductor layer, and may be made of Ga_0.22In_0.78As_0.47P_0.53.
The contact layer 7 is, for example, made of p-type Ga_0.47In_0.53As crystal. The insulating layer 9 is a protective layer made of an insulator such as SiN or SiO₂. The heater 10 is a thin film resistor such as NiCr. Each heater 10 may extend through a plurality of the segments in the CSG-DBR region B.
The electrodes 8, the power supply electrode 11 and the ground electrode 12 are made of conductive material such as Au (gold). A reverse face electrode 15 is formed on a lower face of the substrate 1. The reverse face electrode 15 is, for example, made of Au (gold). The reverse face electrode 15 extends through the SG-DFB region A, the CSG-DBR region B and the SOA region C.
The optical amplification layer 19 is a region in which a gain is given by current injection from the electrode 21, and optical amplification thereby is performed. The optical amplification layer 19 may have quantum well structure in which a well layer made of Ga_0.35In_0.65As_0.99P_0.01having a thickness of 5 nm and a barrier layer made of Ga_0.15In_0.85As_0.32P_0.68having a thickness of 10 nm are laminated alternately, for example. The optical amplification layer 19 may employ a bulk semiconductor made of Ga_0.44In_0.56As_0.95P_0.05as another structure, for example. The contact layer 20 is, for example, made of p-type Ga_0.47In_0.53As crystal.
Next, a description will be given of an operation of the semiconductor laser 60. When a predetermined driving current is provided to the electrode 8, each heater 10 generates heat at a predetermined temperature. A TEC (Thermoelectric cooler) controls the temperature of the semiconductor laser 60 to be a predetermined temperature. Thus, the SG-DFB region A and the CSG-DBR region B select a wavelength, and the semiconductor laser 100 oscillates at the wavelength. The laser light is optically amplified and output from a front facet (on the side of the SOA region C) to outside.
FIG. 2 is a flowchart of a method for fabricating the optical semiconductor device according to the first embodiment, and FIGS. 3A to 3D are cross-sectional diagrams illustrating the method for fabricating the optical semiconductor device. At start time, a heater block 80 for heat supply is provided in a storage 70 in which an opening 72 is formed in a ceiling, as illustrated in FIG. 3A. The inside of the storage 70 is filled up with an inactive gas (for example, nitrogen gas). First, a carrier 30 is installed on the heater block 80 as illustrated in FIG. 3A (step S10). A solder 40 for fixing the semiconductor laser 60 is supplied on the carrier 30 in advance. For example, AuSn can be used as the solder 40.
Next, a tool 50 for holding a component moves the semiconductor laser 60 above the carrier 30 as illustrated in FIG. 3A (step S12). The semiconductor laser 60 is placed inside the storage 70 from the opening 72 of the storage 70. The tool 50 has an absorption mechanism at a front edge thereof, and holds a central portion of the semiconductor laser 60 by adsorbing the surface of the semiconductor laser 60 at the front edge.
FIGS. 4A and 4B illustrate detailed configuration of the tool 50. FIG. 4A is a cross-sectional diagram of the tool 50, and FIG. 4B is a top view of the tool 50, as viewed from a front edge direction. The tool 50 includes a body portion 52 and a front edge portion 54. An absorption hole 56 is provided in a central portion of the body portion 52. The tool 50 comes in contact with the semiconductor laser 60 at a tip of the front edge portion 54. The front edge portion 54 is divided into two by a groove 58 formed according to the absorption hole 56. The shape of a cross-sectional surface of each divided edge portion 54 is a substantial semicircle (see FIG. 4B. A solid line indicates an outline of the front edge portion 54, and a dotted line indicates an outline of the body portion 52 and the absorption hole 56).
FIG. 5A is a schematic top view of the semiconductor laser 60, and FIG. 5B is a schematic view in the case where a layer containing the optical waveguide layer 4 is seen through from an upper surface. As illustrated in FIG. 5B, a width (W1) of the active layer 3, the optical waveguide layer 4 and the optical amplification layer 19 are smaller than a width (W2) of the semiconductor laser 60. As illustrated in FIG. 5A, widths of the electrodes 8 on the SG-DFB region A and the electrodes 21 on the SOA region C are larger than the above-mentioned width (W1) of the optical waveguide layer 4. When the tool 50 holds the semiconductor laser 60, it is desirable that the tool 50 holds regions (e.g. dotted line regions indicated by reference numbers 90) corresponding to both sides of the active layer 3, the optical waveguide layer 4 or the optical amplification layer 19 in order to avoid adding pressure to the active layer 3, the optical waveguide layer 4 and the optical amplification layer 19 of FIG. 5B. If a tool is the tool 50 having the configuration as illustrated in FIGS. 4A and 4B, the semiconductor laser 60 can be held by aligning the positions of the groove 58, the activity layer 3, optical waveguide layer 4 and the optical amplification layer 19 so that the front edge portion 54 does not press the above-mentioned layers.
Next, the solder 40 on the carrier 30 is melted by raising the temperature of the heater block 80 and applying heat to the solder 40 through the carrier 30 (step S14). When AuSn is used as the solder 40, for example, it is desirable to set a temperature of melting to 290-310° C., and set a time period of melting to 2-6 seconds. Thereby, it is possible to restrain oxidation of the optical component including the semiconductor laser 60.
Next, the tool 50 mounts the semiconductor laser 60 on the melted solder 40, as illustrated in FIG. 3B (step S16). Then, a cold gas (e.g. nitrogen gas or dry air) is supplied with a gas supply line 74 from the opening 72 of the storage 70, the solder 40 is cooled while the cold gas is blowing, and the melted solder 40 is solidified (step S18). At this time, by pressing the solder 40 from above with the tool 50, the semiconductor laser 60 is fixed so that the position thereof is aligned.
FIG. 6 is a schematic top view illustrating a state where the semiconductor laser 60 is mounted on the solder 40. In FIG. 6, the semiconductor laser 60 is indicated by hatching, and the tool 50 is omitted. In the present embodiment, the carrier 30 is located with fixing jigs 76 and 78 arranged in a lateral direction thereof. However, the semiconductor laser 60 may be mounted without using the fixing jigs.
Next, as illustrated in FIG. 3C, the tool 50 is separated from the semiconductor laser 60 (Step S20). At this time, the semiconductor laser 60 is in a state fixed on carrier 30 by the solidified solder 40. Next, as illustrated in FIG. 3D, the solder 40 is melted again by the heater block 80 in the state where the tool 50 is separated from the semiconductor laser 60 (step S22). It is desirable to set a temperature of remelting to 310-320° C., and set a time period of remelting to 3-6 seconds. Thus, the reason why the setting temperature of the remelting is set higher than that of the first melting is that AuSn of the solder 40 and Au of metal of a chip backside melt, a rate of Au increases, and hence the temperature needed for the remelting rises. However, when the temperatures of the first melting and the remelting are similarly set to 310-320° C., it is desirable to set the time period of the first melting to 3 seconds or less. Preferably, it is desirable to set the time period of the first melting to 2-3 seconds.
When the solder 40 melts, the carrier 30 on which the semiconductor laser 60 is mounted is taken out from the storage 70, and the solder 40 is again solidified by natural cooling, for example, leaving the carrier 30 on a heat sink (radiator). As another method of the natural cooling, heating of the heater block 80 may be stopped (step S24). In the present embodiment, the natural cooling is used as a recooling method. However, when cool time is shortened, the cooling may be performed by nitrogen gas as is the case with the first cooling. In addition, the first embodiment explains an example in which AuSn is used as the material of the solder 40. However, even when the material of the solder 40 is different material e.g. AuGe, the temperature of the remelting is higher than that of the first melting. Therefore, the setting temperature of the remelting of the heater block 80 is set higher than that of the first melting, so that the remelting can be performed easily.
In the method for fabricating the optical semiconductor device, the semiconductor laser 60 is mounted on the melted solder 40, cooled once, and hence the melted solder 40 is solidified. Moreover, the solidified solder 40 is remelted and recooled, and hence the melted solder 40 is resolidified. At the time of the first cooling, the semiconductor laser 60 is pressed against the carrier 30 with the tool 50. Therefore, the pressure concentrates in a central portion of solder 40, and distortion occurs in the solder 40. However, at the time of the recooling, the tool 50 is separated from the semiconductor laser 60. Therefore, the pressure applied from the semiconductor laser 60 to the solder 40 becomes uniform, and the distortion of the form of the solder 40 is eliminated. Then, the recooling is performed in the state where the distortion of the solder 40 is eliminated, so that the solder 40 is solidified without the distortion. As a result, it is possible to restrain warpage of the semiconductor laser 60 after cooling.
FIGS. 7A and 7B are schematic cross-sectional diagrams illustrating the above-mentioned effects. FIG. 7A illustrates the optical semiconductor device fabricated by a conventional method. FIG. 7B illustrates the optical semiconductor device fabricated by the method of the present embodiment. Conventionally, since correct positioning on the carrier was required to fix the optical device, the optical device was fixed with keeping the tool pressing so that the position of the optical device may align. However, as illustrated in FIG. 7A, the semiconductor laser 60 has a large size, compared to the tool. Therefore, when the solder 40 is cooled in the state where the central portion of the semiconductor laser 60 is pressed with the tool 50 as is the case with the conventional method, distribution of the solder 40 becomes uneven by the pressure of the tool 50, the distortion occurs in the solder 40. As a result, the semiconductor laser 60 mounted on the solder 40 also warps and is solidified. In addition, since the semiconductor laser 60 is formed in a rectangular parallelepiped, the distribution of the solder 40 becomes more uneven, the distortion also occurs in the solder 40, and the semiconductor laser 60 mounted on the solder 40 also further warps.
On the contrary, in the present embodiment, since the tool 50 is separated from the semiconductor laser 60 in the state where the solder 40 is melted, as illustrated in FIG. 7B, the distortion of the solder 40 is restrained, and hence the warpage of the semiconductor laser 60 is also restrained. In the present embodiment, the cooling is performed in the state where the positioning is performed once, the melted solder 40 is solidified, remelted and then recooled, and hence the melted solder 40 is resolidified. As a result, the influence of a positional deviation is also small.
If the warpage of the semiconductor laser 60 is large as in the conventional example, a characteristic thereof worsens. This is because, when the semiconductor laser 60 warps, an optical path (the activity layer 3, the optical waveguide layer 4, and optical amplification layer 19) in the inside of the semiconductor laser 60 also warps, and hence a laser cannot be output according to a desirable optical path. Especially, since the semiconductor laser 60 is a tunable laser using the vernier effect, a deviation occurs in the reflection peak wavelength of the SG-DFB region A or the reflection peak wavelength of the CSG-DBR region B when the warpage occurs as in the conventional example. Therefore, deterioration occurs in a cross protection of the vernier effect, and a desirable wavelength is not selected. Thus, since the semiconductor laser 60 is the tunable laser, the warpage of the chip can be restrained and deterioration of the characteristic can be restrained by using the fabrication method of the present embodiment.
FIG. 8 is a graph indicating a measurement result of a warpage amount. A horizontal axis of the graph indicates positions in a width direction of the semiconductor laser 60, and a vertical axis of the graph indicates positions (the warpage amount of the semiconductor laser 60) in a height direction of the laser. In the present embodiment, the semiconductor laser 60 of 3500 μm in length, 500 μm in width, and 100 μm in height is used. The surface of the solder 40 before the melting is located in the vicinity of a scale of 116 μm in the vertical axis. A dotted line graph indicates the measurement result of the warpage amount in the conventional example, and a solid line indicates the measurement result thereof in the present embodiment, respectively. It is known that, in the conventional example, the graph greatly dents at the central portion of the semiconductor laser 60, as illustrated in FIG. 8, and the warpage of the solder 40 and the semiconductor laser 60 is large. On the contrary, it is known that the warpage amount of the central portion is greatly small in the present embodiment, compared to the conventional example, and a boundary face of the solder 40 and the semiconductor laser 60 is wholly uniform. Moreover, in the present embodiment, the same effect can be obtained even when the semiconductor laser 60 of 3000 μm in length, 500 μm in width, and 100 μm in height is used.

Second Embodiment

A second embodiment is an example when the remelting and the recooling of the solder are not performed.
FIG. 9 is a flowchart of the method for fabricating the optical semiconductor device according to the second embodiment. Since the steps S30 to S36 are the same as the steps S10 to S16 of FIG. 2, description thereof is not omitted. In the second embodiment, the tool 50 is separated from the semiconductor laser 60 before the first melting of the solder 40 is performed (step S38). Thereby, the semiconductor laser 60 is placed on the melted solder 40 (this is the same as FIG. 3D). Then, the solder 40 is cooled in the state where the tool 50 is separated from the semiconductor laser 60, and the melted solder 40 is solidified (step S40). The solder 40 may be cooled by the natural cooling, or the nitrogen gas to shorten the cool time.
According to the method for fabricating the optical semiconductor device of the second embodiment, the tool 50 is separated from the semiconductor laser 60 at the time of the cooling of the solder 40 as is the case with the first embodiment, and hence the warpage of the semiconductor laser 60 after the cooling can be restrained. Since the remelting and the recooling are not performed, the number of steps corresponding to the remelting and the recooling can be reduced, compared to the first embodiment. However, according to the method of the first embodiment, since the semiconductor laser 60 is pressed with the tool 50 at the time of the first cooling, the positioning of the semiconductor laser 60 can be performed more accurately.

Third Embodiment

A third embodiment is an example in which a solder accumulation portion is provided on the surface of the carrier.
FIG. 10 is a top view of the optical semiconductor device according to a third embodiment, and illustrates a state where the semiconductor laser 60 is mounted on the carrier 30. In FIG. 10, a detailed pattern on the semiconductor laser 60 is omitted, and the solder 40 is indicated by hatching. As illustrated in FIG. 10, a solder accumulation portion 32 for accumulating a redundant solder is provided at the periphery of a region on which the semiconductor laser 60 is mounted. The solder accumulation portion 32 extends in a direction intersecting a longitudinal direction of a mounted region of the semiconductor laser 60 from the central portion of the mounted region of the semiconductor laser 60.
In the optical semiconductor device according to the third embodiment, the semiconductor laser 60 is mounted on the carrier 30 by the same steps as the first or second embodiment. At this time, in the steps where the solder 40 is melted, cooled and then solidified, the solder 40 is supplied from the solder accumulation portion 32 to a region that runs short of the solder 40 between the semiconductor laser 60 and the carrier 30. On the contrary, the solder 40 is discharged from a region where the solder 40 remains, to the solder accumulation portion 32. Thus, the solder accumulation portion 32 is provided, so that a deviation amount of the solder 40 between the semiconductor laser 60 and the carrier 30 can be reduced, and distortion of the solder 40 at the time of the cooling can be restrained. As a result, the warpage of the semiconductor laser 60 can be further restrained, compared to the first and the second embodiments.
The solder accumulation portion 32 is provided at the periphery of the mounted region of the semiconductor laser 60, but the position of the solder accumulation portion 32 is not limited to the position as indicated by the present embodiment. In the method for fabricating the optical semiconductor device according to the first and the second embodiments, the central portion of the semiconductor laser 60 in the longitudinal direction is hold with the tool 50. Therefore, it is preferable that the solder accumulation portion 32 is formed at a midway position in the longitudinal direction of the mounted region of the semiconductor laser 60. It is more preferable that the solder accumulation portion 32 is formed in the vicinity of the central portion of the semiconductor laser 60 to which the pressure from the tool 50 is applied.
In the first to third embodiments, the example in which the semiconductor laser 60 is mounted on the carrier 30 is explained, but the present invention can be applied to also the case where a laser other than the semiconductor laser 60 or an optical component other than a laser (e.g. a light emitting element, a light receiving element, an etalon, an isolator, or the like) is mounted on the carrier with the solder. In addition, a device other than the tool 50 illustrated in the first and the second embodiments may be used as a method for holding the optical component. Moreover, a material other than AuSn (e.g. AuGe, AgSn, or the like) may be used as the material of the solder.
The present invention is not limited to the specifically described embodiments and variations but other embodiments and variations may be made without departing from the scope of the claimed invention.

Claims

1. A method for fabricating an optical semiconductor device, comprising:

melting a solder supplied on a carrier;

mounting a semiconductor laser chip on the melted solder with a tool for holding the semiconductor laser chip;

cooling the solder;

releasing the tool from the semiconductor laser chip after the solder is cooled;

remelting the solder after the tool is released from the semiconductor laser chip; and

recooling the remelted solder.

2. The method for fabricating the optical semiconductor device according to claim 1, wherein the cooling is natural cooling.

3. The method for fabricating the optical semiconductor device according to claim 1, wherein the cooling is cooling by blowing gas.

4. The method for fabricating the optical semiconductor device according to claim 1, wherein the carrier includes a mounted region on which the semiconductor laser chip is mounted, and a solder accumulation portion that extends in a direction intersecting a longitudinal direction of the mounted region.

5. The method for fabricating the optical semiconductor device according to claim 1, wherein a length of the longitudinal direction of the semiconductor laser chip is equal to or more than 6 times of a width thereof.

6. The method for fabricating the optical semiconductor device according to claim 1, wherein a long side of the semiconductor laser chip is equal to or more than 3.0 mm.

7. The method for fabricating the optical semiconductor device according to claim 1, wherein a metal of a backside of the semiconductor laser chip is Au, and a temperature of the remelting is higher than a temperature of the mounting of the semiconductor laser.

8. The method for fabricating the optical semiconductor device according to claim 1, wherein the solder is AuSn, a melting temperature and a remelting temperature are 310-320° C., and a interval between the mounting of the semiconductor laser chip and startup of the cooling is equal to or less than 3 seconds.

9. A method for fabricating an optical semiconductor device, comprising:

melting a solder supplied on a carrier;

mounting a semiconductor laser chip on the melted solder with a tool for holding the semiconductor laser chip, a length of the longitudinal direction of the semiconductor laser chip being equal to or more than 6 times of a width thereof;

releasing the tool from the semiconductor laser chip in a state where the solder is melted; and

cooling the solder in a state where the tool is released from the semiconductor laser chip.

10. The method for fabricating the optical semiconductor device according to claim 9, wherein a long side of the semiconductor laser chip is equal to or more than 3.0 mm.

11. The method for fabricating the optical semiconductor device according to claim 1, wherein the semiconductor laser chip is a tunable laser.

12. The method for fabricating the optical semiconductor device according to claim 1, wherein the tool is in contact with a surface of a region excluding a stripe-like active region in the semiconductor laser chip, and holds the semiconductor laser chip.

13. The method for fabricating the optical semiconductor device according to claim 1, wherein the melting is carried out by placing the carrier on a heater block.

14. The method for fabricating the optical semiconductor device according to claim 1, wherein the solder is AuSn, AuGe or AgSn.

15. The method for fabricating the optical semiconductor device according to claim 2, wherein the natural cooling is carried out by placing the carrier on a heat sink.

16. The method for fabricating the optical semiconductor device according to claim 3, wherein the gas is nitrogen gas.

17. The method for fabricating the optical semiconductor device according to claim 4, wherein the solder accumulation portion is a center portion in the direction intersecting the longitudinal direction of the mounted region.

18. The method for fabricating the optical semiconductor device according to claim 4, wherein the solder accumulation portion is rectangle.

19. The method for fabricating the optical semiconductor device according to claim 9, wherein the solder is AuSn, AuGe or AgSn.

20. The method for fabricating the optical semiconductor device according to claim 9, wherein the melting is carried out by placing the carrier on a heater block.