US20110214815A1

US20110214815A1 - Plasma processing apparatus and method

Info

Publication number: US20110214815A1
Application number: US13/113,330
Authority: US
Inventors: Akira Koshiishi; Masaru Sugimoto; Kunihiko Hinata; Noriyuki Kobayashi; Chishio Koshimizu; Ryuji Ohtani; Kazuo Kibi; Masashi Saito; Naoki Matsumoto; Manabu Iwata; Daisuke Yano; Yohei Yamazawa; Hidetoshi Hanaoka; Toshihiro Hayami; Hiroki Yamazaki; Manabu Sato
Original assignee: Individual
Current assignee: Individual
Priority date: 2004-06-21
Filing date: 2011-05-23
Publication date: 2011-09-08
Also published as: US7951262B2; US20170032936A1; US20060037703A1; US10529539B2

Abstract

An apparatus includes an upper electrode and a lower electrode for supporting a wafer disposed opposite each other within a process chamber. A first RF power supply configured to apply a first RF power having a relatively higher frequency, and a second RF power supply configured to apply a second RF power having a relatively lower frequency is connected to the lower electrode. A variable DC power supply is connected to the upper electrode. A process gas is supplied into the process chamber to generate plasma of the process gas so as to perform plasma etching.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation application of U.S. application Ser. No. 11/156,561, filed Jun. 21, 2005, which claims the benefit of U.S. Provisional Applications No. 60/589,831, filed Jul. 22, 2004; 60/650,957, filed Feb. 9, 2005; and 60/662,344, filed Mar. 17, 2005.
This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 2004-183093, filed Jun. 21, 2004; No. 2005-013912, filed Jan. 21, 2005; and No. 2005-045095, filed Feb. 22, 2005, the entire contents of all of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relate to a plasma processing apparatus, plasma processing method, and computer readable storage medium, used for performing a plasma process on a target substrate, such as a semiconductor substrate.
2. Description of the Related Art
For example, in manufacturing semiconductor devices, plasma etching processes, which utilize plasma to etch a layer through a resist mask, are often used for forming a predetermined pattern on a predetermined layer disposed on a target substrate or semiconductor wafer.
There are various plasma etching apparatuses for performing such plasma etching, but parallel-plate plasma processing apparatuses of the capacitive coupling type are the ones in mainstream use.
In general, a parallel-plate plasma etching apparatus of the capacitive coupling type includes a chamber with parallel-plate electrodes (upper and lower electrodes) disposed therein. While a process gas is supplied into the chamber, an RF (radio frequency) is applied to one of the electrodes to form an electric field between the electrodes. The process gas is turned into plasma by the RF electric field, thereby performing plasma etching on a predetermined layer disposed on a semiconductor wafer.
More specifically, there is known a plasma etching apparatus in which an RF for plasma generation is applied to the upper electrode to generate plasma, while an RF for ion attraction is applied to the lower electrode (for example, Jpn. Pat. Appln. KOKAI Publication No. 2000-173993 (Patent publication 1)). This plasma etching apparatus can form a suitable plasma state and realize an etching process with high selectivity and high reproducibility.
In recent years, owing to the demands of increased micro-fabrication, the thickness of photo-resist films used as masks is reduced, while the type of photo-resist is shifted from KrF photo-resist (i.e., a photo-resist to be exposed with a laser beam emitted from KrF gas) to ArF photo-resist (i.e., a photo-resist to be exposed with a shorter-wavelength laser beam emitted from ArF gas), which allows formation of pattern opening portions of about 0.13 μm or less.
However, since the ArF photo-resist has poor plasma resistance properties, its surface becomes rough during etching, which is scarcely caused in the KrF resist. Accordingly, problems arise in that vertical lines (striation) are formed on the inner wall of opening portions, or opening portions are expanded (increase in CD). These problems prevent, along with a small thickness of the photo-resist, etching holes from being formed with good etching selectivity.
On the other hand, in etching apparatuses of this kind, if the power level of an RF power for plasma generation applied to the upper electrode is too low, deposited substances (deposition) may remain on the upper electrode after etching, thereby varying process characteristics or producing particles. By contrast, if the power level is too high, the electrode may be etched, thereby bringing about process characteristics different from those obtained by a lower power level. The suitable range of power from the RF power supply depends on the process, and the process should not be fluctuated by the power. Further, in serial etching processes, deposition sticking to the chamber wall causes a memory effect in that a previous process leaves some effect that affects a subsequent process. Accordingly, it is preferable to reduce deposition on the chamber wall.
Furthermore, in parallel-plate etching apparatuses of the capacitive coupling type, where the pressure in the chamber is high and the etching gas in use is a negative gas (for example, CxFy or O₂), the plasma density becomes low at the chamber central portion, which makes it difficult to control the plasma density.

BRIEF SUMMARY OF THE INVENTION

The present invention has been made in consideration of the problems described above, and has an object to provide a plasma processing apparatus and plasma processing method, which can realize high selectivity etching while maintaining the plasma resistance properties of a resist layer or organic mask layer at a high level, or can effectively prevent deposition on an electrode, or can realize high rate etching, or can realize uniform etching on a target substrate.
According to a first aspect of the present invention, there is provided a plasma processing apparatus comprising: a process chamber configured to accommodate a target substrate and to be vacuum-exhausted; a first electrode and a second electrode disposed opposite each other within the process chamber, the second electrode being configured to support the target substrate; a first RF power application unit configured to apply a first RF power having a relatively higher frequency to the second electrode; a second RF power application unit configured to apply a second RF power having a relatively lower frequency to the second electrode; a DC power supply configured to apply a DC voltage to the first electrode; and a process gas supply unit configured to supply a process gas into the process chamber.
In this apparatus, it may be adopted that the DC power supply is configured such that any one of application voltage, application current, and application power to the first electrode is variable. The apparatus may further comprise a control unit configured to control any one of application voltage, application current, and application power from the DC power supply to the first electrode. In this case, it may be adopted that the control unit is configured to control whether the DC voltage is to be applied or not, from the DC power supply to the first electrode. The apparatus may further comprise a detector configured to detect a generated plasma state, wherein the control unit controls any one of application voltage, application current, and application power from the DC power supply to the first electrode, based on information from the detector.
In the plasma processing apparatus according to the first aspect of the present invention, typically, the first electrode is an upper electrode, and the second electrode is a lower electrode. In this case, the first RF power applied to the second electrode preferably has a frequency of 27 MHz or more, and more preferably has a frequency of 40 MHz or more. It is preferable that the second RF power applied to the second electrode has a frequency of 13.56 MHz or less.
In the plasma processing apparatus according to the first aspect of the present invention, it is preferable that the DC power supply is configured to apply a voltage within a range of −2,000 to +1,000V. It may be adopted that a surface of the first electrode facing the second electrode is made of a silicon-containing substance.
In the plasma processing apparatus according to the first aspect of the present invention, it is preferable that the first electrode is in a floating state relative to a ground potential in a sense of DC. In this case, it is preferable that the apparatus further comprises a changeover device configured to change over the first electrode between the floating state and a grounded state, wherein, based on a command from an overall control unit, the changeover device sets the first electrode in the floating state relative to a ground potential when the DC voltage is applied to the first electrode, and the changeover device sets the first electrode in the floating state or the grounded state relative to the ground potential when the DC voltage is not applied to the first electrode.
In the plasma processing apparatus according to the first aspect of the present invention, it may be adopted that a conductive member regularly grounded is disposed within the process chamber to release through plasma a current caused by the DC voltage applied from the DC power supply to the first electrode. In this case, it may be adopted that the first electrode is an upper electrode, the second electrode is a lower electrode, and the conductive member is disposed around the second electrode, or the conductive member is disposed near the first electrode. It may be adopted that the conductive member is disposed to form a ring shape around the first electrode. It may be adopted that the grounded conductive member has a recess to prevent flying substances from being deposited during a plasma process.
In the structure described above, it may be adopted that a cover plate is disposed to partly cover the conductive member, and the cover plate is moved relative to the conductive member by a driving mechanism to change a portion of the conductive member to be exposed to plasma. It may be adopted that the conductive member is columnar and partly exposed to plasma, and the conductive member is rotated about a center thereof by a driving mechanism to change a portion of the conductive member to be exposed to plasma. It may be adopted that a cover film having a stepped shape and made of a material to be etched by plasma is disposed to partly cover the conductive member, and the cover film is configured to be etched to change a portion of the conductive member to be exposed to plasma.
In the plasma processing apparatus according to the first aspect of the present invention, it may be adopted that a conductive member to be grounded based on a command from an overall control unit is disposed within the process chamber to release through plasma a current caused by the DC voltage applied from the DC power supply to the first electrode. In this case, it may be adopted that the first electrode is an upper electrode, the second electrode is a lower electrode, and the conductive member is disposed around the second electrode, or the conductive member is disposed near the first electrode. It may be adopted that the conductive member is disposed to form a ring shape around the first electrode. It may be adopted that the grounded conductive member has a recess to prevent flying substances from being deposited during a plasma process. It may be adopted that the conductive member is grounded during plasma etching.
It may be adopted that the conductive member is configured to be supplied with a DC voltage or AC voltage, and the DC voltage or AC voltage is applied based on a command from an overall control unit to sputter or etch a surface of the conductive member. In this case, it is preferable that the DC voltage or AC voltage is applied to the conductive member during cleaning. The apparatus may further comprise a switching mechanism configured to switch connection of the conductive member between the DC power supply and a ground line, wherein, when the conductive member is connected to the DC power supply by the switching mechanism, the DC voltage or AC voltage is applied from the DC power supply to the conductive member to sputter or etch a surface thereof. In this structure, it is preferable that the conductive member is configured to be supplied with a negative DC voltage. Where a negative DC voltage is applicable, it is preferable that a grounded conductive auxiliary member is disposed within the process chamber to release a DC electron current flowing into the process chamber when the negative DC voltage is applied to the conductive member. In this case, it may be adopted that the first electrode is an upper electrode, the second electrode is a lower electrode, the conductive member is disposed near the first electrode, and the conductive auxiliary member is disposed around the second electrode.
In the plasma processing apparatus according to the first aspect of the present invention, the apparatus may further comprise a conductive member disposed within the process chamber and configured to take on either one of a first state and a second state based on a command from an overall control unit, the first state being arranged to ground the conductive member to release through plasma a DC current applied from the DC power supply to the first electrode, and the second state being arranged to apply a DC voltage from the DC power supply to the conductive member to sputter or etch a surface thereof; and a connection switching mechanism disposed to switch between first connection and second connection to form the first state and the second state, respectively, the first connection being arranged to connect a negative terminal of the DC power supply to the first electrode and to connect the conductive member to a ground line, and the second connection being arranged to connect a positive terminal of the DC power supply to the first electrode and to connect the negative terminal of the DC power supply to the conductive member. In this case, it is preferable that the first state is formed during plasma etching, and the second state is formed during cleaning of the conductive member.
According to a second aspect of the present invention, there is provided a plasma processing method using a process chamber with a first electrode and a second electrode disposed opposite each other therein, the second electrode being configured to support a target substrate, the method comprising supplying a process gas into the process chamber, while applying a first RF power having a relatively higher frequency and a second RF power having a relatively lower frequency to the second electrode, to generate plasma of the process gas, thereby performing a plasma process on a target substrate supported by the second electrode, wherein the method comprises: applying a DC voltage to the first electrode; and performing the plasma process on the target substrate while the applying the DC voltage to the first electrode.
In this method, it may be adopted that any one of application voltage, application current, and application power applied to the first electrode is variable. The method may further comprise controlling any one of application voltage, application current, and application power applied to the first electrode. The method may further comprise controlling whether the DC voltage is to be applied or not to the first electrode. The method may further comprise detecting a generated plasma state, to control any one of application voltage, application current, and application power to the first electrode, based on detected information.
In the plasma processing method according to the second aspect of the present invention, it is preferable that the first electrode is in a floating state relative to a ground potential in a sense of DC. In this case, it is preferable that the first electrode is changeable between the floating state and a grounded state, and wherein, based on a command from an overall control unit, the first electrode is set in the floating state relative to a ground potential when the DC voltage is applied to the first electrode, and the first electrode is set in the floating state or the grounded state relative to the ground potential when the DC voltage is not applied to the first electrode.
In the plasma processing method according to the second aspect of the present invention, it is preferable that a conductive member regularly grounded is disposed within the process chamber to release through plasma a current caused by the DC voltage applied to the first electrode. Alternatively, it is preferable that a conductive member to be grounded based on a command from an overall control unit is disposed within the process chamber to release through plasma a current caused by the DC voltage applied to the first electrode.
In the arrangements described above, it may be adopted that the conductive member is grounded during plasma etching. It may be adopted that the conductive member is configured to be supplied with a DC voltage or AC voltage, and the DC voltage or AC voltage is applied based on a command from an overall control unit to sputter or etch a surface of the conductive member. It may be adopted that the DC voltage or AC voltage is applied to the conductive member during cleaning. It may be adopted that a switching mechanism is further disposed to switch connection of the conductive member between a DC power supply configured to apply a DC voltage and a ground line, and wherein, when the conductive member is connected to the DC power supply by the switching mechanism, the DC voltage or AC voltage is applied from the DC power supply to the conductive member to sputter or etch a surface thereof. It may be adopted that the conductive member is configured to be supplied with a negative DC voltage. It may be adopted that a grounded conductive auxiliary member is disposed within the process chamber to release a DC electron current flowing into the process chamber when the negative DC voltage is applied to the conductive member.
In the plasma processing method according to the second aspect of the present invention, it may be adopted that the method comprises etching an insulating film on the target substrate supported by the second electrode, wherein the process gas comprises any one of a combination of C₅F₈, Ar, and N₂, a combination of C₄F₈, Ar, and N₂, a combination of C₄F₈, Ar, N₂, and O₂, and a combination of C₄F₈, Ar, N₂, and CO to increase selectivity of the insulating film relative to an underlying film. It may be adopted that the method comprises etching an insulating film on the target substrate supported by the second electrode, wherein the process gas comprises CF₄or a combination of CF₄, Ar or N₂, and H2 to increase selectivity of the insulating film relative to a mask. It may be adopted that the method comprises etching an organic anti-reflection film on an insulating film on the target substrate supported by the second electrode, wherein the process gas comprises any one of CF₄, a combination of CF₄and C₃F₈, a combination of CF₄and C₄F₈, and a combination of CF₄and C₄F₆. It may be adopted that the method comprises etching an insulating film on the target substrate supported by the second electrode, wherein the process gas comprises any one of a combination of C₄F₆, CF₄, Ar, and O₂, a combination of C₄F₆, C₃F₈, Ar, and O₂, a combination of C₄F₆, C₄F₈, Ar, and O₂, a combination of C₄F₆, C2F6, Ar, and O₂, a combination of C₄F₈, Ar, and O₂, and a combination of C₄F₈, Ar, and O₂to increase an etching rate of the insulating film.
According to a third aspect of the present invention, there is provided a computer storage medium storing a control program for execution on a computer, wherein the control program, when executed, controls a plasma processing apparatus to perform the plasma processing method according to the second aspect.
According to the present invention, the first RF power application unit configured to apply a first RF power having a relatively higher frequency, and the second RF power application unit configured to apply a second RF power having a relatively lower frequency is connected to the second electrode for supporting a target substrate, and the DC power supply configured to apply a DC voltage is connected to the first electrode. With this arrangement, when the RF powers having different frequencies are applied from first and second RF power application units to the second electrode to generate plasma of a process gas and attract ions onto the target substrate so as to perform a plasma process, the DC voltage is further applied to the first electrode. As a consequence, it is possible to exercise at least one of (1) the effect of increasing the absolute value of a self-bias voltage to the first electrode to sputter the first electrode surface, (2) the effect of expanding the plasma sheath on the first electrode side to press the plasma, (3) the effect of irradiating the target substrate with electrons generated near the first electrode, (4) the effect of controlling the plasma potential, (5) the effect of increasing the electron (plasma) density, and (6) the effect of increasing the plasma density at the central portion.
With the effect (1) described above, even if polymers derived from a process gas and a photo-resist are deposited on the surface of the first electrode, the polymers are sputtered, thereby cleaning up the surface of the first electrode. Further, an optimum quantity of polymers can be supplied onto the substrate, thereby canceling the surface roughness of the photo-resist film. Further, since the body of the electrode is sputtered, the electrode material can be supplied onto the substrate, thereby reinforcing an organic mask made of, e.g., a photo-resist film.
With the effect (2) described above, the effective residence time above the target substrate is decreased, and the plasma concentrates above the target substrate with less diffusion, thereby reducing the dissociation space. In this case, dissociation of a fluorocarbon family process gas is suppressed for an organic mask made of, e.g., a photo-resist film to be less etched.
With the effect (3) described above, the composition of a mask on the target substrate is reformed and the roughness of the photo-resist film is cancelled. Further, since the target substrate is irradiated with electrons at a high velocity, the shading effect is suppressed and micro-fabrication is thereby improved on the target substrate.
With the effect (4) described above, the plasma potential can be suitably controlled to prevent etching by-products from being deposited on members inside the process chamber, such as the electrodes, chamber wall (e.g., deposition shield), and insulating members.
With the effect (5) described above, the etching rate (etching speed) on the target substrate is improved.
With the effect (6) described above, even where the pressure inside the process chamber is high and the etching gas employed is a negative gas, the plasma density is prevented from being lower at the central portion than at the peripheral portion within the process chamber (suppressing generation of negative ions), so as to control the plasma density to be more uniform.
As a consequence, the plasma resistance property of an organic mask layer made of, e.g., a resist layer remains high, so that the etching can be performed with high selectivity. Alternatively, the electrodes can be effectively free from deposited substances. Alternatively, the etching can be performed on the target substrate at a high rate or uniformly.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate presently preferred embodiments of the invention, and together with the general description given above and the detailed description of the preferred embodiments given below, serve to explain the principles of the invention.

FIG. 1 is a sectional view schematically showing a plasma etching apparatus according to an embodiment of the present invention;

FIG. 2 is a sectional view schematically showing a plasma etching apparatus according to the embodiment of the present invention;

FIGS. 3A and 3B are views showing change in V_dcand plasma sheath length where a DC voltage is applied to the upper electrode in the plasma etching apparatus shown in FIG. 2;

FIGS. 4A to 4D are views showing change in electron density where the DC voltage applied is set at different values under HARC etching conditions in the plasma etching apparatus shown in FIG. 2;

FIGS. 5A to 5D are views showing change in electron density where the DC voltage applied is set at different values under VIA etching conditions in the plasma etching apparatus shown in FIG. 2;

FIG. 6 is a view showing electron density distributions in the wafer radial direction where the HARC etching mentioned above employs a first RF power of 3,000 W and a second RF power of 4,000 W;

FIG. 7 is a view showing electron density distributions in the wafer radial direction where a DC voltage is applied and where no DC voltage is applied, under trench etching conditions;

FIG. 8 is a view showing an electrical state of the upper electrode in the plasma etching apparatus shown in FIG. 2;

FIG. 9 is a view showing an electrical state of the upper electrode in the plasma etching apparatus shown in FIG. 2;

FIG. 10 is a view showing an electrical state of the upper electrode in the plasma etching apparatus shown in FIG. 2;

FIG. 11 is a sectional view showing a modification of the plasma etching apparatus shown in FIG. 2, provided with a detector for detecting plasma;

FIG. 12 is a view showing a waveform for suppressing abnormal electric discharge where a DC voltage is applied to the upper electrode in the plasma etching apparatus shown in FIG. 1;

FIG. 13 is a schematic view showing another layout of a GND block;

FIG. 14 is a schematic view showing another layout of the GND block;

FIGS. 15A and 15B are views showing structures for preventing deposition on the GND block;

FIG. 16 is a schematic view showing an example of a device that can remove deposition on the GND block;

FIGS. 17A and 17B are schematic views showing a state in plasma etching and a state in cleaning, respectively, of the device shown in FIG. 16;

FIG. 18 is a schematic view showing another state in plasma etching of the device shown in FIG. 16;

FIG. 19 is a schematic view showing another example of a device that can remove deposition on the GND block;

FIGS. 20A and 20B are schematic views showing a state in plasma etching and a state in cleaning, respectively, of the device shown in FIG. 19;

FIG. 21 is a schematic view showing an example of the GND block having a function to prevent it from losing the grounding performance in the sense of DC;

FIG. 22 is a schematic view showing another example of the GND block having a function to prevent it from losing the grounding performance in the sense of DC;

FIGS. 23A and 23B are schematic views each showing another example of the GND block having a function to prevent it from losing the grounding performance in the sense of DC;

FIG. 24 is a schematic view showing another example of the GND block having a function to prevent it from losing the grounding performance in the sense of DC;

FIG. 25 is a schematic view showing another example of the GND block having a function to prevent it from losing the grounding performance in the sense of DC; and

FIG. 26 is a schematic view showing another example of the GND block having a function to prevent it from losing the grounding performance in the sense of DC.

DETAILED DESCRIPTION OF THE INVENTION

Embodiments of the present invention will be described hereinafter with reference to the accompanying drawings.
FIG. 1 is a sectional view schematically showing a plasma etching apparatus according to an embodiment of the present invention.
This plasma etching apparatus is of the type that applies two RF powers with different frequencies to the lower side. Specifically, a radio frequency (RF) power with, e.g., 40 MHz for plasma generation from a first RF power supply 88 and a radio frequency (RF) with, e.g., 2 MHz for ion attraction from a second RF power supply 90 are applied to a lower electrode or susceptor 16. Further, as shown in FIG. 1, a variable DC power supply 50 is connected to an upper electrode 34 to apply a predetermined direct current (DC) voltage. With reference to FIG. 2, this plasma etching apparatus will be explained in more detail.
This plasma etching apparatus is structured as a parallel-plate plasma etching apparatus of the capacitive coupling type. The apparatus includes a cylindrical chamber (process chamber) 10, which is made of, e.g., aluminum with an anodization-processed surface. The chamber 10 is protectively grounded.
A columnar susceptor pedestal 14 is disposed on the bottom of the chamber 10 through an insulating plate 12 made of, e.g., a ceramic. A susceptor 16 made of, e.g., aluminum is disposed on the susceptor pedestal 14. The susceptor 16 is used as a lower electrode, on which a target substrate, such as a semiconductor wafer W, is placed.
The susceptor 16 is provided with an electrostatic chuck 18 on the top, for holding the semiconductor wafer W by an electrostatic attraction force. The electrostatic chuck 18 comprises an electrode 20 made of a conductive film, and a pair of insulating layers or insulating sheets sandwiching the electrode 20. The electrode 20 is electrically connected to a direct current (DC) power supply 22. The semiconductor wafer W is attracted and held on the electrostatic chuck 18 by an electrostatic attraction force, e.g., a Coulomb force, generated by a DC voltage applied from the DC power supply 22.
A conductive focus ring (correction ring) 24 made of, e.g., silicon is disposed on the top of the susceptor 16 to surround the electrostatic chuck 18 (and the semiconductor wafer W) to improve etching uniformity. A cylindrical inner wall member 26 made of, e.g., quartz is attached to the side of the susceptor 16 and susceptor pedestal 14.
The susceptor pedestal 14 is provided with a cooling medium space 28 formed therein and annularly extending therethrough. A cooling medium set at a predetermined temperature, such as cooling water, is circulated within the cooling medium space 28 from a chiller unit (not shown) through lines 30 a and 30 b. The temperature of the cooling medium is set to control the process temperature of the semiconductor wafer W placed on the susceptor 16.
Further, a heat transmission gas, such as He gas, is supplied from a heat transmission gas supply unit (not shown), through a gas supply line 32, into the interstice between the top surface of the electrostatic chuck 18 and the bottom surface of the semiconductor wafer W.
An upper electrode 34 is disposed above the lower electrode or susceptor 16 in parallel with the susceptor. The space between the electrodes 16 and 34 is used as a plasma generation space. The upper electrode 34 defines a surface facing the semiconductor wafer W placed on the lower electrode or susceptor 16, and thus this facing surface is in contact with the plasma generation space.
The upper electrode 34 is supported at the top of the chamber 10 by an insulating shield member 42. The upper electrode 34 includes an electrode plate 36 defining the facing surface opposite the susceptor 16 and having a number of gas delivery holes 37, and an electrode support 38 detachably supporting the electrode plate 36. The electrode support 38 is made of a conductive material, such as aluminum with an anodization-processed surface, and has a water-cooling structure. The electrode plate 36 is preferably made of a conductor or semiconductor having a low resistivity and thus generating less Joule heat. Further, in order to reinforce a resist film, as described later, the electrode plate 36 is preferably made of a silicon-containing substance. In light of these factors, the electrode plate 36 is preferably made of silicon or SiC. The electrode support 38 has a gas diffusion cell 40 formed therein, which is connected to the gas delivery holes 37 through a number of gas flow channels 41 extending downward.
Further, the electrode support 38 has a gas feed port 62 formed therein for feeding a process gas into the gas diffusion cell 40. The gas feed port 62 is connected to a process gas supply source 66 through a gas supply line 64. The gas supply line 64 is provided with a mass-flow controller (MFC) 68 and a switching valve 70 disposed thereon in this order from the upstream. A process gas for etching, such as a fluorocarbon gas (CxFy), e.g., C₄F₈gas, is supplied from the process gas supply source 66 through the gas supply line 64 into the gas diffusion cell 40. Then, the process gas flows through the gas flow channels 41 and is delivered from the gas delivery holes 37 into the plasma generation space, as in a shower device. Accordingly, in other words, the upper electrode 34 functions as a showerhead for supplying a process gas.
The upper electrode 34 is electrically connected to a variable DC power supply 50 through a low-pass filter (LPF) 48. The variable DC power supply 50 may be formed of a bipolar power supply. The electric feeding of the variable DC power supply 50 is set on/off by an on/off switch 52. The polarity, current, and voltage of the variable DC power supply 50, and the on/off switch 52 are controlled by a controller (control unit) 51.
The low-pass filter (LPF) 48 is configured to trap the RF from first and second RF power supplies, as described later, and is preferably formed of an LR filter or LC filter
The sidewall of the chamber 10 extends upward above the height level of the upper electrode 34 and forms a cylindrical grounded conductive body 10 a. The cylindrical grounded conductive body 10 a includes a top or ceiling wall.
The lower electrode or susceptor 16 is electrically connected to a first RF power supply 88 through a matching unit 87, and to a second RF power supply 90 through a matching unit 89. The first RF power supply 88 outputs an RF power with a frequency of 27 MHz or more, such as 40 MHz. The second RF power supply 90 outputs an RF power with a frequency of 13.56 MHz or less, such as 2 MHz.
The matching units 87 and 89 are arranged to match the load impedance with the internal (or output) impedance of the first and second RF power supplies 88 and 90, respectively. When plasma is generated within the chamber 10, the matching units 87 and 89 perform control for the load impedance and the internal impedance of the first and second RF power supplies 88 and 90 to apparently agree with each other.
An exhaust port 80 is formed at the bottom of the chamber 10, and is connected to an exhaust unit 84 through an exhaust line 82. The exhaust unit 84 includes a vacuum pump, such as a turbo molecular pump, to reduce the pressure inside the chamber 10 to a predetermined vacuum level. A transfer port 85 for a semiconductor wafer W is formed in the sidewall of the chamber 10, and is opened/closed by a gate valve 86 attached thereon. A deposition shield 11 is detachably disposed along the inner wall of the chamber 10 to prevent etching by-products (deposition) from being deposited on the wall. In other words, the deposition shield 11 constitutes a chamber wall. A deposition shield 11 is also disposed around the inner wall member 26. An exhaust plate 83 is disposed at the bottom of the chamber 10 between the deposition shield 11 on the chamber wall and the deposition shield 11 on the inner wall member 26. The deposition shield 11 and exhaust plate 83 are preferably made of an aluminum body covered with a ceramic, such as Y₂O₃.
A conductive member (GND block) 91 is disposed on a portion of the deposition shield 11 that constitutes the chamber inner wall, at a height essentially the same as the wafer W, and is connected to ground in the sense of DC. This arrangement provides the effect of preventing abnormal electric discharge, as described later.
Respective portions of the plasma etching apparatus are connected to and controlled by a control section (overall control unit) 95. The control section 95 is connected to a user interface 96 including, e.g., a keyboard and a display, wherein the keyboard is used for a process operator to input commands for operating the plasma etching apparatus, and the display is used for showing visualized images of the operational status of the plasma processing apparatus.
Further, the control section 95 is connected to a storage section 97 that stores control programs for the control section 95 to control the plasma etching apparatus so as to perform various processes, and programs or recipes for respective components of the plasma etching apparatus to perform processes in accordance with process conditions. Recipes may be stored in a hard disk or semiconductor memory, or stored in a computer readable portable storage medium, such as a CDROM or DVD, to be attached to a predetermined position in the storage section 97.
A required recipe is retrieved from the storage section 97 and executed by the control section 95 in accordance with an instruction or the like through the user interface 96. As a consequence, the plasma etching apparatus can perform a predetermined process under the control of the control section 95. It should be noted that each of the plasma processing apparatuses (plasma etching apparatuses) according to embodiments of the present invention includes such a control section 95.
When an etching process is performed in the plasma etching apparatus described above, the gate valve 86 is first opened, and a semiconductor wafer W to be etched is transferred into the chamber 10 and placed on the susceptor 16. Then, a process gas for etching is supplied from the process gas supply source 66 into the gas diffusion cell 40 at a predetermined flow rate, and then supplied into the chamber 10 through the gas flow channels 41 and gas delivery holes 37. At the same time, the interior of the chamber 10 is exhausted by the exhaust unit 84 to set the pressure inside the chamber 10 to be a predetermined value within a range of, e.g., 0.1 to 150 Pa. The process gas may be selected from various gases conventionally employed, and preferably is a gas containing a halogen element, a representative of which is a fluorocarbon gas (CxFy), such as C₄F₈gas. Further, the process gas may contain another gas, such as Ar gas or O₂gas.
While the etching gas is supplied into the chamber 10, an RF power for plasma generation is applied from the first RF power supply 88 to the lower electrode or susceptor 16 at a predetermined power level. Also, an RF for ion attraction is applied from the second RF power supply 90 to the lower electrode or susceptor 16 at a predetermined power level. On the other hand, a predetermined DC voltage is applied from the variable DC power supply 50 to upper electrode 34. Further, a DC voltage is applied from the DC power supply 22 to the electrode 20 of the electrostatic chuck 18 to fix the semiconductor wafer W on the susceptor 16.
The process gas delivered from the gas delivery holes 37 formed in the electrode plate 36 of the upper electrode 34 is turned into plasma by glow discharge caused by the RF power applied across the upper electrode 34 and the lower electrode or susceptor 16. Radicals and ions generated in this plasma are used to etch the target surface of the semiconductor wafer W.
In this plasma etching apparatus, the lower electrode or susceptor 16 is supplied with an RF power within a range covering high frequencies (for example, 10 MHz or more) from the first RF power supply. As a consequence, the plasma density is increased with a preferable state, so that high density plasma is generated even under a low pressure condition.
In this embodiment, when the plasma is thus generated, a DC voltage with a predetermined polarity and value is applied from the variable DC power supply 50 to the upper electrode 34. At this time, the application electrode or upper electrode 34 is preferably set to have a self bias voltage V_dcon the surface, at a level for obtaining a predetermined (moderate) sputtering effect onto the surface, i.e., the surface of the electrode plate 36. In other words, the application voltage from the variable DC power supply 50 is preferably controlled by the controller 51 to increase the absolute value of Vd_con the surface of the upper electrode 34. Where an RF is applied from the first RF power supply 88 to generate plasma, polymers may be deposited on the upper electrode 34. However, since a suitable DC voltage is applied from the variable DC power supply 50, polymers deposited on the upper electrode 34 are sputtered, thereby cleaning up the surface of the upper electrode 34. Further, an optimum quantity of polymers can be supplied onto the semiconductor wafer W, thereby canceling the surface roughness of the photo-resist film. Where the voltage applied from the variable DC power supply 50 is adjusted to sputter the body of the upper electrode 34, the electrode material can be supplied onto the surface of the semiconductor wafer W. In this case, the photo-resist film is provided with carbide formed on the surface, and is thereby reinforced. Further, the sputtered electrode material reacts with F contained in a fluorocarbon family process gas and is exhausted, thereby reducing the F ratio in plasma for the photo-resist film to be less etched. Particularly, where the electrode plate 36 is made of a silicon-containing material, such as silicon or SiC, sputtered silicon from the surface of the electrode plate 36 reacts with polymers, so the photo-resist film is provided with SiC formed on the surface, and is thereby remarkably reinforced. In addition to this, Si is highly reactive with F, and the effects described above are enhanced. Accordingly, a silicon-containing material is preferably used as a material of the electrode plate 36. It should be noted that, in this case, the application current or application power may be controlled in place of the application voltage from the variable DC power supply 50.
The DC voltage thus applied to the upper electrode 34 to make a deep self bias voltage V_dc, as described above, increases the length of a plasma sheath formed on the upper electrode 34, as shown in FIGS. 3A and 3B. As the length of the plasma sheath is increased, the plasma is further pressed by that much. For example, where no DC voltage is applied to the upper electrode 34, V_dcon the upper electrode side becomes, e.g., −100V. In this case, the plasma sheath has a small length d₀, as shown in FIG. 3A. On the other hand, where a DC voltage of −900V is applied to the upper electrode 34, V_dcon the upper electrode side becomes −900V. In this case, since the length of the plasma sheath is in proportion to ¾ of the absolute value of V_dc, the plasma sheath has a larger length d₁, and the plasma is pressed by that much, as shown in FIG. 3B. Where the length of the plasma sheath is thus increased to suitably press the plasma, the effective residence time above the semiconductor wafer W is decreased. Further, the plasma concentrates above the wafer W with less diffusion, thereby reducing the dissociation space. In this case, dissociation of a fluorocarbon family process gas is suppressed for the photo-resist film to be less etched. Accordingly, the application voltage from the variable DC power supply 50 is preferably controlled by the controller 51, such that the length of the plasma sheath on the upper electrode 34 is increased to a level for forming desired pressed plasma. It should be noted that, also in this case, the application current or application power may be controlled in place of the application voltage from the variable DC power supply 50.
Further, when the plasma is formed, electrons are generated near the upper electrode 34. When a DC voltage is applied from the variable DC power supply 50 to the upper electrode 34, electrons are accelerated in the vertical direction within the process space due to the potential difference between the applied DC voltage value and plasma potential. In other words, the variable DC power supply 50 can be set at a desired polarity, voltage value, and current value, to irradiate the semiconductor wafer W with electrons. The radiated electrons reform the composition of the mask or photo-resist film to reinforce the film. Accordingly, the application voltage value and application current value from the variable DC power supply 50 can be used to control the quantity of electrons generated near the upper electrode 34 and the acceleration voltage for accelerating the electrons toward the wafer W, so that the photo-resist film is reinforced in a predetermined manner.
Particularly, where the photo-resist film on the semiconductor wafer W is a photo-resist film (which will be referred to as an ArF resist film) for an ArF excimer laser (with a wavelength of 193 nm), the ArF resist film changes its polymer structure through reactions shown in the following chemical formulas (1) and (2), and is then irradiated with electrons, thereby arriving at the structure shown on the right side of the following chemical formula (3). In this case, by the irradiation with electrons, the composition of the ArF resist film is reformed (resist cross-linkage reaction), as shown in a portion d of the chemical formula (3). Since this portion d has a function of greatly enhancing the etching resistance property (plasma resistance property), the etching resistance property of the ArF resist film remarkably increases. As a consequence, the surface roughness of the ArF resist film is suppressed, and the etching selectivity of an etching target layer relative to the ArF resist film is increased.
Accordingly, the application voltage value or current value from the variable DC power supply 50 is preferably controlled by the controller 51 to enhance the etching resistance property of the photo-resist film (particularly, ArF resist film) by irradiation with electrons.
Further, as described above, when a DC voltage is applied to the upper electrode 34, electrons generated near the upper electrode 34 in plasma generation are accelerated in the vertical direction within the process space. The polarity, voltage value, and current value of the variable DC power supply 50 can be set at predetermined conditions, so that electrons reach into holes formed on the semiconductor wafer W. As a consequence, the shading effect is suppressed to obtain a good processed shape without bowing, while improving the uniformity of the processed shape.
It is assumed that electron current amount I_DCdue to the DC voltage is used as the quantity of electrons incident on the wafer W, where the acceleration voltage of electrons is controlled. In this case, where I_ionis ion current amount incident on the wafer from plasma, it is preferable to satisfy I_DC>(½) I_ion. Since I_ion=Zρv_ione (where, Z is charge number, ρ is current velocity density, v_ionis ion velocity, and e is electron charge amount 1.6×10⁻¹⁹C), and ρ is in proportion to electron density Ne, I_ionis in proportion to Ne.
As described above, the DC voltage applied to the upper electrode 34 can be controlled, so as to exercise the sputtering function onto the upper electrode 34 and the plasma pressing function, as well as the supply function of supplying a large quantity of electrons generated at the upper electrode 34 to the semiconductor wafer W, as described above. This arrangement makes it possible to reinforce the photo-resist film, supply optimum polymers, and suppress dissociation of the process gas. As a consequence, the surface roughness of the photo-resist is suppressed, and the etching selectivity of an etching target layer relative to the photo-resist film is increased. Further, the CD of an opening portion formed in the photo-resist film is prevented from expanding, thereby realizing pattern formation with high accuracy. Particularly, these effects are more enhanced by controlling the DC voltage to suitably exercise the three functions described above, i.e., the sputtering function, plasma pressing function, and electron supply function.
It should be noted that, it depends on process conditions or the like to determine which one of the functions described above is predominant. The voltage applied from the variable DC power supply 50 is preferably controlled by the controller 51 to exercise one or more of the functions to effectively obtain the corresponding effects.
The DC voltage applied to the upper electrode 34 can be adjusted to control the plasma potential. In this case, etching by-products can be prevented from being deposited on the upper electrode 34, the deposition shield 11 forming a part of the chamber wall, the inner wall member 26, and the insulating shield member 42.
If etching by-products are deposited on the upper electrode 34 or the deposition shield 11 forming the chamber wall, a problem may arise in that the process characteristics change or particles are generated. Particularly, there is involving sequentially etching a multi-layered film, in which an Si-organic film (SiOC), SiN film, SiO₂film, and photo-resist are laminated on a semiconductor wafer W in this order. In this case, since suitable etching conditions are different for the respective films, a memory effect may occur in that a previous process leaves some effect that affects a subsequent process.
The amount of deposition of etching by-products described above depends on the potential difference between the plasma and the upper electrode 34, chamber wall, or the like. Accordingly, deposition of etching products can be suppressed by controlling the plasma potential.
As described above, the voltage applied from the variable DC power supply 50 to the upper electrode 34 can be controlled to lower the plasma potential. As a consequence, etching by-products can be prevented from being deposited on the upper electrode 34, the deposition shield 11 forming a part of the chamber wall, and the insulating members (members 26 and 42) inside the chamber 10. The plasma potential Vp is preferably set at a value within a range of 80V □Vp□200V.
Further, the applied DC voltage contributes to formation of plasma, as another effect obtained by the DC voltage applied to the upper electrode 34. In this case, the plasma density can be higher and the etching rate is thereby increased.
This is so, because, the negative DC voltage applied to the upper electrode hinders electrons from entering the upper electrode and thus suppresses extinction of electrons. Further, where the negative DC voltage accelerates ions onto the upper electrode, electrons are emitted from the electrode. These electrons are accelerated at a high velocity due to the difference between the plasma potential and application voltage value, and ionize neutral gas (turn the gas into plasma), thereby increasing the electron density (plasma density).
The reason for this will be explained, with reference to experiments.
FIGS. 4A to 4D are views showing the relationship between the RF power output and electron density distribution. In this experiment, the absolute value of the negative DC voltage applied to the upper electrode was set at different values of 0V, 300V, 600V, and 900V, under HARC etching conditions in which the first RF power and the second RF power applied to the lower electrode or susceptor 16 had frequencies of 40 MHz and 3.2 MHz, respectively, and the pressure was set at 4 Pa. FIGS. 5A to 5D are views showing relationship between the RF power output and electron density distribution. In this experiment, the absolute value of the negative DC voltage applied to the upper electrode was set at different values of 0V, 300V, 600V, and 900V, under VIA etching conditions in which the two RF powers had frequencies the same as those described above, and the pressure was set at 6.7 Pa. As shown in FIGS. 4A to 5D, with increase in the absolute value of the application DC voltage, the electron density (plasma density) increased. FIG. 6 is a view showing electron density distributions in the wafer radial direction where the first RF power was set at 3,000 W and the second RF power was set at 4,000 W under the HARC etching mentioned above. As shown in FIG. 6, with increase in the absolute value of the application DC voltage, the electron density increased.
Further, when plasma is generated, the DC voltage applied to the upper electrode 34 from the variable DC power supply 50 increases the plasma density particularly at the central portion in trench etching. As in trench etching conditions, where the pressure inside the chamber 10 is high and the etching gas is a negative gas, the plasma density tends to be lower at the central portion of the chamber 10. However, since the DC voltage applied to the upper electrode 34 increases the plasma density at the central portion, the plasma density can be controlled to make the plasma density uniform.
The reason for this will be explained, with reference to experiments.
In the apparatus shown in FIG. 2, the electron density (plasma density) distribution in the wafer radial direction was measure in cases where the upper electrode was supplied with no DC voltage and where it was supplied with −600 W, both under trench etching conditions. In order to set the trench etching conditions, a semiconductor wafer was loaded into the chamber and placed on the susceptor, and then a process gas comprising CF₄gas, CHF₃gas, Ar gas, and N₂gas was supplied into the chamber, the pressure inside the chamber was set at 26.6 Pa, and the lower electrode or susceptor was supplied with a first RF power with 40 MHz at 300 W and a second RF power with 3.2 MHz at 1,000 W. FIG. 7 shows the results of this experiment. As shown in FIG. 7, where no DC voltage was applied, the electron density was lower at the wafer central portion than the other portions. On the other hand, where the DC voltage was applied, the electron density was increased at the wafer central portion and became uniform. Further, where the DC voltage was applied, the electron density was increased as a whole.
As described above, the DC voltage applied to the upper electrode 34 can be controlled, so as to effectively exercise at least one of the above-described sputtering function onto the upper electrode 34, plasma pressing function, electron supply function, plasma potential control function, electron density (plasma density) increase function, and plasma density control function.
As described above, an explanation has been given of functions and effects of the direct current (DC) voltage applied to the upper electrode 34.
Incidentally, in this embodiment, a DC voltage is applied to the upper electrode of a plasma etching apparatus in which a first radio frequency (RF) power for plasma generation and a second radio frequency (RF) power for ion attraction are applied to the lower electrode, i.e., an apparatus of the type that applies two RF powers with different frequencies to the lower side. Plasma etching apparatuses of the type that applies two RF powers with different frequencies to the lower side have the following advantages, as compared to the other plasma etching apparatus of the capacitive coupling type.
First, as in this embodiment, where an RF power for plasma generation is applied to the lower electrode, plasma is generated near the wafer, and dissociation of the process gas is suppressed because plasma is prevented from widely diffusing. As a consequence, even where the pressure inside the process chamber is high and the plasma density is low, the etching rate on the wafer can be increased. Further, even where the RF power for plasma generation has a high frequency, it is possible to ensure relatively large ion energy and thus attain a high efficiency. By contrast, in apparatuses of the type that applies an RF power for plasma generation to the upper electrode, plasma is generated near the upper electrode. In this case, it is difficult to increase the etching rate on the wafer, if the pressure inside the process chamber is high and the plasma density is low.
In addition, as in this embodiment, where an RF power for plasma generation and an RF power for ion attraction are independently applied to the lower electrode, the function of generating plasma and the function of attracting ions, both necessary for plasma etching, can be independently controlled. By contrast, in apparatuses of the type that applies an RF power with one frequency to the lower electrode, the function of generating plasma and the function of attracting ions cannot be independently controlled. In this case, it is difficult to satisfy etching conditions where high micro-fabrication is required.
As described above, according to a plasma etching apparatus of the type that applies two RF powers with different frequencies to the lower side, plasma is generated near the wafer and is prevented from widely diffusing, and the function of generating plasma and the function of attracting ions can be independently controlled. Further, where a DC voltage is applied to the upper electrode in this etching apparatus, the apparatus can also exercise at least one of the upper electrode sputtering function, plasma pressing function, electron supply (to a wafer) function, plasma potential control function, plasma density increase function, and plasma density control function. As a consequence, it is possible to provide a plasma etching apparatus with high performance, which is more suitable for recent etching micro-fabrication.
The DC voltage application to the upper electrode 34 may be selectively performed. Under etching conditions which require the DC voltage application to the upper electrode 34, the variable DC power supply 50 and the relay switch 52 shown in FIG. 2 are set in the ON-state. On the other hand, under etching conditions which do no require the DC voltage application to the upper electrode 34, the variable DC power supply 50 and relay switch 52 are set in the OFF-state.
Further, if the upper electrode 34 is grounded when a DC voltage is applied to the upper electrode 34, the DC voltage application has no effect. Thus, the upper electrode 34 needs to be in a floating state in the sense of DC at this time. FIG. 8 shows a schematic view of this structure. In FIG. 8, a dielectric body is disposed at each of the portions that electrically form capacitors 501, 502, and 503, so that upper electrode 34 is set in a floating state in the sense of DC by the dielectric body from the process chamber 10 and grounded conductive body 10 a. RF powers applied from the RF power supplies 88 and 89 to the lower electrode 16 reach the upper electrode 34 through the process space, and then reach the grounded process chamber 10 and grounded conductive body 10 a through the capacitors 501, 502, and 503.
Where the variable DC power supply 50 and relay switch 52 are set in the OFF-state to apply no DC voltage to the upper electrode 34, the upper electrode 34 may be arranged to be switchable between the grounded state and floating state in the sense of DC. In the example shown in FIG. 9, where no DC voltage is applied to the upper electrode 34, the grounded conductive body 10 a is short-circuited with the upper electrode 34 by a switch (switching unit) 504 to set the upper electrode 34 in a grounded state. However, at this time, the switch (switching unit) 504 may be turned off to set the upper electrode 34 in a floating state in the sense of DC.
Further, as shown in FIG. 10, the portion electrically forming the capacitor 501 may be structured such that the capacitance is electrically variable. With this arrangement, the potential on the upper electrode can be variably adjusted.
Further, as shown in FIG. 11, a detector 55 may be disposed to detect the plasma state through, e.g., a plasma detection window 10 a, so that the controller 51 can control the variable DC power supply 50 based on the detection signal. As a consequence, it is possible to automatically apply a DC voltage to the upper electrode 34, so as to effectively exercise the functions described above. Alternatively, a detector for detecting the sheath length or a detector for detecting the electron density may be disposed, so that the controller 51 can control the variable DC power supply 50 based on the detection signal.
As regards a plasma etching apparatus of the type that applies two RF powers with different frequencies to the lower side, and further applies a DC voltage to the upper electrode, where the apparatus is used to etch an insulating film (for example, Low-k film) disposed on a wafer W, the following combination of gases is particularly preferably used as a process gas.
Specifically, where over etching is performed under via-etching conditions, a combination of (C₅F₈, Ar, and N₂), (C₄F₈, Ar, and N₂), (C₄F₈, Ar, N₂, and O₂), or (C₄F₈, Ar, N₂, and CO) may be preferably used as a process gas. In this case, the selectivity of an insulating film relative to an underlying film (SiC, SiN, etc.) can become larger.
Alternatively, where trench etching conditions are used, CF₄or a combination of (CF₄and Ar) or (N₂and H2) may be preferably used as a process gas. In this case, the selectivity of an insulating film relative to a mask can become larger.
Alternatively, where conditions for etching an organic anti-reflection film on an insulating film are used, CF₄or a combination of (CF₄and C₃F₈), (CF₄and C₄F₈), or (CF₄and C₄F₆) may be preferably used as a process gas.
Alternatively, where HARC etching conditions are used, a combination of (C₄F₆, CF₄, Ar, and O₂), (C₄F₆, C₃F₈, Ar, and O₂), (C₄F₆, C₄F₈, Ar, and O₂), (C₄F₆, C2F6, Ar, and O₂), (C₄F₈, Ar, and O₂), or (C₄F₈, Ar, and O₂) may be preferably used as a process gas. In this case, the etching rate of an insulating film can become higher.
The process gas is not limited to the examples described above, and another combination of (CxHyFz gas/additive gas such as N₂or O₂/dilution gas) may be used.
Incidentally, where a DC voltage is applied to the upper electrode 34, electrons may accumulate on the upper electrode 34 and thereby cause abnormal electric discharge between the upper electrode 34 and the inner wall of the chamber 10. In order to suppress such abnormal electric discharge, this embodiment includes the GND block (conductive member) 91 as a part grounded in the sense of DC, which is disposed on the deposition shield 11 that constitutes the chamber wall. The GND block 91 is exposed to plasma, and is electrically connected to a conductive portion in the deposition shield 11. The DC voltage current applied from the variable DC power supply 50 to the upper electrode 34 flows through the process space to the GND block 91, and is then grounded through the deposition shield 11. The GND block 91 is made of a conductor, and preferably a silicon-containing substance, such as Si or SiC. The GND block 91 may be preferably made of C. The GND block 91 allows electrons accumulated in the upper electrode 34 to be released, thereby preventing abnormal electric discharge. The GND block 91 preferably has a protruding length of 10 mm or more.
Further, in order to prevent abnormal electric discharge, it may be effective to use a method of superposing very short periodic pulses of the opposite polarity, as shown in FIG. 12, by a suitable means, with the DC voltage applied to the upper electrode 34, so as to neutralize electrons.
The position of the GND block 91 is not limited to that shown in FIG. 2, as long as it is disposed in the plasma generation area. For example, as shown in FIG. 13, the GND block 91 may be disposed on the susceptor 16 side, e.g., around the susceptor 16. Alternatively, as shown in FIG. 14, the GND block 91 may be disposed near the upper electrode 34, e.g., as a ring disposed outside the upper electrode 34. However, when plasma is generated, Y₂O₃or a polymer that covers the deposition shield 11 or the like flies out and may be deposited on the GND block 91. In this case, the GND block 91 cannot maintain the grounding performance any more in the sense of DC, and thus hardly exercises the effect of preventing abnormal electric discharge. Accordingly, it is important to prevent such deposition. For this reason, the GND block 91 is preferably located at a position remote from members covered with Y₂O₃or the like, but preferably near parts made of an Si-containing substance, such as Si or quartz (SiO₂). For example, as shown in FIG. 15A, an Si-containing member 93 is preferably disposed near the GND block 91. In this case, the length L of a portion of the Si-containing member 93 below the GND block 91 is preferably set to be equal to or longer than the protruding length M of the GND block 91. Further, in order to prevent the function from being deteriorated due to deposition of Y₂O₃or a polymer, as shown in FIG. 15B, it is effective to form a recess 91 a in the GND block 91 where flying substances are hardly deposited. It is also effective to increase the surface are of the GND block 91, so that it cannot be entirely covered with Y₂O₃or a polymer. Further, in order to suppress deposition, it is effective to increase the temperature. In this respect, the upper electrode 34 is supplied with an RF power for plasma generation, and thus increases the temperature around it. Accordingly, the GND block 91 is preferably disposed near the upper electrode 34, as shown in FIG. 14, to increase the temperature and thereby prevent deposition. Particularly in this case, the GND block 91 is preferably disposed as a ring outside the upper electrode 34, as shown in FIG. 14.
In order to more effectively remove the influence of deposition on the GND block 91, due to Y₂O₃or a polymer flying out from the deposition shield 11 and so forth, it is effective to make a negative DC voltage applicable to the GND block 91, as shown in FIG. 16. Specifically, where a negative DC voltage is applied to the GND block 91, deposition sticking thereto is sputtered or etched, so as to clean the surface of the GND block 91. In the structure shown in FIG. 16, a switching mechanism 53 is configured to switch the connection of the GND block 91 between the variable DC power supply 50 and a ground line, so that a voltage can be applied to the GND block 91 from the variable DC power supply 50. Further, a grounded conductive auxiliary member 91 b is disposed to receive flow of a DC electron current generated by a negative DC voltage applied to the GND block 91. The switching mechanism 53 includes a first switch 53 a to switch the connection of the variable DC power supply 50 between the matching unit 46 and GND block 91, and a second switch 53 b to turn on/off the connection of the GND block 91 to the ground line. In the structure shown in FIG. 16, the GND block 91 is disposed as a ring outside the upper electrode 34, while the conductive auxiliary member 91 b is disposed around the susceptor 16. Although this arrangement is preferable, another arrangement may be adopted.
During plasma etching, the structure shown in FIG. 16 is typically set as shown in FIG. 17A, in which the first switch 53 a of the switching mechanism 53 is connected to the upper electrode 34, so the variable DC power supply 50 is connected to the upper electrode 34, while the second switch 53 b is in the ON-state, so the GND block 91 is connected to the ground line. In this state, the first RF power supply 48 and variable DC power supply 50 are electrically connected to the upper electrode 34, and plasma is thereby generated. At this time, a DC electron current flows from the upper electrode 34 through plasma into the grounded GND block 91 and conductive auxiliary member 91 b (a positive ion current flows in the opposite direction). In this case, the surface of the GND block 91 may be covered with deposition of Y₂O₃or a polymer, as described above.
Accordingly, cleaning is then performed to remove this deposition. For this cleaning, as shown in FIG. 17B, the first switch 53 a of the switching mechanism 53 is switched to the GND block 91, and the second switch 53 b is turned off. In this state, the first RF power supply 48 is electrically connected to the upper electrode 34, and cleaning plasma is thereby generated, while a negative DC voltage is applied from the variable DC power supply 50 to the GND block 91. As a consequence, a DC electron current flows from the GND block 91 into the conductive auxiliary member 91 b. On the other hand, positive ions flow into the GND block 91. Accordingly, the DC voltage can be adjusted to control the energy of positive ions incident on the GND block 91, so that the surface of the GND block 91 is sputtered by ions to remove deposition sticking to the surface of the GND block 91.
Further, as shown in FIG. 18, the second switch 53 b may be set in the OFF state during a partial period of plasma etching, so that the GND block 91 is in a floating state. At this time, a DC electron current flows from the upper electrode 34 through plasma into the conductive auxiliary member 91 b (a positive ion current flows in the opposite direction). In this case, the GND block 91 is given a self bias voltage, which provides energy for positive ions to be incident on the GND block 91, thereby cleaning the GND block 91.
During the cleaning described above, the application DC voltage can be small, and thus the DC electron current is also small at this time. Accordingly, in the structure shown in FIG. 16, where electric charges due to leakage current can be prevented from accumulating in the GND block 91, the conductive auxiliary member 91 b is not necessarily required.
In the structure shown in FIG. 16, for cleaning, the connection of the variable DC power supply 50 is switched from the upper electrode 34 to the GND electrode 91, so that a DC electron current due to application of a DC voltage flows from the GND block 91 to the conductive auxiliary member 91 b. Alternatively, it may be adopted that the positive terminal of the variable DC power supply 50 is connected to the upper electrode 34, while the negative terminal is connected to the GND block 91, so that a DC electron current due to application of a DC voltage flows from the GND block 91 to the upper electrode 34. In this case, the conductive auxiliary member is not necessary. FIG. 19 shows such a structure. The structure shown in FIG. 19 includes a connection switching mechanism 57, which is configured to perform connection switching such that, during plasma etching, the negative terminal of the variable DC power supply 50 is connected to the upper electrode 34, while the GND block 91 is connected to the ground line. Further, in this switching, during cleaning, the positive terminal of the variable DC power supply 50 is connected to the upper electrode 34, while the negative terminal is connected to the GND block 91. This connection switching mechanism 57 includes a first switch 57 a to switch the connection of the variable DC power supply 50 to the upper electrode 34 between the positive terminal and negative terminal, a second switch 57 b to switch the connection of the variable DC power supply 50 to the GND block 91 between the positive terminal and negative terminal, and a third switch 57 c to set the positive terminal or negative terminal of the variable DC power supply 50 to be grounded. The first switch 57 a and second switch 57 b are arranged to form an interlock switch structure. Specifically, when the first switch 57 a is connected to the positive terminal of the variable DC power supply 50, the second switch 57 b is connected to the negative terminal of the DC power supply. Further, when the first switch 57 a is connected to the negative terminal of the variable DC power supply 50, the second switch 57 b is set in the OFF state.
During plasma etching, the structure shown in FIG. 19 is set as shown in FIG. 20A, in which the first switch 57 a of the connection switching mechanism 57 is connected to the negative terminal of the variable DC power supply 50, so the negative terminal of the variable DC power supply 50 is connected to the upper electrode 34. Further, the second switch 57 b is connected to the positive terminal of the variable DC power supply 50, and the third switch 57 c is connected to the positive terminal of the variable DC power supply 50 (the positive terminal of the variable DC power supply 50 is grounded), so that the GND block 91 is connected to the ground line. In this state, the first RF power supply 48 and variable DC power supply 50 are electrically connected to the upper electrode 34, and plasma is thereby generated. At this time, a DC electron current flows from the upper electrode 34 through plasma into the grounded GND block 91 (a positive ion current flows in the opposite direction). In this case, the surface of the GND block 91 may be covered with deposition of Y₂O₃or a polymer, as described above.
On the other hand, for cleaning, as shown in FIG. 20B, the first switch 57 a of the connection switching mechanism 57 is switched to the positive terminal of the variable DC power supply 50, the second switch 57 b is switched to the negative terminal of the variable DC power supply 50, and the third switch 57 c is set to be in a disconnected state. In this state, the first RF power supply 48 is electrically connected to the upper electrode 34, and cleaning plasma is thereby generated, while a DC voltage is applied to the GND block 91 from the negative terminal of the variable DC power supply 50 and to the upper electrode 34 from the positive terminal of the variable DC power supply 50. Due to the potential difference between these members, a DC electron current flows from the GND block 91 into the upper electrode 34, while positive ions flow into the GND block 91. Accordingly, the DC voltage can be adjusted to control the energy of positive ions incident on the GND block 91, so that the surface of the GND block 91 is sputtered by ions to remove deposition sticking to the surface of the GND block 91. In this case, the variable DC power supply 50 appears to be in a floating state, but, in general, a power supply is provided with a frame ground line, thus is safe.
In the example described above, although the third switch 57 c is in the disconnected state, the positive terminal of the variable DC power supply 50 may be kept in the connected state (the positive terminal of the variable DC power supply 50 is grounded). In this state, the first RF power supply 48 is electrically connected to the upper electrode 34, and cleaning plasma is thereby generated, while a DC voltage is applied from the negative terminal of the variable DC power supply 50 to the GND block 91. As a consequence, a DC electron current flows from the GND block 91 into the upper electrode 34 through plasma, while positive ions flow into the GND block 91. Also in this case, the DC voltage can be adjusted to control the energy of positive ions incident on the GND block 91, so that the surface of the GND block 91 is sputtered by ions to remove deposition sticking to the surface of the GND block 91.
In the examples shown in FIGS. 16 and 19, although a DC voltage is applied to the GND block 91 during cleaning, an AC voltage may be alternatively applied. Further, in the example shown in FIG. 16, although the variable DC power supply 50 for applying a DC voltage to the upper electrode is used for applying a voltage to the GND block 91, another power supply may be used for applying the voltage. Furthermore, in the examples shown in FIGS. 16 and 19, although the GND block 91 is grounded during plasma etching, while a negative DC voltage is applied to the GND block 91 during cleaning, this is not limiting. For example, during plasma etching, a negative DC voltage may be applied to the GND block 91. The term, “during cleaning” may be replaced with “during aching” in the explanation described above. Furthermore, where the variable DC power supply 50 is formed of a bipolar power supply, it does not require any complex switching operation, such as that of the connection switching mechanism 57 described above.
The switching operations of the switching mechanism 53 of the example shown in FIG. 16 and the connection switching mechanism 57 of the example shown in FIG. 19 are performed in accordance with commands sent from the control section 95.
In order to simply prevent the GND block 91 from losing the grounding performance in the sense of DC, due to deposition of Y₂O₃or a polymer on the GND block 91 in plasma generation, it is effective to partly cover the GND block 91 with another member, and to move them relative to each other so as to expose a new surface of the GND block 91. Specifically, as shown in FIG. 21, it may be adopted that the GND block 91 is set to have a relatively large area, and the surface of the GND block 91 to be in contact with plasma is partly covered with a mask member 111 movable in the arrow direction. This cover plate 111 is movable, so that a portion to be exposed to plasma can be changed on the surface of the GND block 91. In this case, although a driving mechanism disposed in the chamber 10 may cause a problem about particle generation, it cannot be serious because the frequency of use of the driving mechanism is as low as once in 100 hours. Further, for example, as shown in FIG. 22, it may be effective that a columnar GND block 191 is rotatably disposed, and the outer periphery surface of the GND block 191 is covered with a mask member 112, so that it is partially exposed. Where the GND block 191 is rotated, the portion to be exposed to plasma can be changed. In this case, a driving mechanism may be disposed outside the chamber 10. Each of the mask members 111 and 112 may be formed of a member having a high plasma resistance property, such as an aluminum plate covered with a ceramic, such as Y₂O₃, formed by thermal spray.
In order to simply prevent the GND block 91 from losing the grounding performance in the sense of DC due to deposition, it is also effective to partly cover the GND block 91 with another member, which is to be gradually etched by plasma, so that a part of the surface of the GND block 91, which has not lost conductivity, is always exposed. For example, as shown in FIG. 23A, it may be adopted that the surface of the GND block 91 is partly covered with a stepped cover film 113 disposed to leave an initially exposed surface 91 c that provides a grounding performance. In this case, after a plasma process is performed for, e.g., 200 hours, the initially exposed surface 91 c of the GND block 91 loses conductivity, as shown in FIG. 23B. However, the stepped cover film 113 is designed to have a thin portion such that it has been etched by this time, so that a new exposed surface 91 d of the GND block 91 appears. The new exposed surface 91 d provides a grounding performance. This cover film 113 has the effect of preventing a wall surface material from being deposited on the GND block 91, as well as the effect of reducing ions incident on the GND block 91 to prevent contamination thereof.
In practical use, as shown in FIG. 24, it is preferable to use a cover film 113 a in which a number of thin layers 114 are stacked while the layers are gradually shifted. In this case, where one layer 114 disappears due to etching by plasma in a time Te, and an exposed surface of the GND block 91 loses conductivity due to contamination in a time Tp, the thickness of the layer 114 is set to satisfy Te<Tp, so that a conductive surface is always ensured on the GND block 91. The number of layers 114 is preferably set to make the service life of the GND block 91 longer than the frequency of maintenance. Further, in order to improve the maintenance performance, one layer 114 a is provided with a different color from the others, as shown in FIG. 24, so that it is possible to know the time to replace the GND block 91 with a new one, by this film 114 a, for example, when the surface area of this film 114 a exceeds a certain value.
Each of the cover films 113 and 113 a is preferably formed of a film to be suitably etched by plasma, such as a photo-resist film.
In order to simply prevent the GND block 91 from losing the grounding performance in the sense of DC due to deposition, it may be also adopted to dispose a plurality of GND blocks 91, so that they are switched in turn to exercise a grounding performance. For example, as shown in FIG. 25, three GND blocks 91 are disposed and only one of them is selectively grounded by a shift switch 115. Further, a current sensor 117 is disposed on a common ground line 116 to monitor a DC current flowing therethrough. The current sensor 117 is used to monitor a current flowing through a grounded GND block 91, and when the current value becomes lower than a predetermined value, it is determined that this GND block 91 cannot exercise the grounding performance, and thus the connection is switched from this one to another GND block 91. The number of GND blocks 91 is suitably selected from a range of about 3 to 10.
In the example described above, a GND block not grounded is in an electrically floating state, but such a GND block may be supplied with an electric potential for protection to protect a GND block in an idle state, in place of use of the shift switch 115. FIG. 26 shows an example designed in this aspect. As shown in FIG. 26, each of ground lines 118 respectively connected to GND blocks 91 is provided with a variable DC power supply 119. In this case, the voltage of a GND block 91 to exercise a grounding performance is set at 0V by controlling the voltage of the corresponding variable DC power supply 119. Further, the voltage of each of the other GND blocks 91 is set at, e.g., 100V to prevent an electric current from flowing therethrough by controlling the voltage of the corresponding variable DC power supply 119. When the current value detected thereby becomes lower than a predetermined value at the current sensor 117 on the ground line 118 connected to a GND block 91 to exercise a grounding performance, it is determined that this GND block 91 cannot exercise the grounding performance. Accordingly, the voltage of the variable DC power supply 119 corresponding to another GND block 91 is controlled to be a value for this GND block 91 to exercise a grounding performance.
As described above, where the application voltage from a DC power supply 119 is set at a negative value of about −1 kV, the GND block 91 connected thereto can function as an electrode to apply a DC voltage to plasma. However, if this value is too large, the plasma is affected. Further, the voltage applied to the GND block 91 can be controlled to obtain a cleaning effect on the GND block 91.
In this embodiment, the first RF power and second RF power may have frequencies, as follows. Specifically, the frequency of the first RF power may be one of 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, 80 MHz, 100 MHz, and 160 MHz, while the frequency of the second RF power may be one of 380 kHz, 800 kHz, 1 MHz, 2 MHz, 3.2 MHz, and 13.56 MHz. They are suitably combined in accordance with a process to be performed.
The embodiment described above is exemplified by a plasma etching apparatus, but it may be applied to other apparatuses that utilize plasma to process a semiconductor substrate, such as a plasma film formation apparatus.
Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.

Claims

1. A plasma processing apparatus comprising:

a process container configured to accommodate a target substrate and to be vacuum-exhausted;

a first electrode and a second electrode disposed opposite each other within the process container, the first electrode being an upper electrode and the second electrode being a lower electrode and configured to place the target substrate thereon;

a first RF power application unit configured to apply a first RF power to the second electrode;

a second RF power application unit configured to apply a second RF power to the second electrode, the second RF power having a frequency lower than that of the first RF power;

a DC power supply configured to apply a DC voltage to the first electrode; and

a process gas supply unit configured to supply a process gas into the process container,

wherein the first electrode is in a floating state relative to ground potential in a sense of DC.

2. The plasma processing apparatus according to claim 1, wherein the plasma processing apparatus further comprises a switching mechanism configured to switch the first electrode between the floating state and a grounded state where the first electrode is connected to ground potential in a sense of DC.

3. The plasma processing apparatus according to claim 2, wherein the switching mechanism sets the first electrode in the floating state when the DC voltage is applied to the first electrode, and sets the first electrode in the floating state or the grounded state when the DC voltage is not applied to the first electrode.

4. The plasma processing apparatus according to claim 2, wherein the plasma processing apparatus further comprises a control section configured to control an operation of the plasma processing apparatus and including a computer and a non-transitory storage medium storing a control program for execution on the computer, and the control program, when executed, causes the computer to control the plasma processing apparatus to selectively set a first plasma etching mode where the first electrode is in the floating state while the DC voltage is applied to the first electrode, and a second plasma etching mode where the first electrode is in the floating state or the grounded state while the DC voltage is not applied to the first electrode.

5. The plasma processing apparatus according to claim 1, wherein the DC power supply is configured such that any one of application voltage, application current, and application power to the first electrode is variable.

6. The plasma processing apparatus according to claim 1, wherein the plasma processing apparatus further comprises a control unit configured to control any one of application voltage, application current, and application power from the DC power supply to the first electrode.

7. The plasma processing apparatus according to claim 6, wherein the control unit is configured to control whether the DC voltage to be applied or not, from the DC power supply to the first electrode.

8. The plasma processing apparatus according to claim 6, wherein the plasma processing apparatus further comprises a detector configured to detect a generated plasma state, and the control unit controls any one of the application voltage, application current, and application power from the DC power supply to the first electrode, based on information from the detector.

9. The plasma processing apparatus according to claim 1, wherein the first RF power has a frequency of 27 MHz or more.

10. The plasma processing apparatus according to claim 9, wherein the first RF power has a frequency of 40 MHz or more.

11. The plasma processing apparatus according to claim 1, wherein the second RF power has a frequency of 13.56 MHz or less.

12. The plasma processing apparatus according to claim 1, wherein the DC voltage is a voltage of −2,000 to +1,000V.

13. The plasma processing apparatus according to claim 1, wherein a surface of the first electrode facing the second electrode is made of a silicon-containing substance.

14. The plasma processing apparatus according to claim 1, wherein the plasma processing apparatus further comprises a conductive member disposed within the process container and grounded to release through plasma a current caused by the DC voltage applied from the DC power supply to the first electrode.

15. The plasma processing apparatus according to claim 14, wherein the conductive member is disposed around the second electrode.

16. The plasma processing apparatus according to claim 14, wherein the conductive member is disposed near the first electrode.

17. The plasma processing apparatus according to claim 16, wherein the conductive member is disposed to form a ring shape around the first electrode.

18. The plasma processing apparatus according to claim 14, wherein the conductive member has a recess to prevent flying substances from being deposited during a plasma process.