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Publication numberUS20090186445 A1
Publication typeApplication
Application numberUS 12/411,900
Publication date23 Jul 2009
Filing date26 Mar 2009
Priority date15 Nov 2005
Also published asCN101283444A, CN101283444B, CN101577231A, CN101577231B, CN101577256A, CN101577256B, CN101577281A, CN101577281B, CN101577282A, CN101577293A, CN101577293B, CN101667544A, CN101667544B, CN101707212A, CN101707212B, US8134156, US8158464, US8368079, US8525165, US20070108446, US20090186437, US20090189155, US20090189156, US20100003783, US20100038639, WO2007058329A1
Publication number12411900, 411900, US 2009/0186445 A1, US 2009/186445 A1, US 20090186445 A1, US 20090186445A1, US 2009186445 A1, US 2009186445A1, US-A1-20090186445, US-A1-2009186445, US2009/0186445A1, US2009/186445A1, US20090186445 A1, US20090186445A1, US2009186445 A1, US2009186445A1
InventorsKengo Akimoto
Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Semiconductor device and manufacturing method thereof
US 20090186445 A1
Abstract
To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.
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Claims(21)
1. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:
forming the gate insulating film by using a microwave,
wherein the channel formation region comprises an oxide semiconductor material.
2. The method according to claim 1 wherein the microwave has a frequency of 2.45 GHz.
3. The method according to claim 1 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.
4. The method according to claim 1 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.
5. The method according to claim 1 wherein the oxide semiconductor material includes zinc oxide.
6. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:
forming the gate insulating film by using a plasma having an electron density from 11011 to 11013/cm3,
wherein the channel formation region comprises an oxide semiconductor material.
7. The method according to claim 6 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.
8. The method according to claim 6 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.
9. The method according to claim 6 wherein the oxide semiconductor material includes zinc oxide.
10. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:
forming the gate insulating film by using a plasma having an electron temperature 2 eV or less,
wherein the channel formation region comprises an oxide semiconductor material.
11. The method according to claim 10 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.
12. The method according to claim 10 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.
13. The method according to claim 10 wherein the oxide semiconductor material includes zinc oxide.
14. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:
forming the gate insulating film by using a plasma generated by using a microwave, the plasma having an electron density from 11011 to 11013/cm3,
wherein the channel formation region comprises an oxide semiconductor material.
15. The method according to claim 10 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.
16. The method according to claim 10 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.
17. The method according to claim 10 wherein the oxide semiconductor material includes zinc oxide.
18. A method of manufacturing a semiconductor device including a channel formation region and a gate insulating film adjacent to the channel formation region, the method comprising:
forming the gate insulating film by using a plasma generated by using a microwave, the plasma having an electron temperature 2 eV or less,
wherein the channel formation region comprises an oxide semiconductor material.
19. The method according to claim 18 wherein the semiconductor device is a top gate semiconductor device in which the gate insulating film is formed over the channel formation region.
20. The method according to claim 18 wherein the gate insulating film comprises a material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and silicon nitride oxide.
21. The method according to claim 18 wherein the oxide semiconductor material includes zinc oxide.
Description
    TECHNICAL FIELD
  • [0001]
    The present invention relates to a semiconductor device using ZnO (Zinc Oxide) and a manufacturing method thereof.
  • BACKGROUND ART
  • [0002]
    A semiconductor device used for a display panel of a liquid crystal display device or an EL (Electroluminescent) display device, for example, a semiconductor portion of a TFT (Thin Film Transistor), is generally formed by using a-Si (amorphous silicon) or poly-Si (polycrystalline silicon).
  • [0003]
    Si (silicon) does not have a large band gap (for example, single-crystalline Si is 1.1 eV), and absorbs visible light. By irradiation with the light, electrons and holes (carriers) are formed in Si. If a Si film is used for a channel formation region of a TFT, a carrier is generated in the channel formation region by irradiation with the light even in an OFF state. Then, current flows between a source region and a drain region. The current which flows in an OFF state is called “OFF-leak current”. If the current value is high, a display panel does not operate normally. Consequently, a light shielding film is formed so as not to irradiate the Si film with light. However, a process becomes complex when the light shielding film is formed, because a deposition step, a photolithography step, and an etching step are required.
  • [0004]
    To solve the problem, an attention is paid to a transparent transistor using zinc oxide (ZnO) which is a semiconductor having a larger band gap of 3.4 eV than that of Si. Concerning such a transparent transistor, the band gap is larger than light energy in a visible light band and the visible light is not absorbed. Consequently, it has an advantage that the OFF-leak current does not increase if irradiated with light.
  • [0005]
    A semiconductor device using ZnO for the channel formation region is disclosed in Reference 1, for example. The structure of the semiconductor device using ZnO is described referring to FIG. 7A.
  • [0006]
    A semiconductor device in FIG. 7A has a source electrode 1001 and a drain electrode 1002, a ZnO layer 1003 arranged so as to be contacted with the source electrode 1001 and the drain electrode 1002, and a gate insulating layer 1004 stacked over the ZnO layer 1003 and a gate electrode 1005 over an insulating substrate 1000 such as a glass substrate.
  • [0007]
    For the source electrode 1001 and the drain electrode 1002, a conductive ZnO is used. The conductive ZnO is doped with one of the following: B (boron), Al (aluminum), Ga (gallium), In (indium), or Tl (thallium), which are III group elements; F (fluorine), Cl (chlorine), Br (bromine), or I (iodine), which are VII group elements; Li (lithium), Na (sodium), K (potassium), Rb (rubidium), or Cs (caesium), which are I group elements; and N (nitrogen), P (phosphorus), As (arsenic), Sb (antimony), or Bi (bismuth), which are V group elements.
  • [Reference 1] Japanese Published Patent Application No. 2000-150900 DISCLOSURE OF INVENTION
  • [0008]
    According to the examination by the present inventor, it was revealed that the substrate 1000 is etched in some cases when the source electrode 1001 and the drain electrode 1002 of the top gate semiconductor device shown in FIG. 7A is formed by etching. Even in the case of forming a base film 1006 formed by using a silicon oxide film or a silicon oxynitride film on the substrate 1000, the surface of the substrate 1000 is exposed in some cases when the base film is etched. In addition, in the case of a bottom gate semiconductor device shown in FIG. 7B, it is revealed that a gate insulating film 1004 formed by using a silicon oxide film or a silicon oxynitride film is etched when a source electrode 1001 and a drain electrode 1002 are formed by etching.
  • [0009]
    It the case of the top gate semiconductor device, when the glass substrate 1000 or the base film 1006 formed by using a silicon oxide film or a silicon oxynitride film is etched, an impurity such as sodium is diffused into a semiconductor film 1003 from the substrate 1000, so that characteristics are deteriorated.
  • [0010]
    In the case of the bottom gate semiconductor device (FIG. 7B), if the gate insulating film 1004 is etched when the source electrode 1001 and the drain electrode 1002 are formed by etching, the characteristics are not stable and causes a fault.
  • [0011]
    In consideration of the above situation, it is an object of the present invention to provide a semiconductor device in which a defect or a fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used for the channel formation region, and a ZnO film to which an n-type or p-type impurity is added is used for the source electrode and the drain electrode.
  • [0012]
    An aspect of a semiconductor device of this invention has an Al film or an Al alloy film over a silicon oxide film or a silicon oxynitride film, and a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film. “A silicon oxide film”, “a silicon oxynitride film”, “an Al film”, “an Al alloy film” and “a ZnO film” in this specification means a film containing silicon oxide, a film containing silicon oxynitride, a film containing Al, a film containing Al alloy, a film containing ZnO, respectively.
  • [0013]
    An aspect of a semiconductor device of this invention has a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.
  • [0014]
    An aspect of a semiconductor device of this invention has an Al film or an Al alloy film over a silicon oxide film or a silicon oxynitride film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, a ZnO semiconductor film over the silicon oxide film or the silicon oxynitride film and the ZnO film to which an n-type or p-type impurity is added, a gate insulating film over the ZnO semiconductor film, and a gate electrode over the gate insulating film.
  • [0015]
    An aspect of a manufacturing method of a semiconductor device of this invention has the steps of: forming a silicon oxide film or a silicon oxynitride film; forming an Al film or an Al alloy film over the silicon oxide film or the silicon oxynitride film; forming a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, wherein the ZnO film to which an n-type or p-type impurity is added is etched to have an island-like shape by a first etching, and the Al film or the Al alloy film is etched to have an island-like shape by a second etching.
  • [0016]
    An aspect of a manufacturing method of a semiconductor device of this invention, wherein a ZnO semiconductor film is formed over the ZnO film to which an n-type or p-type impurity is added, and the silicon oxide film or the silicon oxynitride film after the second etching.
  • [0017]
    In the case of the bottom gate semiconductor device, a gate insulating film formed by using the silicon oxide film or the silicon oxynitride film is formed over the gate electrode after forming a gate electrode.
  • [0018]
    In the case of the top gate semiconductor device, a gate insulating film is formed and a gate electrode is formed after the ZnO semiconductor film is formed.
  • [0019]
    A first etching of this invention may be wet etching.
  • [0020]
    A first etching of this invention may be wet etching using buffered fluoric acid.
  • [0021]
    A first etching of this invention may be dry etching.
  • [0022]
    A first etching of this invention may be dry etching using CH4 (methane) gas
  • [0023]
    A second etching of this invention may be wet etching.
  • [0024]
    A second etching of this invention may be wet etching using developing solution for a photoresist.
  • [0025]
    A second etching of this invention may be wet etching using an organic alkaline solution.
  • [0026]
    A second etching of this invention may be wet etching using TMAH (tetramethylammonium hydroxide).
  • [0027]
    An aspect of a semiconductor device of this invention has a gate electrode, a gate insulating film over the gate electrode, a first film comprising metal material over the gate insulating film, a second film comprising a transparent semiconductor material and an n-type or p-type impurity over the first film, and a third film comprising the transparent semiconductor material over the second film and the gate insulating film.
  • [0028]
    An aspect of a semiconductor device of this invention has an insulating film over a substrate, a first film comprising a metal material over the insulating film, a second film comprising a transparent semiconductor material and an n-type or p-type impurity over the metal film, a third film comprising the transparent semiconductor material over the insulating film and the second film, a gate insulating film over the third film, and a gate electrode over the gate insulating film.
  • [0029]
    An aspect of a manufacturing method of a semiconductor device of this invention has the steps of: forming an insulating film over a substrate, forming a first film comprising a metal material over the insulating film, forming a second film comprising a transparent semiconductor material and an n-type or p-type impurity over the first film, etching the second film, and etching the first film.
  • [0030]
    An aspect of a manufacturing method of a semiconductor device of this invention has the steps of: forming a gate electrode over a substrate, forming a gate insulating film over the gate electrode, forming a first film comprising a metal material over the gate insulating film, forming a second film comprising a transparent semiconductor material and an n-type or p-type impurity over second film, etching the second film, and etching the first film.
  • [0031]
    In the top gate semiconductor device, a base film formed by using a glass substrate, a silicon oxide film or a silicon oxynitride film is not etched, and an impurity such as sodium is not diffused from a substrate into a semiconductor film so that its characteristics are not deteriorated.
  • [0032]
    In the bottom gate semiconductor device, the gate insulating film is not etched and its characteristics do not become unstable.
  • [0033]
    Since Al is used for a part of the source electrode and drain electrode, low resistance of a wire can be obtained.
  • BRIEF DESCRIPTION OF DRAWINGS
  • [0034]
    In the accompanying drawings:
  • [0035]
    FIGS. 1A and 1B show semiconductor devices of this invention;
  • [0036]
    FIGS. 2A to 2D show manufacturing steps of a semiconductor device of this invention;
  • [0037]
    FIGS. 3A to 3D show manufacturing steps of a semiconductor device of this invention;
  • [0038]
    FIGS. 4A and 4B show manufacturing steps of a semiconductor device of this invention;
  • [0039]
    FIGS. 5A to 5D show manufacturing steps of a semiconductor device of this invention;
  • [0040]
    FIGS. 6A to 6C show manufacturing steps of a semiconductor device of this invention;
  • [0041]
    FIGS. 7A and 7B show conventional examples;
  • [0042]
    FIGS. 8A and 8B show a manufacturing step of a liquid crystal display device;
  • [0043]
    FIGS. 9A and 9B show manufacturing steps of a liquid crystal display device;
  • [0044]
    FIGS. 10A and 10B show manufacturing steps of a light-emitting device;
  • [0045]
    FIGS. 11A and 11B show manufacturing steps of a light-emitting device;
  • [0046]
    FIGS. 12A to 12F each show an equivalent circuit of a light-emitting device;
  • [0047]
    FIG. 13 shows an equivalent circuit of a light-emitting device;
  • [0048]
    FIG. 14A illustrates a top front view of a pixel portion and FIG. 14B illustrates an equivalent circuit of a light-emitting device;
  • [0049]
    FIGS. 15A to 15E each show an example of an electronic apparatus to which this invention is applied; and
  • [0050]
    FIG. 16 shows an example of electronic apparatuses to which this invention is applied.
  • [0051]
    The embodiments of this invention will be described hereinafter referring to the accompanying drawings. Note that this invention is not limited to the description below, and it is easily understood by those skilled in the art that the embodiments and details herein disclosed can be modified in various ways without departing from the purpose and the scope of the invention. Therefore, this invention should not be interpreted as being limited to the description of the embodiments to be given below.
  • BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1
  • [0052]
    Here, a bottom gate semiconductor device is described.
  • [0053]
    FIG. 1A is a cross-sectional view in which one example of the embodiment of this invention is shown. In FIG. 1A, numeral reference 1 denotes a substrate, 3 denotes a gate electrode, 5 denotes a gate insulating film, 10 denotes a source electrode, 10 a denotes a first conductive film, 10 b denotes a second conductive film, 11 denotes a drain electrode, 11 a denotes a first conductive film, 11 b denotes a second conductive film, and 13 denotes a semiconductor film. An insulating film for passivation or planarization may be formed over the semiconductor film 13.
  • [0054]
    The gate electrode 3 is formed over the substrate 1, the gate insulating film 5 is formed over the gate electrode 3, and the source electrode 10 and the drain electrode 11 are formed over the gate insulating film 5. The source electrode 10 is formed of a layered film having the first conductive film 10 a and the second conductive film 10 b, and the drain electrode 11 is formed of a layered film having the first conductive film 11 a and the second conductive film 11 b. A third conductive film may be formed between the first conductive film 10 a and the second conductive film 10 b, or between the first conductive film 11 a and the second conductive film 11 b. The source electrode 10 and the drain electrode 11 may be each formed so as to overlap partially with the gate electrode 3 through the gate insulating film 5. The semiconductor film 13 is formed over the source electrode 10 and the drain electrode 11 over the gate insulating film 5.
  • [0055]
    Hereinafter, each structure is described.
  • [0056]
    (1) Substrate
  • [0057]
    The following can be used for forming a substrate: a substrate formed by using a glass substrate; an insulating material such as alumina; and a plastic substrate which can resist a processing temperature in post-steps; and the like. In the case of using a plastic substrate for the substrate 1, the following can be used: PC (polycarbonate); PES (polyethersulfone); PET (polyethylene terephthalate); PEN (polyethylene naphthalate); or the like. In the case of the plastic substrate, an inorganic layer or an organic layer may be provided as a gas barrier layer over the surface. In the case where a prominence due to dust or the like which is generated on the substrate in the manufacturing process of the plastic substrate, the substrate may be used after polishing it with CMP or the like to make its surface planarized. An insulating film such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (X>Y), and silicon nitride oxide (SiNxOy) (X>Y) may be formed over the substrate 1 for preventing an impurity or the like from diffusing from the substrate side.
  • [0058]
    (2) Gate Electrode
  • [0059]
    A gate electrode can be formed by using an Al (aluminum) film, a W (tungsten) film, a Mo (molybdenum) film, a Ta (tantalum) film, a Cu (copper) film, a Ti (titanium) film, an alloy material containing the elements as a main component (for example, an Al alloy film, a MoW (molybdenum tungsten) alloy film), or the like. A semiconductor film represented by a polycrystalline silicon film doped with an impurity element such as P (phosphourus) may be used. The gate electrode 3 may be a single layer or a layered film in which two or more layers are stacked.
  • [0060]
    (3) Gate Insulating Film
  • [0061]
    The gate insulating film 5 is formed by using an insulating film containing silicon as a main component, for example, silicon oxide film, and silicon oxynitride film. In addition, it may be a single layer or a layered film.
  • [0062]
    (4) Source Electrode and Drain Electrode
  • [0063]
    The source electrode 10 is formed with a layered film of the first conductive film 10 a and the second conductive film 10 b, and the drain electrode 11 is formed with a layered film of the first conductive film 11 a and the second conductive film 11 b.
  • [0064]
    As the first conductive film, an Al film, an Al alloy film such as an AlNi (aluminum nickel) film, and an AlNd (neodymium aluminum) film can be used. As the second conductive film, ZnO (zinc oxide) to which a p-type or n-type impurity of B (boron), Al (aluminum), Ga (gallium), P (phosphorus), or As (arsenic) is added can be used. A metal film such as a Ti film may be provided as a third conductive film between the first conductive film and the second conductive film.
  • [0065]
    (5) Semiconductor Film
  • [0066]
    A ZnO film is used as a semiconductor film. Since the source electrode and the drain electrode contacted with the semiconductor film have the ZnO film to which a p-type or n-type impurity is added, they can be easily connected with the semiconductor film.
  • [0067]
    (6) Insulating Film
  • [0068]
    An insulating film such as a passivation film and a planarization film may be formed over the semiconductor film 13, although not shown. Silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x>y), silicon nitride oxide (SiNxOy) (x>y), a SOG (spin-on-glass) film, or an organic resin film of acryl, or a layered film of those can be used.
  • [0069]
    In the bottom gate semiconductor device, a gate insulating film is not etched in manufacturing process, and characteristics do not become unstable. Al is used for a part of the source electrode and the drain electrode, thereby achieving lower resistance of a wire.
  • Embodiment 2
  • [0070]
    Here, a top gate semiconductor device is described.
  • [0071]
    FIG. 1B is a cross-sectional view showing one example of an embodiment of this invention. In FIG. 1B, numeral reference 1 denotes a substrate, 20 denotes an insulating film, 25 denotes a source electrode, 25 a denotes a first conductive film, 25 b denotes a second conductive film, 26 denotes a drain electrode, 26 a denotes a first conductive film, 26 b denotes a second conductive film, 27 denotes a semiconductor film, 28 denotes a gate insulating film, and 29 denotes a gate electrode. An insulating film for passivation or planarization may be formed over the gate electrode.
  • [0072]
    The insulating film 20 is formed on the substrate 1, and the source electrode 25 and the drain electrode 26 are formed over the insulating film 20. The source electrode 25 is formed with a layered film of the first conductive film 25 a and the second conductive film 25 b, and the drain electrode 26 is formed with a layered film of the first conductive film 26 a and the second conductive film 26 b. A third conductive film may be formed between the first conductive film 25 a and the second conductive film 25 b, or between the first conductive film 26 a and the second conductive film 26 b. The semiconductor film 27 is formed over the source electrode 25 and the drain electrode 26 over the insulating film 20, the gate insulating film 28 is formed over the semiconductor film 27, and the gate electrode 29 is formed over the gate insulating film 28. The gate electrode 29 may be formed so as to partially overlap with the source electrode and the drain electrode with the gate insulating film 28 and the semiconductor film 27 interposed therebetween.
  • [0073]
    Here, each structure is described.
  • [0074]
    For the substrate, the source electrode, the drain electrode, the semiconductor film, and the gate electrode, the same ones described in Embodiment 1 can be used.
  • [0075]
    (1) Insulating Film Over Substrate
  • [0076]
    An silicon oxide film or a silicon oxynitride film is formed as the insulating film 20 for preventing an impurity or the like from diffusing from the substrate side over the substrate 1. In addition, it may be a single layer or a layered film.
  • [0077]
    (2) Gate Insulating Film
  • [0078]
    The gate insulating film 28 is formed by using an insulating film containing silicon as a main component, for example, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, and a silicon nitride film. In addition, it may be a single layer or a layered film.
  • [0079]
    (3) Insulating Film Over Gate Electrode
  • [0080]
    An interlayer insulating film such as a passivation film and a planarization film may be formed over the gate electrode 29, although not shown. A SiOx film, a SiNx film, a SiON film, SiNO film, an SOG (spin-on-glass) film, and an organic resin film of acrylic or a layered film of those can be used.
  • [0081]
    In the top gate semiconductor device, the substrate or the base film formed by using a silicon oxide film or a silicon oxynitride film is not etched, so that an impurity such as sodium is not diffused into the semiconductor film from the substrate and the characteristics are not deteriorated. Al is used for a part of the source electrode and the drain electrode, thereby achieving lower resistance of a wire.
  • Embodiment 3
  • [0082]
    A manufacturing method of the bottom gate semiconductor device is described, in which a silicon oxide film or a silicon oxynitride film is formed as a gate insulating film over the gate electrode, an Al film or an Al alloy film is formed as a first conductive film, and a ZnO film to which an n-type or p-type impurity is added is formed as a second conductive film, and then, the second conductive film is etched to have an island-like shape by a first etching and the first conductive film is etched to have an island-like shape by a second etching to form source and drain electrodes, and a ZnO semiconductor film is formed.
  • [0083]
    As shown in FIG. 2A, a gate electrode 3 is formed. The thickness of the gate electrode may be 10 to 200 nm over a substrate 1. The substrate 1 may be formed by using the material shown in Embodiment 1. Here, a glass substrate is used.
  • [0084]
    An insulating film 2 containing silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x>y), silicon nitride oxide (SiNxOy) (x>y), or the like may be formed with a thickness of 10 to 200 nm by CVD or sputtering so as to prevent impurity or the like from diffusing from the substrate side (FIG. 2B).
  • [0085]
    The insulating film 2 may be formed by processing the surface of the substrate 1 with high density plasma. For example, the high density plasma can be generated using a microwave of 2.45 GHz, and it is only required that electron density ranges from 11011 to 11013/cm3, and electron temperature is 2 eV or less. Such high density plasma has a low kinetic energy of active species and a film with fewer defects can be formed with less damage caused by plasma compared to a conventional plasma treatment.
  • [0086]
    The surface of the substrate 1 can be nitrided by the high density plasma treatment under a nitriding atmosphere such as an atmosphere containing nitrogen and a noble gas, an atmosphere containing nitrogen, hydrogen and a noble gas, and an atmosphere containing ammonia and a noble gas. In the case where a glass substrate is used as the substrate 1 subjected to a nitriding treatment by the high density plasma, as a nitride film formed over the surface of the substrate 1, the insulating film 2 containing silicon nitride as a main component can be formed. The insulating film 2 may be formed by using a plurality of layers in which a silicon oxide film or a silicon oxynitride film is formed by plasma CVD over the nitride film.
  • [0087]
    In addition, a nitride film can be formed by nitriding over the surface of the insulating film 2 with high density plasma similarly.
  • [0088]
    The nitride film formed by nitriding with high density plasma can suppress diffusion of impurity from the substrate 1.
  • [0089]
    The gate electrode 3 can be formed by using materials shown in Embodiment 1. Here, an AlNd (aluminum neodymium) film is formed by sputtering using an AlNd target and processed into an island-like shape. A photolithography method is used for processing the film into an island-like shape, and dry etching or wet etching is used.
  • [0090]
    After cleaning the surface of the gate electrode 3 and the surface of the substrate 1 or the insulating film 2, a gate insulating film 5 is formed with a thickness of 10 to 200 nm using a known CVD or sputtering over the gate electrode 3 (FIGS. 2A and 2B). The surface cleaning step and the formation step of the gate insulating film 5 may be carried out continuously without being exposed to air. In the case where an Al film is used for the gate electrode 3, when the gate insulating film 5 is formed at a high temperature, a hillock is generated in some cases. Thus, it is preferable to form the film at a low temperature of 500 C. or less, preferably 350 C. or less.
  • [0091]
    The gate insulating film 5 can be formed by using the material shown in Embodiment 1. Here, a silicon oxide film is formed. Note that the insulating film 2 is omitted in the drawings below.
  • [0092]
    A first conductive film 6 for source and drain electrodes is formed with a thickness of 10 to 200 nm on the gate insulating film 5. The first conductive film 6 can be formed by using the material shown in Embodiment 1. Here, an AlNi (aluminum nickel) film or an AlNd film is used. The first conductive film 6 can be formed by sputtering using an AlNi target or an AlNd target. After forming the gate insulating film 5, the first conductive film 6 may be formed continuously without being exposed to the air.
  • [0093]
    A second conductive film 7 is formed with a thickness of 10 to 200 nm on the first conductive film 6 (FIG. 2C). The second conductive film 7 can be formed by using the material shown in Embodiment 1. Here, ZnO (zinc oxide) to which an impurity such as Al or Ga is added is used. Consequently, an ohmic contact can be easily created between the second conductive film 7 and a ZnO film which is formed as a semiconductor layer later. The second conductive film 7 can be formed by sputtering. For example, the following methods can be used for adding Al or Ga: sputtering using a ZnO target to which 1 to 10 weight % of Al or Ga is added; or sputtering in which an Al or Ga chip is mounted on a ZnO target at 200 to 300 C.
  • [0094]
    After forming the first conductive film 6, the second conductive film 7 may be formed continuously without being exposed to the air. Therefore, formation from the gate insulating film 5 to the second conductive film 7 may be continuously carried out without being exposed to air.
  • [0095]
    A third conductive film 8 may be formed with a thickness of 10 to 200 nm between the first conductive film 6 and the second conductive film 7 (FIG. 2D). A contact resistance is occasionally increased between the first conductive film 6 and the second conductive film 7 depending on a heat treatment temperature in a manufacturing process. However, the contact resistance can be reduced between the first conductive film 6 and the second conductive film 7 by forming the third conductive film 8. The third conductive film 8 can be formed by using a metal film such as a Ti film which is formed by sputtering or the like.
  • [0096]
    A resist mask 9 is formed over the second conductive film 7, and the second conductive film 7 is etched (FIGS. 3A and 3B). In the case of using wet etching, buffered fluoric acid (in which HF (hydrofluoric acid) and NH4F (ammonium fluoride) are mixed), for example, solution with a ratio of HF:NH4F (weight ratio)=1:100 to 1:10 is used.
  • [0097]
    In the case of using dry etching, anisotropic plasma etching using CH4 gas can be used.
  • [0098]
    Under the second conductive film 7, the first conductive film 6 is formed. Thus, the first conductive film 6 serves as an etching stopper when the second conductive film 7 is etched. Consequently, source and drain electrodes can be formed without damaging the gate insulating film 5 in etching.
  • [0099]
    A part of the first conductive film 6 may be etched when the second conductive film 7 is etched. However, attention is required to be paid so as not to totally etch the first conductive film 6 because the gate insulating film is damaged if the first conductive film 6 is totally etched.
  • [0100]
    Next, a source electrode 10 and a drain electrode 11 are formed by etching the first conductive film 6 using the resist mask 9 (FIG. 3C). In this invention, the first conductive film 6 is etched using an organic alkaline solution represented by TMAH (tetramethylammonium hydroxide), which is a developer for a photoresist.
  • [0101]
    In the case of using an AlNi film for the first conductive film 6 and TMAH for etching solution, the etching ratio is approximately 300 nm/min at 30 C. On the other hand, the second conductive film 7 or the gate insulating film 5 to which the above-mentioned material is used is not etched with TMAH. Consequently, the source electrode 10 and the drain electrode 11 can be formed without damaging the gate insulating film 5. Further, the island-like shaped second conductive films 10 b and 11 b are not reduced in size. In this invention, the first conductive film 6 can be etched using a developer which is used when a resist mask is formed without using a special etching solution. Consequently, cost is reduced and efficiency is increased.
  • [0102]
    The resist mask 9 is removed after forming the source electrode 10 and the drain electrode 11.
  • [0103]
    A ZnO film is formed as a semiconductor film 12 with a thickness of 20 to 200 nm by sputtering over the source electrode 10, the drain electrode 11, and the gate insulating film 5 (FIG. 3D). For example, the film can be formed by sputtering using a ZnO target with a flow ratio of oxygen/argon ranging from 30 to 20, at 200 to 300 C.
  • [0104]
    The semiconductor film 12 is etched by a photolithography method to form an island-like shaped semiconductor film 13 (FIG. 4A). A wet etching method using a buffered fluoric acid or anisotropic dry etching method using CH4 gas can be used.
  • [0105]
    Zno is commonly used in the semiconductor film 12 and the second conductive films 10 b and 11 b, and it is difficult to obtain a sufficient etching selectivity. However, since the second conductive film 7 is required to be formed in a portion in contact with the semiconductor film 12, the second conductive film 7 may be etched in a portion out of contact with the semiconductor film 12, for example, a wire portion. In the above-mentioned etching method, the second conductive films 10 b and 11 b may be etched, but the first conductive films 10 a and 11 a are not etched. Consequently, the first conductive films 10 a and 11 a serve as wires, and the electrical connection with the semiconductor device is ensured.
  • [0106]
    An insulating film 14 is formed with a thickness of 50 nm to 1 μm over a semiconductor film 13 by CVD or sputtering (FIG. 4B). An insulating film containing silicon as a main component can be formed as the insulating film 14. An organic resin film or the like may be stacked over the insulating film containing silicon. The insulating film 14 functions as a planarization film or a passivation film. Since Al is included in the source electrode 10 and the drain electrode 11, a hillock is occasionally generated when the insulating film 14 is formed at high temperature. Thus, it is preferably formed at low temperature, 500 C. or less, preferably 350 C. or less.
  • [0107]
    Contact holes are formed in the insulating film 14, and conductive films in contact with the gate electrode 3, the source electrode 10, and the drain electrode 11 are provided if necessary.
  • [0108]
    According to this invention, a semiconductor device can be formed without damaging the gate insulating film. An Al alloy film such as an AlNi film is used as the first conductive film, thereby achieving lower resistance of the wire.
  • Embodiment 4
  • [0109]
    Here, a manufacturing method of a top gate semiconductor device is described, in which an Al film or an Al alloy film is formed as a first conductive film on a silicon oxide film or a silicon oxynitride film, and a ZnO film to which an n-type or p-type impurity is added is formed as a second conductive film, and then, the second conductive film is formed to have an island-like shape by a first etching, the first conductive film is formed to have an island-like shape by a second etching to form source and drain electrodes, a ZnO semiconductor film is formed, a gate insulating film is formed, and a gate electrode is formed. Note that it is needless to say that materials and methods for manufacture described in Embodiments 1 to 3 can be applied to those used for the present embodiment.
  • [0110]
    As shown in FIG. 5A, a silicon oxide (SiOx) film is formed as an insulating film 20 over a substrate 1 with a thickness of 10 to 200 nm by CVD or sputtering. The insulating film 20 prevents impurity or the like from diffusing from the substrate 1 side.
  • [0111]
    A first conductive film 21 for the source and drain electrodes is formed with a thickness of 10 to 200 nm by sputtering or evaporation over the insulating film 20. An Al alloy film such as AlNi (aluminum nickel) film which is shown in Embodiment 1 can be used as the first conductive film 21. After forming the insulating film 20, the first conductive film 21 may be formed continuously without being exposed to the air.
  • [0112]
    A second conductive film 22 is formed with a thickness of 10 to 200 nm by sputtering on the first conductive film 21 (FIG. 5A). As the second conductive film 22, ZnO (zinc oxide) to which a p-type or n-type impurity such as B (boron), Al (aluminum), Ga (gallium), P (phosphourus), or As (arsenic) is added can be used. After forming the first conductive film 21, the second conductive film 22 may be formed continuously without being exposed to the air. Therefore, the steps of forming the insulating film 20 to the second conductive film 22 may be carried out continuously without being exposed to the air.
  • [0113]
    A metal film such as a Ti film may be formed as a third conductive film 23 with a thickness of 10 to 200 nm by sputtering between the first conductive film 21 and the second conductive film 22 in order to reduce the contact resistance between the first conductive film 21 and the second conductive film 22 (FIG. 5B).
  • [0114]
    A resist mask 24 is formed over the second conductive film 22, and the second conductive film 22 is etched (FIG. 5C). Wet etching using buffered fluoric acid or dry etching using CH4 gas can be used as an etching method.
  • [0115]
    The first conductive film 21 is formed under the second conductive film 22. Therefore, the first conductive film 21 serves as an etching stopper when the second conductive film 22 is etched. Thus, the source and drain electrodes can be formed without exposing the substrate 1 by etching the insulating film 20.
  • [0116]
    When the second conductive film 22 is etched, a part of the first conductive film 21 may be etched. Note that if all of the first conductive film 21 is etched, the insulating film 20 is etched and the substrate 1 is exposed, which would cause diffusion of impurity included in the substrate 1.
  • [0117]
    The first conductive film 21 is etched to form the source electrode 25 and the drain electrode 26 (FIG. 5D). Wet etching using a developer for a photoresist, TMAH is used as an etching method. Thus, the source electrode 25 and the drain electrode 26 can be formed without etching the insulating film 20. Further, the sizes of the island-like shaped second conductive films 25 b and 26 b are not reduced because the ZnO film is not etched by TMAH. Etching can be performed with a developer which is used in formation of a resist mask without a special etching solution for the first conductive film 21, which leads to cost reduction and improvement in efficiency.
  • [0118]
    After forming the source electrode 25 and the drain electrode 26, the resist mask 24 is removed.
  • [0119]
    A ZnO film is formed with a thickness of 20 to 200 nm by sputtering as the semiconductor film 27 over the source electrode 25, the drain electrode 26, and the insulating film 20 (FIG. 6A).
  • [0120]
    The semiconductor film 27 is etched by a photolithography method to make an island-like shaped semiconductor film 27. Wet etching using buffered fluoric acid or dry etching using CH4 gas can be used as an etching method.
  • [0121]
    ZnO is commonly used for the semiconductor film 27 and the second conductive films 25 b and 26 b, and it is difficult to obtain a high etching selectivity. However, the second conductive film may be etched in the portion out of contact with the semiconductor film 27, specially the wire portion, because the second conductive film 22 may be formed in the source and drain electrode portions, which is the same as Embodiment 3.
  • [0122]
    A gate insulating film 28 is formed with a thickness of 10 to 200 nm by CVD or sputtering over the semiconductor film 27 (FIG. 6B). The semiconductor film 27 may be subjected to a high density plasma treatment shown in the above-mentioned Embodiment to form a gate insulating film. The surface of the semiconductor film 27 can be nitrided by the high density plasma treatment under a nitriding atmosphere such as an atmosphere containing nitrogen and a noble gas; an atmosphere containing nitrogen, hydrogen, and a noble gas; and an atmosphere containing ammonia and a noble gas.
  • [0123]
    The gate insulating film 28 may be formed by using an insulating film containing silicon as a main component, for example, a silicon oxide film, a silicon oxynitride film, a silicon nitride film, and a silicon nitride oxide film. In addition, it may be a single layer or a layered film.
  • [0124]
    A gate electrode 29 is formed over the gate insulating film 28 (FIG. 6B). The gate electrode 29 can be formed by using the material shown in the above-mentioned embodiment, and may be a single layer or a layered film including two or more layers. A known CVD sputtering, evaporation, or the like can be employed as a method for film formation. Dry etching or wet etching method can be used for processing the gate electrode 29 into an island-like shape with a photolithography method.
  • [0125]
    An insulating film 30 is formed with a thickness of 50 nm to 1 μm by CVD or sputtering over the gate electrode 29 and the gate insulating film 28 (FIG. 6C). The insulating film 30 can be formed by using an insulating film containing silicon. An organic resin film or the like may be stacked over the insulating film containing silicon. The insulating film 30 functions as a planarization film or a passivation film. Since Al is included in the source electrode 25 and the drain electrode 26, a hillock is occasionally generated when the gate insulating film 28, the gate electrode 29, and the insulating film 30 are formed at a high temperature. Thus, they are preferably formed at a low temperature, at 500 C. or less, preferably 350 C. or less.
  • [0126]
    As described above, this invention can prevent an impurity from diffusing due to an exposure of the substrate 1. An Al alloy film such as an AlNi film is used as the first conductive film, thereby achieving lower resistance of a wire.
  • Embodiment 5
  • [0127]
    Here, a description is made of a method of manufacturing a liquid crystal display device using a bottom gate semiconductor device which is shown in Embodiments 1 and 3 referring to FIGS. 8A and 8B and 9A and 9B. Note that it is needless to say that the top gate semiconductor device which is shown in Embodiments 2 and 4 can be applied. FIGS. 8A and 9A show cross-sectional views taken along line X-Y in FIG. 8B.
  • [0128]
    A gate wire 40 and an auxiliary capacitor wire 41 are formed over a glass substrate or a plastic substrate 1. An AlNd film is formed by sputtering, and then, formed by known photolithography method and etching.
  • [0129]
    A gate insulating film 42 formed by using a silicon oxide film or a silicon oxynitride film is formed by CVD or sputtering.
  • [0130]
    An AlNi film is formed as a first conductive film by sputtering over the gate insulating film 42. The first conductive film forms a source electrode 45 a, a drain electrode 46 a and a source wire 47 later.
  • [0131]
    A ZnO (zinc oxide) film to which Al is added is formed as a second conductive film by sputtering over the first conductive film. The second conductive film forms a source electrode 45 b, a drain electrode 46 b, and a source wire 47 later.
  • [0132]
    A resist mask is formed in a region which is to be a source electrode portion, a drain electrode portion, and a source wire portion, over the second conductive film (not shown in the figure). Then, the second conductive film is etched. Here, etching is performed using buffered fluoric acid and a solution of HF:NH4F=1:100 (weight ratio).
  • [0133]
    Next, the first conductive film is etched using TMAH solution to form the source electrode 45 a, the drain electrode 46 a, and the source wire 47. After that, the resist mask is removed. Then, the source electrode 45, the drain electrode 46, and the source wire 47 can be formed without damaging the gate insulating film 42. In addition, since the ZnO film is not etched by TMAH, the size of the island-like shaped second conductive film is not reduced. Further, since an AlNi film is used for the first conductive film, the resistance of the source wire can be reduced.
  • [0134]
    Next, a semiconductor film 48 is formed. A ZnO film is formed by sputtering, and then, the semiconductor film 48 is formed from the ZnO film by a photolithography method and etching. Wet etching using buffered fluoric acid is used as etching. The portion of the second conductive film out of contact with the semiconductor film 48 may be partially removed here, because the first conductive film is formed in a portion to be a wire.
  • [0135]
    An insulating film 49 is formed by CVD, sputtering, coating, or the like over the semiconductor film 48. The insulating film 49 can be formed by using a layered film having an insulating film containing silicon, an organic resin film, or the like. The insulating film 49 may be a film which makes the unevenness of the surface planarized.
  • [0136]
    A contact hole leading to the drain electrode 46 and a contact hole for the auxiliary capacitor are formed in the insulating film 49 using a photolithography method and an etching method.
  • [0137]
    A transparent conductive film is formed by sputtering, and then, a pixel electrode 50 is formed using a photolithography method and etching. For example, ITO (Indium Tin Oxide), ITSO (Indium Tin Oxide containing silicon oxide), or IZO (Indium Zinc Oxide) may be used.
  • [0138]
    In the case of a reflective liquid crystal display device, a light reflective metal material such as Ag (silver), Au (gold), Cu (copper), W (tungsten), or Al (aluminum) is formed instead of a transparent electrode.
  • [0139]
    The portion where the pixel electrode 50 and the auxiliary capacitor wire 41 are overlapped forms an auxiliary capacitor 100 which is formed of the pixel electrode 50, the gate insulating film 42, and the auxiliary capacitor wire 41 (FIGS. 8A and 8B).
  • [0140]
    A corner of a bent portion or a portion where width changes may be smoothed and rounded in a wire and an electrode. A shape of a chamfered corner can be realized by using a photomask pattern manufactured using a pattern of photomask. This will have advantages described below. When dry etching using plasma is performed, generation of fine particles due to abnormal discharge can be suppressed by chamfering a projecting portion. Even though the fine particles are generated, the fine particles can be prevented from accumulating at the corner at the time of cleaning, and the fine particles can be washed away by chamfering a concave portion. Thus, a problem of fine particles or dust in the manufacturing process can be solved and the yield can be improved.
  • [0141]
    An alignment film 51 is formed so as to cover the pixel electrode 50. The alignment film is formed by a droplet discharge method, printing, or the like. After forming the alignment film, rubbing is conducted.
  • [0142]
    A color filter 55 is formed by using a colored layer and a light-shielding layer (black matrix), and a protective insulating film 54 is formed on an opposing substrate 56. A transparent electrode 57 is formed, and an alignment film 53 is formed on the protective insulating film 54 (FIG. 9A). The alignment film is subjected to a rubbing process.
  • [0143]
    Next, a closed pattern 75 of a sealant is formed by a droplet discharge method (FIG. 9B). A region surrounded by the sealant is filled with liquid crystal composition 52 (FIG. 9A).
  • [0144]
    After dropping the liquid crystal composition 52 in the closed pattern 75, the opposing substrate 56 and a substrate 1 in which a semiconductor device is formed are attached to each other. When the liquid crystal composition 52 is filled, the following alternative may be adopted: a seal pattern having an opening portion is provided on the substrate 1; the opposing substrate 56 and the substrate 1 are attached to each other; then, liquid crystal is injected using capillary action.
  • [0145]
    As an alignment mode of the liquid crystal composition 52, TN mode in which the alignment of liquid crystal molecules is twisted at 90 from the side of light incidence to the side of light emission, FLC mode, IPS mode, or the like can be used. Note that an electrode pattern is different from one shown in FIG. 8B and is a comb-like shape in the case of the IPS mode.
  • [0146]
    Polarizing plates are attached to both of the opposing substrate 56 and the substrate 1 on which the semiconductor device is formed. In addition, an optical film can be attached if required.
  • [0147]
    The distance between the opposing substrate 56 and the substrate 1 on which the semiconductor device is formed may be kept by dispersing spherical spacers or forming a columnar spacer formed of a resin, or by mixing fillers in the sealant. The aforementioned columnar spacer is formed of an organic resin material containing at least one of acrylic, polyimide, polyimide amide, or epoxy as a main component, or an inorganic material having one of silicon oxide, silicon nitride and silicon oxide containing nitrogen, or a layered film thereof.
  • [0148]
    Then, an FPC (Flexible Printed Circuit) is attached to the substrate 1 with an anisotropic conductive layer interposed therebetween using a known technique.
  • [0149]
    A peripheral driver circuit may be formed over the substrate. A plane exemplary diagram is shown in FIG. 9B.
  • [0150]
    A gate wire driver circuit 62, a source wire driver circuit 63, and an active matrix portion 64 are formed over a substrate 61 formed of glass or the like. The gate wire driver circuit 62 is constituted from at least a shift register 62 a and a buffer 62 b. The source wire driver circuit 63 is constituted from at least a shift register 63 a, a buffer 63 b, and an analog switch 69 which samples video signals transmitted via video lines 68. A plurality of gate wires 72 extended from the gate wire driver circuit 62 is arranged in parallel with each other in the active matrix portion 64. A plurality of source wires 71 extended from the source wire driver circuit 63 is arranged orthogonally to the gate wires 72. In addition, an auxiliary capacitor wire 73 is arranged in parallel with the gate wires 72. In addition, a semiconductor device 65, a liquid crystal portion 66, and an auxiliary capacitor 67 are provided in a region surrounded by the gate wire 72, the source wires 71, and the auxiliary capacitor wire 73.
  • [0151]
    The gate wire driver circuit 62, the source wire driver circuit 63, and the analog switch 69 are provided with a semiconductor device manufactured by the same manufacturing method as the semiconductor device 65 to have a similar structure.
  • [0152]
    In the semiconductor device 65, a gate electrode is connected to the gate wire 72, and the source electrode is connected to the source wire 71. A liquid crystal portion 66 is formed by introducing a liquid crystal to be sealed between a pixel electrode connected to the drain electrode of the semiconductor device 65 and an opposing electrode over the opposing substrate. The auxiliary capacitor wire 73 is connected to an electrode having the same potential as the opposing electrode.
  • [0153]
    In the aforementioned liquid crystal display device, the gate insulating film is not etched and the characteristics do not become unstable, and thus, high reliability is realized. In the case of using a top gate semiconductor device, a glass substrate or a base film formed by using, a silicon oxide film or a silicon oxynitride film is not etched, so that impurity such as sodium is not diffused into a semiconductor film from the substrate and the characteristics are not deteriorated, and thus, high reliability can be realized.
  • [0154]
    Al is used for a part of the source electrode and the drain electrode, thereby achieving lower resistance of a wire.
  • Embodiment 6
  • [0155]
    Here, a description is made of a method for manufacturing a light-emitting device with using the bottom gate semiconductor device shown in Embodiments 1 and 3 referring to FIGS. 10A and 10B and 11A and 11B. Note that it is needless to say that the semiconductor device of Embodiments 2 and 4 can be applied.
  • [0156]
    The semiconductor device is manufactured based on the description of the aforementioned embodiment, and formation to the stage shown in FIG. 10A is carried out. Note that the same parts as those of the above embodiments are denoted by the same reference numerals.
  • [0157]
    In the EL display device, the pixel electrode 50 functions as an anode or a cathode. As the material for the pixel electrode 50, the following can be employed: a conductive metal such as aluminum (Al), silver (Ag), gold (Au), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium (Pd), lithium (Li), caesium (Cs), magnesium (Mg), calcium (Ca), strontium (Sr), or titanium (Ti); an alloy such as aluminum-silicon (Al—Si), aluminum-titanium (Al—Ti), or aluminum-silicon-copper (Al—Si—Cu); nitride of a metal material such as titanium nitride (TiN); a metal compound such as ITO, ITO containing silicon, or IZO.
  • [0158]
    An electrode from which light emitted from an EL layer is extracted is only required to be formed by using a light-transmitting conductive film, and a very thin film of metal such as Al or Ag may be used as well as a metal compound such as ITO, ITO containing silicon, or IZO.
  • [0159]
    When light-emission is extracted from an electrode which is opposed to the pixel electrode 50, a highly reflective material (Al, Ag, or the like) can be used for the pixel electrode 50. In this embodiment, ITSO, which means ITO containing silicon, is used as the pixel electrode 50 (FIG. 10A).
  • [0160]
    Next, an insulating film formed by using an organic material or an inorganic material is formed so as to cover the insulating film 49 and the pixel electrode 50. Then, the insulating film is processed to expose the pixel electrode 50 partially, thereby forming partition walls 81. As the material of the partition walls 81, a photosensitive organic material (such as acrylic or polyimide) is preferable. Alternatively, a non-photosensitive organic material or inorganic material may also be used. Further, the partition walls 81 may be used as a black matrix by coloring the partition walls 81 black in such a way that a black pigment or dye such as titanium black or carbon nitride is dispersed into the material of the partition wall 81 with the use of a dispersant. It is desirable that the partitions wall 81 have a tapered shape and those end surfaces 81 a toward the pixel electrode have curvatures changing continuously (FIG. 10B).
  • [0161]
    Next, a layer 82 including a light-emitting substance is formed, and an opposing electrode 83 which covers the layer 82 including a light-emitting substance is formed. Then, a light-emitting element with the layer 82 including a light-emitting substance interposed between the pixel electrode 50 and the opposing electrode 83 can be manufactured, and light-emission can be obtained by applying a voltage between the opposing electrode 83 and the pixel electrode 50.
  • [0162]
    As an electrode material used for forming the opposing electrode 83, a material similar to one which can be used for the pixel electrode can be used. In this embodiment, aluminum is used for a second electrode.
  • [0163]
    The layer 82 including a light-emitting substance is formed by evaporation, ink-jet, spin coating, dip coating, roll-to-roll method, sputtering, or the like.
  • [0164]
    In the case of an organic electroluminescent display device, the layer 82 including a light-emitting substance may be a layered film of layers having functions of hole transportation, hole injection, electron transportation, electron injection, or light-emission, respectively, or a single layer of a light-emitting layer. As a layer including a light-emitting substance, a single layer or a layered film of an organic compound may be used.
  • [0165]
    A hole injecting layer is provided between an anode and a hole transporting layer. As the hole injecting layer, a mixed layer of an organic compound and a metal oxide can be used. This prevents short circuit between the pixel electrode 50 and the opposing electrode 83 due to unevenness which is formed on the surface of the pixel electrode 50 or a foreign substance which is left on the surface of the electrode. The thickness of the mixed layer is preferably 60 nm or more, more preferably 120 nm or more. Since increase in thickness of a film does not cause increase in driving voltage, the thickness of the film can be selected such that the influence of the unevenness or foreign substance can be covered sufficiently. Thus, a dark spot is not generated, and driving voltage or power consumption is not increased in the light-emitting device manufactured by this invention.
  • [0166]
    An oxide or a nitride of transition metal is preferable as a metal oxide, concretely, zirconium oxide, hafnium oxide, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, molybdenum oxide, tungsten oxide, titanium oxide, manganese oxide, and rhenium oxide.
  • [0167]
    As an organic compound, the following can be employed: an organic material having an arylamino group such as 4,4′-bis[N-(1-napthyl)-N-phenylamino]biphenyl (NPB), 4,4′-bis[N-(3-methylphenyl]-N-phenylamino]biphenyl (TPD), 4,4′,4″-tris(N,N-diphenylamino)triphenylamine (TDATA), 4,4′,4″-tris[N-(3-methylphenyl)-N-phenylamino]triphenylamine (MTDATA), 4,4′-bis{N-[4-(N,N-di-m-tolylamino)phenyl]-N-phenylamino}biphenyl (DNTPD), 1,3,5-tris[N,N-di(m-tolyl)amino]benzene (m-MTDAB), and 4,4′,4″-tris(N-carbazolyl) triphenylamine (TCTA); phthalocyanine (H2Pc); copper phthalocyanine (CuPc); vanadyl phthalocyanine (VOPc); or the like.
  • [0168]
    The hole transporting layer is provided between the anode and a light-emitting layer, or between the hole injecting layer and the light-emitting layer when the hole injecting layer is provided. The hole transporting layer is formed by using a layer which has an excellent property of transporting a hole, for example, a layer formed by using a compound of aromatic amine (that is, having a benzene ring-nitrogen bond) such as NPB, TPD, TDATA, MTDATA, and BSPB. The substances mentioned here have the hole mobility of 110−6 to 10 cm2/Vs mainly. Note that a substance having higher transporting property of holes than electrons may be used as well as the materials. Note that the hole transporting layer may be formed by not only a single layer but also a layered film in which two or more layers formed from the above mentioned substances are stacked.
  • [0169]
    The light-emitting layer is provided between the anode and the cathode, or between the hole transporting layer and the electron transporting layer when the hole transporting layer and the electron transporting layer are provided. There is no particular limitation on the light-emitting layer; however, a layer serving as the light-emitting layer has two modes roughly. One is a host-guest type layer which includes a dispersed light-emitting substance in a layer formed of a material (host material) having a larger energy gap than an energy gap of a light-emitting substance (dopant material) which becomes a luminescent center, while the other is a layer in which a light-emitting layer is made of a light-emitting substance only. The former is preferable, because concentration quenching hardly occurs. As the light-emitting substance to be a luminescent center, the following can be employed: 4-dicyanomethylene-2-methyl-6-(1,1,7,7-tetramethyljulolidyl-9-enyl)-4H-pyran (DCJT); 4-dicyanomethylene-2-t-butyl-6-(1,1,7,7-tetramethyljulolidine-9-enyl)-4H-pyran; periflanthene; 2,5-dicyano-1,4-bis(10-methoxy-1,1,7,7-tetramethyljulolidine-9-enyl)benzene; N,N′-dimethylquinacridone (DMQd); coumarin 6; coumarin 545T; tris(8-quinolinolato)aluminum (Alq3); 9,9′-bianthryl; 9,10-diphenylanthracene (DPA); 9,10-bis(2-naphthyl)anthracene (DNA); 2,5,8,11-tetra-t-butylperylene (TBP); PtOEP; Ir(ppy)3; Btp2Ir(acac); FIrpic; or the like. As the base material to be a host material in the case of forming the layer in which the light-emitting substance is diffused, the following can be used: an anthracene derivative such as 9,10-di(2-naphtyl)-2-tert-butylanthracene (t-BuDNA); a carbazole derivative such as 4,4′-bis(N-carbazolyl)biphenyl (CBP); or a metal complex such as tris(8-quinolinolato)aluminum (Alq3), tris(4-methyl-8-quinolinolato)aluminum (Almq3); bis(10-hydroxybenzo[h]-quinolinato)beryllium (BeBq2); bis(2-methyl-8-quinolinolato)-4-phenylphenolato-aluminum (BAlq); bis[2-(2-hydroxyphenyl)pyridinato]zinc (Znpp2); or bis[2-(2-hydroxyphenyl)benzoxazolate]zinc (ZnBOX). As the material which can constitute the light-emitting layer only with a light-emitting substance, tris(8-quinolinolato)aluminum (Alq3), 9,10-bis(2-naphtyl)anthracene (DNA), bis(2-methyl-8-quinolinolato)-4-phenylphenolato-aluminum (BAlq), or the like can be used.
  • [0170]
    An electron transporting layer is provided between the light-emitting layer and the cathode, or between the light-emitting layer and an electron injecting layer when the electron injecting layer is provided. The electron transporting layer is a layer having an excellent electron transporting property, and for example, a layer formed using a metal complex having a quinoline skeleton or a benzoquinoline skeleton such as tris(8-quinolinolato)aluminum (Alq3), tris(5-methyl-8-quinolinolato)aluminum (Almq3), bis(10-hydroxybenzo[h]-quinolinato)beryllium (BeBq2), and bis(2-methyl-8-quinolinolato)-4-phenylphenolato-aluminum (BAlq). In addition, a metal complex having an oxazole ligand or a thiazole ligand such as bis[2-(2-hydroxyphenyl)-benzoxazolato]zinc (Zn(BOX)2), bis[2-(2-hydroxyphenyl)-benzothiazolato]zinc (Zn(BTZ)2), or the like can be used. In addition to the metal complexes, 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (PBD); 1,3-bis[5-(p-tert-butylphenyl)-1,3,4-oxadiazole-2-yl]benzene (OXD-7); 3-(4-tert-butylphenyl)-4-phenyl-5-(4-biphenylyl)-1,2,4-triazole (TAZ); 3-(4-tert-butylphenyl)-4-(4-ethylphenyl)-5-(4-biphenylyl)-1,2,4-triazole (p-EtTAZ); bathophenanthroline (BPhen); bathocuproine (BCP); or the like can be used. These substances mentioned here mainly have the electron mobility of 110−6 to 10 cm2/Vs. Note that other substance may be used for the electron transporting layer so long as it has a higher electron transporting property than a hole transporting property. Further, the electron transporting layer may be formed by not only a single layer but also a layered film in which two or more layers made from the above mentioned substances are stacked.
  • [0171]
    The electron injecting layer is provided between the cathode and the electron transporting layer. As the electron injecting layer, a compound of alkali metal or alkaline earth metal such as lithium fluoride (LiF), cesium fluoride (CsF), or calcium fluoride (CaF2) can be employed. In addition to that, a layer formed by using an electron transporting substance which contains alkali metal or alkaline earth metal, for example, Alq3 containing magnesium (Mg) or the like can be used.
  • [0172]
    In the case of an inorganic electroluminescent display device, one in which a fluorescent substance particles are diffused in dispersing agent for the layer 82 including a light-emitting substance can be used.
  • [0173]
    A fluorescent substance in which a donor impurity such as Cl (chlorine), I (iodine), or Al (aluminum) is added with Cu (copper) in ZnS can be used.
  • [0174]
    As the dispersing agent, the following can be employed: a polymer having a relatively high dielectric constant such as cyanoethyl cellulose based resin, polyethylene based resin, polypropylene based resin, polystyrene based resin, silicone resin, epoxy resin, vinylidene fluoride resin, or the like. The dielectric constant can be adjusted by mixing the resin and minute particles having high dielectric constant such as BaTiO3 (barium titanate) or SrTiO3 (strontium titanate). As a diffusing means, an ultrasonic diffusing machine or the like can be used.
  • [0175]
    A dielectric layer may be provided between the layer 82 including a light-emitting substance and one of the electrodes. For the dielectric layer, a highly dielectric and insulating material which has a high dielectric breakdown voltage is employed. One is selected from a metal oxide or nitride, for example, TiO2, BaTiO3, SrTiO3 PbTiO3, KNbO3, PbNbO3, Ta2O3, BaTa2O6, LiTaO3, Y2O3, Al2O3, ZrO2, AlON, ZnS, or the like. Those may be disposed as a uniform film or a film having a particle structure.
  • [0176]
    In the case of an inorganic electroluminescent display device, a double-insulating structure in which a light-emitting layer is interposed between insulating layers may be employed. The light-emitting layer can be formed by using a II-VI compound such as Mn (manganese) or ZnO (zinc sulfide) containing a rare earth element, and the insulating layer can be formed by using oxide or nitride such as Si3N4, SiO2, Al2O3, or TiO2.
  • [0177]
    A silicon oxide film containing nitrogen is formed as a passivation film over the opposing electrode 83 by plasma CVD (not shown). In the case of using a silicon oxide film containing nitrogen, the following can be used: a silicon oxynitride film formed by using SiH4, N2O, and NH3 by plasma CVD; a silicon oxynitride film formed by using SiH4, and N2O; or a silicon oxynitride film formed by using a gas in which SiH4 and N2O is diluted with Ar.
  • [0178]
    A silicon oxide nitride hydride film manufactured from SiH4, N2O, and H2 may be employed as a passivation film. Note that a passivation film is not limited to the aforementioned substance. Another insulating film containing silicon as a main component can be also used. In addition, a layered film structure may be employed as well as a single layer structure. Further, a multilayer film of a carbon nitride film and a silicon nitride film or a multilayer film of a styrene polymer can be used. A silicon nitride film or a diamond-like carbon film may be formed.
  • [0179]
    Then, a display portion is sealed to protect a light-emitting element from a material such as water which promotes deterioration. In the case of using an opposing substrate for sealing, the opposing substrate is attached by using an insulating sealant so as to expose an external connection portion. A space between the opposing substrate and an element substrate may be filled with an inert gas such as dry nitrogen, or the opposing substrate may be attached by applying a sealant to the pixel portion entirely. It is preferable to use an ultraviolet curing resin or the like as the sealant. A drying agent or particles for keeping the gap between the substrates constant may be mixed in the sealant. Then, the light-emitting device is completed by attaching a flexible wire board to the external connection portion.
  • [0180]
    One example of a structure of the light-emitting device manufactured as described above is shown referring to FIGS. 11A and 11B. Note that portions having the same functions are sometimes denoted by the same reference numerals even though they have different shapes, and the explanations are occasionally omitted.
  • [0181]
    FIG. 11A shows a structure in which the pixel electrode 50 is formed using a light transmitting conductive film, and light generated in the layer 82 including a light-emitting substance is emitted toward a substrate 1. Further, reference numeral 86 denotes an opposing substrate. This opposing substrate is firmly attached to the substrate 1 using a sealant or the like after forming a light emitting element. A space between the opposing substrate 86 and the element is filled with resin 85 having a light-transmitting property or the like to seal the light emitting element. Accordingly, the light emitting element can be prevented from being deteriorated by moisture or the like. Preferably, the resin 85 has a hygroscopic property. More preferably, a drying agent 84 with a high light-transmitting property is dispersed in the resin 85 to prevent the adverse influence of moisture.
  • [0182]
    FIG. 11B shows a structure in which both the pixel electrode 50 and an opposing substrate 83 are formed by using conductive films having light-transmitting property. Accordingly, light can be emitted toward both the substrate 1 and the opposing substrate 86 as shown by an arrow of dotted lines. In this structure, by providing polarizing plates 88 outside of the substrate 1 and the opposing substrate 86, a screen can be prevented from being transparent, thereby improving visibility. Protection films 87 are preferably provided outside of the polarizing plates 88.
  • [0183]
    The light-emitting device of this invention having a display function may employ either an analog video signal or a digital video signal. If a digital video signal is used, the video signal may use either a voltage or a current.
  • [0184]
    When the light-emitting element emits light, a video signal to be inputted to a pixel may have either a constant voltage or a constant current. When a video signal has a constant voltage, a constant voltage is applied to a light-emitting element or a constant current flows through the light-emitting element.
  • [0185]
    Also, when a video signal has a constant current, a constant voltage is applied to a light-emitting element or a constant current flows through the light-emitting element. A driving method where a constant voltage is applied to a light-emitting element is called a constant voltage drive. Meanwhile, a driving method where a constant current flows through a light-emitting element is called a constant current drive. In the constant current drive, constant current flows regardless of change in resistance of a light emitting element. The light emitting display device according to this invention and the driving method thereof may use any one of the aforementioned methods.
  • [0186]
    In the light-emitting device, a gate insulating film is not etched, and the characteristics of the light-emitting element is not unstable so that its reliability is high. In the case of using a top gate semiconductor device, since a glass substrate or a base film formed by using, a silicon oxide film or a silicon oxynitride film is not etched, impurity such as sodium which deteriorates characteristics is not diffused from the substrate into the semiconductor film so that high reliability is obtained.
  • [0187]
    Al is used for a part of the source electrode and the drain electrode, thereby achieving lower resistance of a wire.
  • [0188]
    A pixel circuit and a protective circuit included in a panel and module, and operation thereof are shown referring to FIGS. 12A to 12F and 13 or the like. FIGS. 10A and 10B and 11A and 11B each show a cross-sectional view of a driving TFT 1403 of the semiconductor device. A switching TFT 1401, a current control TFT 1404, and an eraser TFT 1406 may be manufactured at the same time of the driving TFT 1403, and may have the same structure as the driving TFT 1403.
  • [0189]
    A pixel shown in FIG. 12A includes a signal line 1410 and power source lines 1411 and 1412 arranged in a column direction and a scan line 1414 arranged in a row direction. The pixel further includes a switching TFT 1401, the driving TFT 1403, the current control TFT 1404, an auxiliary capacitor 1402, and a light-emitting element 1405.
  • [0190]
    A pixel shown in FIG. 12C has the same structure as one in FIG. 12A except for that the gate electrode of the driving TFT 1403 is connected to the power source line 1412 provided in the row direction. In other words, the pixels shown in FIGS. 12A and 12C have the same equivalent circuit diagram. However, a power source line formed in the case of arranging the power source line 1412 in the column direction (FIG. 12A) is formed by using a conductive layer in a different layer from a layer in which a power source line is formed by using a conductive layer in the case of arranging the power source line 1412 in the row direction (FIG. 12C). Here, attention is paid to a wire connected to the gate electrode of the driving TFT 1403, and the structure is shown separately in FIGS. 12A and 12C in order to show that these wires are manufactured with different layers.
  • [0191]
    As a feature of the pixels shown in FIGS. 12A and 12C, the driving TFT 1403 and the current control TFT 1404 are connected serially within the pixel, and it is preferable to set the channel length L (1403) and the channel width W (1403) of the driving TFT 1403, and the channel length L (1404) and the channel width W (1404) of the current control TFT 1404 so as to satisfy L (1403)/W (1403):L (1404)/W (1404)=5 to 6000:1.
  • [0192]
    The driving TFT 1403 operates in a saturation region and serves to control the current value of the current flowing into the light-emitting element 1405. The current control TFT 1404 operates in a linear region and serves to control the current supplied to the light-emitting element 1405. Both the TFTs preferably have the same conductivity type in the manufacturing process, and the TFTs are n-channel type TFTs in this embodiment. The driving TFT 1403 may be either an enhancement mode TFT or a depletion mode TFT. Since the current control TFT 1404 operates in the linear region in the light-emitting device having the above structure, slight fluctuation of Vgs of the current control TFT 1404 does not affect the current value of the light-emitting element 1405. That is to say, the current value of the light-emitting element 1405 can be determined by the driving TFT 1403 operating in the saturation region. With the above structure, the variation of the luminance of the light-emitting element due to the variation of the characteristics of the TFT can be remedied, thereby providing a light-emitting device having improved image quality.
  • [0193]
    In each pixel shown in FIGS. 12A to 12D, the switching TFT 1401 is to control the input of the video signal to the pixel, and the video signal is inputted into the pixel when the switching TFT 1401 is turned on. Then, the voltage of the video signal is held in the auxiliary capacitor 1402. Although FIGS. 12A and 12C show the structure in which the auxiliary capacitor 1402 is provided, this invention is not limited thereto. When the gate capacitance and the like can serve as a capacitor holding the video signal, the auxiliary capacitor 1402 is not necessarily provided.
  • [0194]
    A pixel shown in FIG. 12B has the same pixel structure as that in FIG. 12A except for that a TFT 1406 and a scan line 1415 are added. In the same way, a pixel shown in FIG. 12D has the same pixel structure as that in FIG. 12C expect for that the TFT 1406 and the scan line 1415 are added.
  • [0195]
    ON and OFF of the TFT 1406 is controlled by the additionally provided scan line 1415. When the TFT 1406 is turned on, the charge held in the auxiliary capacitor 1402 is discharged, thereby turning off the current control TFT 1404. In other words, by the provision of the TFT 1406, a state can be produced compellingly in which the current does not flow into the light-emitting element 1405. For this reason, the TFT 1406 can be referred to as an eraser TFT. Consequently, in the structures shown in FIGS. 12B and 12D, a lighting period can be started at the same time as or just after the start of a writing period before the writing of the signal into all the pixels; therefore the duty ratio can be increased.
  • [0196]
    In a pixel shown in FIG. 12E, the signal line 1410 and the power source line 1411 are arranged in the column direction, and the scan line 1414 is arranged in the row direction. Further, the pixel includes the switching TFT 1401, the driving TFT 1403, the auxiliary capacitor 1402, and the light-emitting element 1405. A pixel shown in FIG. 12F has the same pixel structure as that shown in FIG. 12E except for that the TFT 1406 and the scan line 1415 are added. In the structure shown in FIG. 12F, the duty ratio can also be increased by the provision of the TFT 1406.
  • [0197]
    Such an active matrix light-emitting device can be driven at low voltage when the pixel density increases, because the TFTs are provided in respective pixels. Therefore, it is considered that the active matrix light-emitting device is advantageous.
  • [0198]
    Although this embodiment described the active matrix light-emitting device in which the respective TFTs are provided in respective pixels, a passive matrix light-emitting device can also be formed. Since the TFTs are not provided in respective pixels in the passive matrix light-emitting device, high aperture ratio can be obtained. In the case of a light-emitting device in which light is emitted to both sides of the light emission stack, the transmissivity of the passive matrix light-emitting device is increased.
  • [0199]
    Subsequently, a case will be described in which a diode is provided as a protective circuit on the scan line and the signal line with the use of an equivalent circuit shown in FIG. 12E.
  • [0200]
    In FIG. 13, the switching TFT 1401, the driving TFT 1403, the auxiliary capacitor 1402, and the light-emitting element 1405 are provided in a pixel area 1500. Diodes 1561 and 1562 are provided on the signal line 1410. In the similar way to the switching TFT 1401 and the driving TFT 1403, the diodes 1561 and 1562 are manufactured based on the above embodiments, and have a gate electrode, a semiconductor layer, a source electrode, a drain electrode, and the like. The diodes 1561 and 1562 are operated as diodes by connecting the gate electrode with the drain electrode or the source electrode.
  • [0201]
    Common potential lines 1554 and 1555 connecting to the diodes 1561 and 1562 are formed by using the same layer as the gate electrode. Therefore, in order to connect the common potential lines 1554 and 1555 with the source electrode or the drain electrode of the diode, it is necessary to form a contact hole in the gate insulating layer.
  • [0202]
    Diodes 1563 and 1564 provided on the scan line 1414 have a similar structure. Further, common potential lines 1565 and 1566 has the similar structure.
  • [0203]
    In this manner, protection diodes can be simultaneously formed in an input stage according to this invention. Further, the positions of the protection diodes are not limited to this, and they can be provided between a driver circuit and a pixel.
  • [0204]
    A top view of a pixel portion in the case of using an equivalent circuit shown in FIG. 12E is described in FIG. 14A. In addition, the same equivalent circuit as that in FIG. 12E is shown in FIG. 14B. Each semiconductor device shown in FIGS. 10A, 10B, 11A, and 11B is corresponds to each driving TFT 1403. FIGS. 10A, 10B, 11A and 11B show cross-sectional views taken along line X-Y in FIGS. 14A and 14B. The power source line 1411, the signal line 1410, and the source electrode and the drain electrode of the switching TFT 1401 are formed by using the first conductive film, and the source electrode and the drain electrode of the driving TFT 1403 are formed by using the second conductive film.
  • [0205]
    The switching TFT 1401 is manufactured by the same method as the driving TFT 1403. The drain electrode of the switching TFT 1401 and a gate electrode 40 of the driving TFT 1403 are connected electrically with each other through a contact hole formed in an insulating film in the same layer as the gate insulating film 42.
  • [0206]
    The auxiliary capacitor 1402 is formed by using a portion where the gate electrode of the driving TFT 1403 is extended, the power source line 1411, and an insulating film in the same layer as the gate insulating film 42.
  • [0207]
    A light-emitting region 1420 is formed in an opening portion of a partition wall 81. The partition wall 81 is formed in the vicinity of the light-emitting region 1420, although it is not shown. The corner portion of the light-emitting region 1420 may be rounded. By making the corner portion of the opening portion of the partition wall 81 rounded, the corner portion of the light-emitting region 1420 can be rounded. When dry etching using plasma is performed to process the partition wall 81, generation of fine particles due to abnormal discharge can be suppressed by making the corner portion rounded.
  • [0208]
    This embodiment can be combined with a suitable structure of the above embodiments as appropriate.
  • Embodiment 7
  • [0209]
    As an electronic device having semiconductor devices according to this invention mounted with modules shown as examples in the above embodiments, a camera such as a video camera or a digital camera; a goggle type display (a head mounted display); a navigation system; an audio reproducing device (e.g., a car audio component); a computer; a game machine; a portable information terminal (e.g., a mobile computer, a cellular phone, a portable game machine, an electronic book, or the like); an image reproducing device equipped with a recording medium (specifically, a device which can reproduce the content of a recording medium such as a digital versatile disc (DVD) and which has a display for displaying an image stored therein); and the like can be given. Specific examples of these electronic appliances are shown in FIGS. 15A to 15E, and FIG. 16.
  • [0210]
    FIG. 15A shows a monitor for a television receiver or a personal computer, or the like, including a housing 3001, a display area 3003, speakers 3004, and the like. An active matrix display device is provided in the display area 3003. Each pixel of the display area 3003 includes a semiconductor device manufactured in accordance with this invention. By using the semiconductor device of this invention with this structure, a television with less characteristic deterioration can be obtained.
  • [0211]
    FIG. 15B shows a cellular phone, including a main body 3101, a housing 3102, a display area 3103, an audio input portion 3104, an audio output portion 3105, operation keys 3106, an antenna 3108, and the like. An active matrix display device is provided in the display area 3103. Each pixel of the display area 3103 includes a semiconductor device manufactured in accordance with this invention. By using the semiconductor device of this invention with this structure, a cellular phone with less characteristic deterioration can be obtained.
  • [0212]
    FIG. 15C shows a computer, including a main body 3201, a housing 3202, a display area 3203, a keyboard 3204, an external connection port 3205, a pointing mouse 3206, and the like. An active matrix display device is provided in the display area 3203. Each pixel of the display area 3203 includes a semiconductor device manufactured in accordance with this invention. By using the semiconductor device of this invention with this structure, a computer with less characteristic deterioration can be obtained.
  • [0213]
    FIG. 15D shows a mobile computer, including a main body 3301, a display area 3302, a switch 3303, operation keys 3304, an infrared port 3305, and the like. An active matrix display device is provided in the display area 3302. Each pixel of the display area 3302 includes a semiconductor device manufactured in accordance with this invention. By using the semiconductor device of this invention with this structure, a mobile computer with less characteristic deterioration can be obtained.
  • [0214]
    FIG. 15E shows a portable game machine, including a housing 3401, a display area 3402, speakers 3403, operation keys 3404, a recording medium insert portion 3405, and the like. An active matrix display device is provided in the display area 3402. Each pixel of the display area 3402 includes a semiconductor device manufactured in accordance with this invention. By using the semiconductor device of this invention with this structure, a portable game machine with less characteristic deterioration can be obtained.
  • [0215]
    FIG. 16 shows a flexible display, including a main body 3110, a pixel area 3111, a driver IC 3112, a receiving device 3113, a film buttery 3114, and the like. The receiving device can receive a signal from an infrared communication port 3107 of the above described cellular phone. An active matrix display device is provided in the pixel area 3111. Each pixel of the pixel area 3111 includes a semiconductor device manufactured in accordance with this invention. By using the semiconductor device of this invention with this structure, a flexible display with less characteristic deterioration can be obtained.
  • [0216]
    As set forth above, the application range of this invention is extremely wide, and this invention can be applied to electronic devices in all fields.
  • [0217]
    The present application is based on Japanese Patent Application serial No. 2005-329806 filed on Nov. 15, 2005 in Japanese Patent Office, the entire contents of which are hereby incorporated by reference.
Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US5382457 *30 Sep 199317 Jan 1995Colorado SeminaryNear-resonant laser sputtering method
US5530265 *5 Aug 199425 Jun 1996Semiconductor Energy Laboratory Co., Ltd.Insulated gate semiconductor device and process for fabricating the same
US5731856 *30 Dec 199624 Mar 1998Samsung Electronics Co., Ltd.Methods for forming liquid crystal displays including thin film transistors and gate pads having a particular structure
US5803975 *25 Feb 19978 Sep 1998Canon Kabushiki KaishaMicrowave plasma processing apparatus and method therefor
US5888410 *31 Mar 199730 Mar 1999Denso CorporationDry etching method and manufacturing method of manufacturing EL element using same
US5930607 *2 Oct 199627 Jul 1999Seiko Epson CorporationMethod to prevent static destruction of an active element comprised in a liquid crystal display device
US5952708 *18 Nov 199614 Sep 1999Semiconductor Energy Laboratory Co., Ltd.Display device
US6294274 *12 Jul 199925 Sep 2001Tdk CorporationOxide thin film
US6529251 *17 Feb 20004 Mar 2003Sharp Kabushiki KaishaLiquid crystal display device and method of manufacturing the same
US6532045 *21 Dec 200011 Mar 2003Lg. Philips Lcd Co. Ltd.Transflective liquid crystal display device and method of manufacturing the same
US6563174 *21 Aug 200213 May 2003Sharp Kabushiki KaishaThin film transistor and matrix display device
US6674136 *29 Feb 20006 Jan 2004Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having driver circuit and pixel section provided over same substrate
US6727522 *11 Nov 199927 Apr 2004Japan Science And Technology CorporationTransistor and semiconductor device
US6852998 *7 Mar 20038 Feb 2005Lg Philips Lcd Co., Ltd.Thin-film transistor substrate and liquid crystal display
US6900461 *10 May 200231 May 2005Idemitsu Kosan Co., Ltd.Conductive thin film for semiconductor device, semiconductor device, and method of manufacturing the same
US6921627 *31 Oct 200326 Jul 2005Samsung Sdi Co., Ltd.Organic electroluminescent device with self-aligned insulating fillers and method for manufacturing the same
US7009204 *16 Jun 20047 Mar 2006Toppoly Optoelectronics Corp.Thin film transistor with self-aligned intra-gate electrode
US7012658 *28 Jan 200414 Mar 2006Sharp Kabushiki KaishaSubstrate for liquid crystal display and liquid crystal display utilizing the same
US7049190 *17 Mar 200323 May 2006Sanyo Electric Co., Ltd.Method for forming ZnO film, method for forming ZnO semiconductor layer, method for fabricating semiconductor device, and semiconductor device
US7061014 *31 Oct 200213 Jun 2006Japan Science And Technology AgencyNatural-superlattice homologous single crystal thin film, method for preparation thereof, and device using said single crystal thin film
US7064346 *29 Jan 200420 Jun 2006Japan Science And Technology AgencyTransistor and semiconductor device
US7067843 *24 Sep 200327 Jun 2006E. I. Du Pont De Nemours And CompanyTransparent oxide semiconductor thin film transistors
US7075614 *31 Dec 200311 Jul 2006Sharp Kabushiki KaishaMethod of making active matrix substrate with pixel electrodes of photosensitive conductive material
US7189992 *27 Nov 200213 Mar 2007State Of Oregon Acting By And Through The Oregon State Board Of Higher Education On Behalf Of Oregon State UniversityTransistor structures having a transparent channel
US7211825 *14 Jun 20041 May 2007Yi-Chi ShihIndium oxide-based thin film transistors and circuits
US7323356 *19 Feb 200329 Jan 2008Japan Science And Technology AgencyLnCuO(S,Se,Te)monocrystalline thin film, its manufacturing method, and optical device or electronic device using the monocrystalline thin film
US7339187 *24 Jan 20034 Mar 2008State Of Oregon Acting By And Through The Oregon State Board Of Higher Education On Behalf Of Oregon State UniversityTransistor structures
US7365805 *21 Jan 200529 Apr 2008Semiconductor Energy Laboratory Co., Ltd.Display device, manufacturing method thereof, and television receiver
US7385224 *1 Sep 200510 Jun 2008Casio Computer Co., Ltd.Thin film transistor having an etching protection film and manufacturing method thereof
US7402506 *16 Jun 200522 Jul 2008Eastman Kodak CompanyMethods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby
US7411209 *7 Sep 200712 Aug 2008Canon Kabushiki KaishaField-effect transistor and method for manufacturing the same
US7501293 *4 Jun 200310 Mar 2009Murata Manufacturing Co., Ltd.Semiconductor device in which zinc oxide is used as a semiconductor material and method for manufacturing the semiconductor device
US7560396 *31 Mar 200314 Jul 2009Tokyo Electron LimitedMaterial for electronic device and process for producing the same
US7732818 *9 Apr 20088 Jun 2010Semiconductor Energy Laboratory Co., Ltd.Display device, manufacturing method thereof, and television receiver
US20020044111 *9 May 200118 Apr 2002Semiconductor Energy Laboratory Co., Ltd.Light-emitting device and electric appliance
US20020056838 *15 Nov 200116 May 2002Matsushita Electric Industrial Co., Ltd.Thin film transistor array, method of producing the same, and display panel using the same
US20020109796 *9 Feb 200115 Aug 2002Prime View International Co., Ltd.,Metal contact structure and method for thin film transistor array in liquid crystal display
US20020110703 *15 Feb 200215 Aug 2002Nec CorporationOrganic electroluminescent device with self-aligned insulating fillers and method for manufacturing the same
US20020132454 *17 Oct 200119 Sep 2002Fuji Xerox Co., Ltd.Method of forming crystalline semiconductor thin film on base substrate, lamination formed with crystalline semiconductor thin film and color filter
US20030047785 *21 Aug 200213 Mar 2003Masahi KawasakiThin film transistor and matrix display device
US20040038446 *17 Mar 200326 Feb 2004Sanyo Electric Co., Ltd.-Method for forming ZnO film, method for forming ZnO semiconductor layer, method for fabricating semiconductor device, and semiconductor device
US20040127038 *24 Sep 20031 Jul 2004Carcia Peter FrancisTransparent oxide semiconductor thin film transistors
US20040132293 *22 Sep 20038 Jul 2004Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device and heat treatment method
US20050017302 *23 Jan 200427 Jan 2005Randy HoffmanTransistor including a deposited channel region having a doped portion
US20050082541 *8 Dec 200421 Apr 2005Seiko Epson CorporationMethod to prevent static destruction of an active element comprised in a liquid crystal display device
US20050084999 *8 Dec 200421 Apr 2005Seiko Epson CorporationMethod to prevent static destruction of an active element comprised in a liquid crystal display device
US20050104071 *8 Dec 200419 May 2005Seiko Epson CorporationMethod to prevent static destruction of an active element comprised in a liquid crystal display device
US20050164423 *21 Jan 200528 Jul 2005Semiconductor Energy Laboratory Co., Ltd.Display device, manufacturing method thereof, and television receiver
US20050199959 *12 Mar 200415 Sep 2005Chiang Hai Q.Semiconductor device
US20060035452 *10 Oct 200316 Feb 2006Carcia Peter FTransparent oxide semiconductor thin film transistor
US20060043377 *25 Oct 20052 Mar 2006Hewlett-Packard Development Company, L.P.Semiconductor device
US20060054888 *4 Jun 200316 Mar 2006Yoshihiro ItoSemiconductor device and method for manufacturing semiconductor device
US20060086933 *6 Dec 200527 Apr 2006Hiroyuki IechiVertical organic transistor
US20060091793 *2 Nov 20044 May 20063M Innovative Properties CompanyMethods and displays utilizing integrated zinc oxide row and column drivers in conjunction with organic light emitting diodes
US20060108529 *9 Nov 200525 May 2006Canon Kabushiki KaishaSensor and image pickup device
US20060108636 *9 Nov 200525 May 2006Canon Kabushiki KaishaAmorphous oxide and field effect transistor
US20060110867 *9 Nov 200525 May 2006Canon Kabushiki KaishaField effect transistor manufacturing method
US20060113536 *9 Nov 20051 Jun 2006Canon Kabushiki KaishaDisplay
US20060113539 *9 Nov 20051 Jun 2006Canon Kabushiki KaishaField effect transistor
US20060113549 *9 Nov 20051 Jun 2006Canon Kabushiki KaishaLight-emitting device
US20060113565 *9 Nov 20051 Jun 2006Canon Kabushiki KaishaElectric elements and circuits utilizing amorphous oxides
US20060163743 *11 Jan 200627 Jul 2006Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same, and electric device
US20060169973 *17 Jan 20063 Aug 2006Semiconductor Energy Laboratory Co., Ltd.Semiconductor device, electronic device, and method of manufacturing semiconductor device
US20060170067 *17 Jan 20063 Aug 2006Semiconductor Energy Laboratory Co., Ltd.Electronic device, semiconductor device and manufacturing method thereof
US20060170111 *17 Jan 20063 Aug 2006Semiconductor Energy Laboratory Co., Ltd.Semiconductor device, electronic device, and method of manufacturing semiconductor device
US20060183274 *6 Apr 200617 Aug 2006Carcia Peter FTransparent oxide semiconductor thin film transistors
US20060197092 *22 Jun 20057 Sep 2006Randy HoffmanSystem and method for forming conductive material on a substrate
US20070046191 *11 Aug 20061 Mar 2007Canon Kabushiki KaishaOrganic electroluminescent display device and manufacturing method thereof
US20070054507 *24 Aug 20068 Mar 2007Canon Kabushiki KaishaMethod of fabricating oxide semiconductor device
US20070072439 *21 Sep 200629 Mar 2007Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20070108446 *14 Nov 200617 May 2007Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20070141784 *5 Feb 200721 Jun 2007State Of Oregon Acting By And Through The Oregon State Board Of Higher Education On Behalf Of OregoTransistor structures and methods for making the same
US20070158652 *27 Dec 200612 Jul 2007Je-Hun LeeDisplay substrate, method of manufacturing the same and display panel having the same
US20070172591 *19 Jan 200726 Jul 2007Samsung Electronics Co., Ltd.METHOD OF FABRICATING ZnO FILM AND THIN FILM TRANSISTOR ADOPTING THE ZnO FILM
US20070187678 *9 Feb 200716 Aug 2007Kochi Industrial Promotion CenterSemiconductor device including active layer made of zinc oxide with controlled orientations and manufacturing method thereof
US20070187760 *1 Feb 200716 Aug 2007Kochi Industrial Promotion CenterThin film transistor including low resistance conductive thin films and manufacturing method thereof
US20070194379 *28 Feb 200523 Aug 2007Japan Science And Technology AgencyAmorphous Oxide And Thin Film Transistor
US20080006877 *14 Sep 200710 Jan 2008Peter MardilovichMethod of Forming a Solution Processed Device
US20080038882 *6 Aug 200714 Feb 2008Kazushige TakechiThin-film device and method of fabricating the same
US20080073653 *21 Sep 200727 Mar 2008Canon Kabushiki KaishaSemiconductor apparatus and method of manufacturing the same
US20080083950 *10 Oct 200610 Apr 2008Alfred I-Tsung PanFused nanocrystal thin film semiconductor and method
US20080106191 *23 Aug 20078 May 2008Seiko Epson CorporationElectronic device, organic electroluminescence device, and organic thin film semiconductor device
US20080108198 *3 Jan 20088 May 2008State of Oregon acting by & through the Oregon State Board of Higher Education on behalf ofTransistor structures and methods for making the same
US20080128689 *29 Nov 20075 Jun 2008Je-Hun LeeFlat panel displays comprising a thin-film transistor having a semiconductive oxide in its channel and methods of fabricating the same for use in flat panel displays
US20080129195 *3 Dec 20075 Jun 2008Toppan Printing Co., Ltd.Color el display and method for producing the same
US20080166834 *21 Nov 200710 Jul 2008Samsung Electronics Co., Ltd.Thin film etching method
US20080198108 *23 Jan 200821 Aug 2008Mitsubishi Electric CorporationArray substrate and display unit using it and production method for array substrate
US20090008639 *1 Aug 20088 Jan 2009Semiconductor Energy Laboratory Co., Ltd.Semiconductor Device and Manufacturing Method Thereof
US20090068773 *20 Oct 200812 Mar 2009Industrial Technology Research InstituteMethod for fabricating pixel structure of active matrix organic light-emitting diode
US20090073325 *11 Nov 200819 Mar 2009Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same, and electric device
US20090114910 *24 Aug 20067 May 2009Canon Kabushiki KaishaSemiconductor device
US20090114911 *4 Dec 20087 May 2009Semiconductor Energy Laboratory Co., Ltd.Electronic device semiconductor device and manufacturing method thereof
US20090152541 *30 Dec 200818 Jun 2009Semiconductor Energy Laboratory Co., Ltd.Electronic device, semiconductor device and manufacturing method thereof
US20090186437 *26 Mar 200923 Jul 2009Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20090189155 *3 Apr 200930 Jul 2009Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20090189156 *3 Apr 200930 Jul 2009Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20100003783 *18 Sep 20097 Jan 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20100038639 *27 Oct 200918 Feb 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20100085283 *9 Dec 20098 Apr 2010Semiconductor Energy Laboratory Co., Ltd.Light-Emitting Device and Electric Appliance
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US767465021 Sep 20069 Mar 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US77328191 Aug 20088 Jun 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US791049029 Apr 200922 Mar 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US79325211 Aug 200826 Apr 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US813415614 Nov 200613 Mar 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including zinc oxide containing semiconductor film
US815846426 Mar 200917 Apr 2012Semiconductor Energy Laboratory Co., Ltd.Method of manufacturing a liquid crystal display device with a semiconductor film including zinc oxide
US822209223 Dec 200917 Jul 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US823663520 Oct 20097 Aug 2012Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US824249420 Oct 200914 Aug 2012Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing thin film transistor using multi-tone mask
US82740771 Aug 200825 Sep 2012Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US833454030 Jun 201118 Dec 2012Semiconductor Energy Laboratory Co., Ltd.Display device
US833822629 Mar 201025 Dec 2012Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US834379920 Oct 20091 Jan 2013Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US83680661 Oct 20095 Feb 2013Semiconductor Energy Laboratory Co., Ltd.Display device
US836807927 Oct 20095 Feb 2013Semicondutor Energy Laboratory Co., Ltd.Semiconductor device including common potential line
US837834426 Aug 201019 Feb 2013Semiconductor Energy Laboratory Co., Ltd.Light-emitting device with plural kinds of thin film transistors and circuits over one substrate
US838998926 Aug 20105 Mar 2013Semiconductor Energy Laboratory Co., Ltd.Transistor having oxide semiconductor layer and display utilizing the same
US83951484 Nov 200912 Mar 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same
US839571630 Nov 200912 Mar 2013Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device
US841573127 Dec 20109 Apr 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor storage device with integrated capacitor and having transistor overlapping sections
US843640326 Jan 20117 May 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including transistor provided with sidewall and electronic appliance
US844101021 Jun 201114 May 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US845073525 Aug 201028 May 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including a transistor, and manufacturing method of semiconductor device
US8455869 *3 May 20124 Jun 2013Lg Display Co., Ltd.Oxide thin film transistor and method of fabricating the same
US846646317 Nov 201018 Jun 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US848200122 Dec 20109 Jul 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US849284018 Jan 201123 Jul 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device having an oxide semiconductor layer
US850155510 Sep 20096 Aug 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US851939819 Mar 201227 Aug 2013Semiconductor Energy Laboratory Co., Ltd.Display device
US85251653 Apr 20093 Sep 2013Semiconductor Energy Laboratory Co., Ltd.Active matrix display device with bottom gate zinc oxide thin film transistor
US8546811 *1 Feb 20111 Oct 2013Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US8558382 *27 Jul 201015 Oct 2013Kobe Steel, Ltd.Interconnection structure and display device including interconnection structure
US86290691 Aug 200814 Jan 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US864301814 Sep 20124 Feb 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device comprising a pixel portion and a driver circuit
US865351317 Feb 201118 Feb 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device with sidewall insulating layer
US86695501 Aug 200811 Mar 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US86743716 Dec 201218 Mar 2014Semiconductor Energy Laboratory Co., Ltd.Display device
US868641723 Jul 20121 Apr 2014Semiconductor Energy Laboratory Co., Ltd.Oxide semiconductor device formed by using multi-tone mask
US871049919 Feb 201329 Apr 2014Semiconductor Energy Laboratory Co., Ltd.Transistor and display device
US872954625 Jul 201220 May 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US874170220 Oct 20093 Jun 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US875991728 Dec 201024 Jun 2014Samsung Electronics Co., Ltd.Thin-film transistor having etch stop multi-layer and method of manufacturing the same
US87600468 Jul 200924 Jun 2014Semiconductor Energy Laboratory Co., Ltd.Light-emitting device and electronic device using the same
US878062912 Jan 201115 Jul 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method thereof
US87852436 Aug 201222 Jul 2014Samsung Display Co., Ltd.Method for manufacturing a thin film transistor array panel
US879095921 Jan 201129 Jul 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US87960693 Feb 20105 Aug 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US879607826 May 20105 Aug 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US880314611 Feb 201312 Aug 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US881646924 Jan 201126 Aug 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device comprising protection circuit with oxide semiconductor
US88416615 Feb 201023 Sep 2014Semiconductor Energy Laboratory Co., Ltd.Staggered oxide semiconductor TFT semiconductor device and manufacturing method thereof
US885368417 May 20117 Oct 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US88781786 Dec 20124 Nov 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US8900938 *12 Jul 20122 Dec 2014Shenzhen China Star Optoelectronics Technology Co., Ltd.Manufacturing method of array substrate, array substrate and LCD device
US891204025 Jan 201116 Dec 2014Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US892798117 Mar 20106 Jan 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same
US89369639 Mar 201020 Jan 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the semiconductor device
US89411143 Sep 200927 Jan 2015Semiconductor Energy Laboratory Co., Ltd.Display device including protective circuit
US898066531 Dec 201217 Mar 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same
US898068527 Feb 201417 Mar 2015Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing thin film transistor using multi-tone mask
US898151811 Aug 201417 Mar 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US89933869 Mar 201031 Mar 2015Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US900696531 Jan 201414 Apr 2015Semiconductor Energy Laboratory Co., Ltd.Light-emitting device and electronic device using the same
US901291824 Mar 201021 Apr 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including oxide semiconductor
US904832010 Sep 20092 Jun 2015Semiconductor Energy Laboratory Co., Ltd.Display device including oxide semiconductor layer
US905420127 Jun 20139 Jun 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US90588899 Jul 201316 Jun 2015Semiconductor Energy Laboratory Co., Ltd.Pulse output circuit, display device, and electronic device
US905929529 Mar 201116 Jun 2015Semiconductor Energy Laboratory Co., Ltd.Thin film transistor having an oxide semiconductor and metal oxide films
US908268831 Dec 201214 Jul 2015Semiconductor Energy Laboratory Co., Ltd.Display device
US909956217 Aug 20094 Aug 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US910573518 Mar 201411 Aug 2015Semiconductor Energy Laboratory Co., Ltd.Transistor and display device
US912375127 May 20141 Sep 2015Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US913628011 Jul 201415 Sep 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and driving method thereof
US913639010 May 201115 Sep 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US918429913 Mar 201410 Nov 2015Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US919663310 Sep 200924 Nov 2015Semiconductor Energy Laboratory Co., Ltd.Display device
US923097013 Jan 20155 Jan 2016Semiconductor Energy Laboratory Co., LtdSemiconductor device
US923111016 Oct 20145 Jan 2016Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same
US92575943 Sep 20099 Feb 2016Semiconductor Energy Laboratory Co., Ltd.Thin film transistor with an oxide semiconductor layer
US92935455 Aug 201422 Mar 2016Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US93481895 Mar 201324 May 2016Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device
US93680539 Sep 201114 Jun 2016Semiconductor Energy Laboratory Co., Ltd.Display device
US93686416 Aug 201514 Jun 2016Semiconductor Energy Laboratory Co., Ltd.Transistor and display device
US937352520 Nov 201421 Jun 2016Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US9391209 *12 Sep 201312 Jul 2016Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US941911313 Oct 201516 Aug 2016Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US94438741 Jul 201413 Sep 2016Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same
US94439349 Sep 201413 Sep 2016Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US944398830 Sep 201413 Sep 2016Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US945013324 Nov 200920 Sep 2016Semiconductor Energy Laboratory Co., Ltd.Photosensor and display device
US947255922 Dec 201018 Oct 2016Semiconductor Energy Laboratory Co., Ltd.Memory device and semiconductor device
US949035023 Jul 20148 Nov 2016Semiconductor Energy Laboratory Co., Ltd.Transistor, liquid crystal display device, and manufacturing method thereof
US955921228 Jul 201531 Jan 2017Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same
US95704709 Jul 201514 Feb 2017Semiconductor Energy Laboratory Co., Ltd.Display device
US957059422 Feb 201614 Feb 2017Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US95706286 Nov 201514 Feb 2017Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US96406702 Jun 20162 May 2017Semiconductor Energy Laboratory Co., Ltd.Transistors in display device
US969178913 Jun 201627 Jun 2017Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US97050032 Apr 201511 Jul 2017Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including first and second gate electrodes and stack of insulating layers
US971165110 Sep 201518 Jul 2017Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US97219716 Oct 20141 Aug 2017Semiconductor Energy Laboratory Co., Ltd.Display device and electronic device including the same
US974843622 May 201329 Aug 2017Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same
US976828016 Oct 201419 Sep 2017Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US976828124 Mar 201519 Sep 2017Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US978009324 Jan 20143 Oct 2017Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US20070072439 *21 Sep 200629 Mar 2007Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20080308797 *1 Aug 200818 Dec 2008Semiconductor Energy Laboratory Co., Ltd.Semiconductor Device and Manufacturing Method Thereof
US20080308804 *1 Aug 200818 Dec 2008Semiconductor Energy Laboratory Co., Ltd.Semiconductor Device and Manufacturing Method Thereof
US20080308805 *1 Aug 200818 Dec 2008Semiconductor Energy Laboratory Co., Ltd.Semiconductor Device and Manufacturing Method Thereof
US20080308806 *1 Aug 200818 Dec 2008Semiconductor Energy Laboratory Co., Ltd.Semiconductor Device and Manufacturing Method Thereof
US20090189155 *3 Apr 200930 Jul 2009Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20090189156 *3 Apr 200930 Jul 2009Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20090239335 *29 Apr 200924 Sep 2009Semiconductor Energy Laboratory Co., Ltd.Semiconductor Device and Manufacturing Method Thereof
US20100003783 *18 Sep 20097 Jan 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20100065839 *3 Sep 200918 Mar 2010Semiconductor Energy Laboratory Co., Ltd.Display device
US20100065842 *10 Sep 200918 Mar 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20100072470 *10 Sep 200925 Mar 2010Semiconductor Energy Laboratory Co., Ltd.Display device
US20100072471 *10 Sep 200925 Mar 2010Semiconductor Energy Laboratory Co., Ltd.Display device
US20100102315 *20 Oct 200929 Apr 2010Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US20100105162 *20 Oct 200929 Apr 2010Semiconductor Energy Laboratory Co., Ltd.Method for manufacturing semiconductor device
US20100134710 *30 Nov 20093 Jun 2010Semiconductor Energy Laboratory Co., Ltd.Liquid crystal display device
US20100134735 *24 Nov 20093 Jun 2010Semiconductor Energy Laboratory Co., Ltd.Photosensor and display device
US20100163868 *23 Dec 20091 Jul 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20100213461 *5 Feb 201026 Aug 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20100233848 *9 Mar 201016 Sep 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the semiconductor device
US20100244029 *24 Mar 201030 Sep 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US20100244031 *17 Mar 201030 Sep 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same
US20100252827 *29 Mar 20107 Oct 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and method for manufacturing the same
US20100301329 *26 May 20102 Dec 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20100304529 *26 May 20102 Dec 2010Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20110049518 *25 Aug 20103 Mar 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device including a transistor, and manufacturing method of semiconductor device
US20110101351 *27 Oct 20105 May 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US20110156117 *22 Dec 201030 Jun 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US20110163310 *28 Dec 20107 Jul 2011Samsung Electronics Co., Ltd.Thin-film transistor having etch stop multi-layer and method of manufacturing the same
US20110180796 *18 Jan 201128 Jul 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US20110187435 *24 Jan 20114 Aug 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US20110193080 *26 Jan 201111 Aug 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and electronic appliance
US20110193081 *1 Feb 201111 Aug 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US20110210324 *26 Aug 20101 Sep 2011Semiconductor Energy Laboratory Co., Ltd.Light-emitting device and method for manufacturing the same
US20110210326 *17 Feb 20111 Sep 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
US20110210328 *10 May 20111 Sep 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20110215318 *10 May 20118 Sep 2011Semiconductor Energy Laboratory Co., Ltd.Semiconductor device and manufacturing method thereof
US20110287593 *13 May 201124 Nov 2011Semiconductor Energy Laboratory Co., Ltd.Method for forming semiconductor film and method for manufacturing semiconductor device
US20140001475 *12 Jul 20122 Jan 2014Jun WangManufacturing method of array substrate, array substrate and lcd device
US20140014954 *12 Sep 201316 Jan 2014Semiconductor Energy Laboratory Co., Ltd.Semiconductor device
Classifications
U.S. Classification438/104, 438/151, 257/E21.411
International ClassificationG02F1/1368, H01L29/786, H01L21/316, H01L21/28, H05B33/10, G02F1/1333, H01L51/50, G09F9/30, H01L21/336
Cooperative ClassificationH01L29/78621, H01L29/41733, H01L29/4908, H01L29/45, H01L27/1214, H01L29/7869
European ClassificationH01L29/786B4B, H01L29/417D2, H01L29/786K, H01L29/49B, H01L29/45