US20090067200A1

US20090067200A1 - Device and method for equalizing the charges of individual, series-connected cells of an energy storage device

Info

Publication number: US20090067200A1
Application number: US11/631,062
Authority: US
Inventors: Stephan Bolz; Martin Gotzenberger; Rainer Knorr; Gunter Lugert
Original assignee: Siemens AG
Current assignee: Siemens AG
Priority date: 2004-06-28
Filing date: 2005-03-24
Publication date: 2009-03-12
Also published as: CN1977438A; KR101249422B1; EP1761987B1; EP1761988A1; CN100511916C; KR20070030224A; WO2006000263A1; CN1977439A; JP2008504798A; EP1761988B1; CN100468910C; US20080278969A1; JP2008504797A; DE502005006475D1; WO2006000471A1; EP1761987A1; KR20070031406A; DE102004031216A1; US7800346B2

Abstract

A device and a method for compensating charges of serially connected individual cells of an energy storage device includes a DC/DC converter which taps power from the energy storage device or an additional energy source, charges a capacitor of an intermediate circuit by way of the tapped power, inverts the voltage thereof in a DC/AC converter, converts the alternating voltage into an intermittent direct current via an AC bus and a double capacitor by way of a rectifier, and charges the cell with the intermittent direct current at the lowest cell voltage.

Description

The invention relates to a device and method for equalizing the charges of individual cells of an energy storage device disposed in series, in particular of capacitors of a double-layer capacitor connected in series, as used for example in vehicle electrical systems.
Double-layer capacitors have proved to be the most practical technical solution for storing and supplying short bursts of high power in a vehicle electrical system, for example during acceleration assistance (boost) for the internal combustion engine by an integrated starter-generator operating as an electric motor or during the conversion of motive energy to electrical energy by the integrated starter-generator operating as a generator during the regenerative braking process (recuperation).
The maximum voltage of an individual cell of a double-layer capacitor is limited to around 2.5V to 3.0 V, such that for a voltage of 60V for example—a typical voltage value for a double-layer capacitor used in a 42V vehicle electrical system—around 20 to 26 individual capacitors have to be connected in series to form a capacitor stack.
The varying self-discharge rates of the individual cells mean that a charge inequality develops over time in the capacitor stack, ultimately making the double-layer capacitor unusable, if the charges are not equalized.
If the discharge curve is extrapolated to periods of weeks to months, as are relevant for the motor vehicle, the existing problem becomes clear. FIG. 1 shows an example of the scatter range of the capacitor voltages for a double-layer capacitor (capacitor stack) with 18 cells (capacitors) over time. The scatter range (between maximum and minimum) illustrated in FIG. 1 shows the degree to which the self-discharge of the individual cells within a capacitor stack can fluctuate over time.
A simple charge equalizing operation, for example by slightly overcharging the capacitor stack, as with a lead-acid battery, is however not possible with a double-layer capacitor.
One option known internally within the company is to monitor the voltage of each individual cell by means of a separate electronics system (operational amplifier and voltage divider R1/R2) and, when a predetermined maximum value U_refis reached or exceeded, to bring about a partial discharge by means of a connectable parallel resistance R_byp(FIG. 2). The cell then discharges by way of the parallel resistance R_bypand its voltage U_Cdrops back below the maximum value. If the voltage drops below the maximum value by a predetermined voltage value, the parallel resistance R_bypis disconnected again.
In the passive state such a circuit uses little energy but charge equalizing is achieved by charge release (energy loss in the parallel resistance R_byp). This variant should be used expediently where a capacitor stack is mainly operated close to the maximum voltage, for example in the case of the power supply to emergency generating units.
The concept is however restricted in that the charging current into the capacitor stack must be smaller than the discharging current of the charge equalizing circuit, as otherwise it would not be possible to prevent the overcharging of individual capacitors when charging the module. Also the equalizing system cannot be switched on externally, but is only activated when the predetermined voltage threshold is exceeded. During operation in a motor vehicle however this precise state is not achieved over quite a long period. Such a charge equalizing operation results in the long term in a lack of symmetry in the capacitor stack. It has already been possible to demonstrate this by taking measurements in a test vehicle.
To summarize, such a circuit arrangement has the following disadvantages:

- no feedback to a higher-order management system, when a cell has exceeded the maximum voltage (for example U_C>2.5V),
- no feedback to determine whether the cell voltages are equal and the capacitor stack is therefore equalized,
- the equalizing operation is only activated when the maximum voltage is exceeded,
- energy is converted to heat by resistors during the equalizing process,
- in the case of large currents of up to approx. 1 kA, as occur during the vehicle function recuperation (regenerative braking), as described above, such a charge equalizing structure is not possible.

It is known from EP 0 432 639 B2 that where there are a number of batteries connected in series a charge equalizing operation can be brought about between a weakly charged battery and the set of other batteries, in that a comparison circuit and a charge circuit (having a rectangle function generator) as well as a diode, transformer and interrupter are provided for each individual battery of the battery stack.
With such a device, operating as a flyback converter according to the isolating transformer principle (FIG. 3), energy is tapped from the stack as a whole and then fed back into the most discharged battery.
This outlay may be justified for two or three batteries but it is definitely too high for a stack of twenty or more batteries/capacitor cells.
Alternatively another energy source—perhaps an additional battery—can also be used here, with the result that the circuit can also be used to charge the capacitor stack slowly—see also DE 102 56 704 B3.
This form of charge equalizing can also be implemented at any time, regardless of whether the individual capacitor has reached a maximum voltage, such that a dangerous charge inequality cannot develop in the capacitor stack.
In this process charges are simply displaced. In the long term no energy is tapped from the stack or converted to heat. This makes the concept particularly attractive for motor vehicle applications, as sufficient energy must still be present in the vehicle electrical system, even after quite a long vehicle stoppage, to ensure that the vehicle starts successfully in a reliable manner.
One disadvantage of this embodiment is however that the secondary side of the flyback transformer requires a large number of terminals. In the case of a capacitor stack with for example 25 individual cells, as required for the 42V vehicle electrical system, this means 50 terminals. For the purposes of technical implementation this would require a special winding body, which is not commercially available. Also any change in the number of cells in the stack requires adjustment of the transformer. This is to be expected however, as the further technical development of double-layer capacitors has led to an increase in the permitted maximum voltage from generation to generation and correspondingly fewer individual capacitors are required for a given module voltage.
The wiring arrangement from the transformer to the capacitor cells is also complex, as every contact in the stack has to be connected separately. In the example above this means 26 lines, in so far as the rectifier diodes are disposed on the transformer; otherwise it would mean 50 lines. These lines are also subject to high-frequency voltage pulses from the switching processes of the flyback converter and require special EMV suppression measures.
A further aspect is the method for operating the flyback converter. Commercially available control circuits (switching controller ICs) operate almost exclusively with a fixed switching frequency. The charging of the magnetic store (storage inductivity or transformer) takes place in the one phase, while the discharge or energy transfer to the output circuit takes place in the other phase of the clock pulse. This is particularly expedient when a direct current element also has to be transferred as well as the switched current (continuous operation). Generally every effort is made to avoid a switching gap—in other words the time period during which the magnetic storage element remains fully discharged—as oscillations then tend to occur more frequently and the storage characteristics of the magnet core are not used optimally. The oscillations have their origin in the resonant circuit, which comprises storage inductivity and winding capacitance, and the fact that the resonant circuit is stimulated at the start of the switching gap and is not damped by any ohmic load.
In the present application continuous operation is however not possible, as when the magnetic store is continuously recharged, before completely discharging in each instance, saturation of the core material cannot be avoided.
The object of the invention is to create a device with a simplified structure which can be used to achieve automatically controlled operation for equalizing the charges between the individual cells connected in series with little technical outlay.
The object of the invention is also to create a method for operating this device.
According to the invention this object is achieved by a device according to the features of claim 1 and a method for operating said device according to the features of claim 11.
Where at least two energy storage devices (cells) are connected in series, the energy required to equalize the stored charges is fed by way of an alternating current bus (AC bus) to the cell with the lowest cell voltage in each instance.
Advantageous developments of the invention will emerge from the subclaims.
The interfacing and isolation of the cells is effected by way of capacitors according to the invention.
Installation is simple due to the bus system. The individual cells are supplied by way of one or two AC bus lines. Only a few, low-cost components are required for the circuit and these are essentially standard components.
The equalizing process can be activated at any time. Such activation can for example be effected by a control device, which determines the activation time based on operating parameters of a motor vehicle, in particular of an internal combustion engine and/or a starter-generator.
The capacitor stack can be recharged by way of the equalizing circuit. It is thus possible to charge up a series circuit of empty cells again from a further energy source, for example rendering a motor vehicle that has been stopped for a long time once again capable of starting.
The system as a whole can be easily expanded and is therefore readily scalable.
The circuit arrangement is particularly suitable for integration into the stack of cells of an energy storage device connected in series and/or into the housing of the individual cells or the energy storage device as a whole.
Particularly suitable energy storage devices in this instance are double-layer capacitors, also referred to as super-caps or ultra-caps.

Exemplary embodiments according to the invention are described in more detail below with reference to a schematic drawing, in which:

FIG. 1 shows the scatter of the capacitor voltages of different cells of a double-layer capacitor over time,

FIG. 2 shows a known circuit arrangement to achieve charge equalizing in energy storage devices,

FIG. 3 shows a further known circuit arrangement to achieve charge equalizing in energy storage devices,

FIG. 4 shows a block circuit diagram of an inventive charge equalizing circuit,

FIG. 5 shows an exemplary embodiment of a charge equalizing circuit and

FIG. 6 shows a further exemplary embodiment of a charge equalizing circuit.

FIGS. 1 to 3 have already been described above.
A block circuit diagram of an outline circuit for equalizing the charges of cells of an energy storage device according to the invention is shown in FIG. 4. A first converter 1 generates a direct voltage. This direct voltage is inverted by way of a second converter 2 with a pulse frequency of 50 kHz for example and this alternating voltage is applied to an AC bus 4. Bus here refers to a system of conductors (cables, copper rails, etc.).
The cells Z₁to Z_nof the double-layer capacitor DLC connected in circuit are connected to this bus 4 by way of a coupling capacitor and a rectifier 3 respectively. The coupling capacitors C_Kare used for isolation purposes and their charge is partially reversed by the alternating voltage.
FIG. 5 shows a first exemplary embodiment of an inventive circuit arrangement for equalizing the charges of cells Z₁to Z_nof a double-layer capacitor DLC. The voltage U_DLCdropping across the series circuit of the individual cells Z₁to Z_nof the double-layer capacitor DLC is fed to a DC/AC voltage converter 1—for example a current-regulated step-down converter—by way of a first switch S1. An energy source, for example a battery B, can be connected additionally or alternatively to a DC/DC voltage converter 1 by way of a second switch S2.
The DC/DC voltage converter 1 is in turn connected electrically to an input of a DC/AC converter 2, which in this exemplary embodiment has an intermediate circuit capacitor C_Zand two transistors T1 and T2 connected as a half-bridge. The intermediate circuit capacitor C_Zcan either be charged by the double-layer capacitor DLC by way of the switch S1 or by the battery B by way of the switch S2. The output of this DC/AC voltage converter 2 between the two transistors T1 and T2 is connected to an AC bus 4, which in turn has a coupling capacitor CK₁to C_Knfor the cell Z₁to Z_nassigned to it.
A rectifier 3, in this instance comprising two diodes D_xa, D_xbrespectively, is disposed between each coupling capacitor C_Kx(x=1 . . . n) and the cell Z_xassigned to it. The diodes—D_xa—connect the terminal of the coupling capacitor C_Kxwith the terminal having the higher potential (hereafter referred to as the “positive terminal”) of the assigned cell Z_xin each instance, said terminal of the coupling capacitor C_Kxfacing away from the AC bus, and the diodes D_xbconnect said terminal to the terminal having the lower potential (hereafter referred to as the “negative terminal”) of said assigned cell Z_x.
The diode D_xais hereby poled from the coupling capacitor C_Kxtoward the positive terminal of the cell Z_xin the through-flow direction, while the diode D_xbis poled from the negative terminal of the cell Z_xtoward the coupling capacitor C_Kx.
The DC/AC voltage converter 2, in this exemplary embodiment comprising a half-bridge T1, T2, supplies a rectangular alternating voltage at its output between the two transistors T1 and T2, it being possible for the coupling capacitors C_K1to C_Knto transfer said rectangular alternating voltage to the individual cells Z₁to Z_n.
Different capacitor types can be used for the coupling capacitors. However the capacity, frequency and internal loss resistance of the capacitor must be aligned. Incorrect alignment would result in too great a charge reversal in the coupling capacitors, thereby having an adverse affect on the selectivity of the equalizing circuit in the long term.
The current is rectified again by way of the connected rectifier 3 (diodes D_1a, D_1bto D_na, D_nb) and fed to the cells Z₁to Z_nas a charging current.
To be able to achieve the equalizing of charges at the capacitor cells Z₁to Z_nof a double-layer capacitor DLC connected in series, energy must be tapped from those cells Z₁to Z_nhaving the highest voltage and be fed back to the cells at which the lowest voltage is present, such that these cells are charged.
The circuit can be sub-divided into three sub-circuits. The first part is a current source, which is advantageously in the form of a DC/DC switching controller 1. During a charge equalizing operation energy comes from the double-layer capacitor DLC itself or—during a charging process—from a second energy source, for example a battery B. This energy is fed to an intermediate circuit capacitor C_zof the second sub-circuit. All known variants of the DC/DC switching controller 1 are possible; it is advantageously configured as a step-down switching controller comprising transistors, inductor and freewheeling diode (not shown).
In addition to the intermediate circuit capacitor C_zthe second sub-circuit 2 has a bridge circuit, in this instance a half-bridge, comprising the two transistors T1 and T2, which is supplied from the intermediate circuit capacitor C_K, and the output of which is conducted by way of the AC bus 4 to all coupling capacitors C_K1to C_Kn. It generates an alternating voltage, in relation to reference potential GND (ground).
The third sub-circuit, the rectifier 3, is present once for each cell Z₁to Z_n. It converts the alternating current to a pulsing direct current flowing through the cells.
The charge equalizing process is described by way of example for a cell Z_x(where x=1 to n), which is to have the lowest cell voltage U_Zxin this exemplary embodiment.
The coupling capacitor C_Kxis charged in the negative phase of the alternating voltage signal (transistor T2 conducting current) by the lower diode D_xbto the lower potential (at the negative terminal of the cell) of the cell Z_x—minus the conducting-state voltage of the diode D_xb.
If the alternating voltage signal then increases the potential to a sufficient degree (transistor T1 conducting current), current flows from the intermediate circuit capacitor C_Zby way of transistor T1, the AC bus 4, the coupling capacitor C_Kzand the diode D_xathrough the cell Z_xand through all the cells, whose positive terminal has a smaller potential to reference potential GND than the positive terminal of the cell Z_xto be charged, in this instance the cells Z_x+1to Z_n, and from there back to the intermediate circuit capacitor C_Z.
In the next negative phase of the alternating voltage signal (transistor T1 conducting current again) the current flows in the reverse direction through the cells, whose positive terminals have a smaller potential to reference potential GND than the positive terminal of the cell Z_xto be charged, in other words the cells Z_nto Z_x+1, and now through diode D_xband the intermediate circuit capacitor C_Kx. The current circuit is closed by way of the AC bus 4 and the current-conducting transistor T2.
A pulsing direct charging current therefore results in the cell Z_x, while all the cells Z_x+1to Z_n, whose positive terminal has a smaller potential to reference potential GND, experience an alternating current.
The pulsing direct current can only flow into the cell Z_xwith the smallest cell voltage U_Zxand charges this cell first, until said cell reaches the next highest cell voltage of a further cell. The pulsing direct current is then distributed to these two cells, until it reaches the cell with what is then the next highest cell voltage, etc. The charges of the entire capacitor stack, in other words all the cells of the double-layer capacitor DLC, are thus equalized.
The energy, with which the respective cell Z_xof the double-layer capacitor DLC is charged, comes from the intermediate circuit capacitor C_z, which sets itself automatically to an appropriate voltage U_cz, due to this load on the one hand and the constant recharging on the other hand. This automatically means that the cell, at which the smallest voltage drops, receives the most energy, while cells (in this instance Z₁to Z_x−1and Z_x+1to Z_n), at which a higher cell voltage currently drops, receive no energy.
Top-quality high-capacitance coupling capacitors and diodes with low conducting-state voltages are particularly suitable here.
The inventive circuit has the following function groups:

- a current-regulated step-down converter 1, supplying the h-bridge 2,
- a self-clocking h-bridge 2,
- an AC bus 4, to which the individual cells are connected to tap the energy,
- coupling capacitors C_K1to C_Knfor isolation and energy transfer purposes, and
- a rectifier 3 with diodes D_1a, D_1bto D_na, D_nbto rectify the alternating current, which charges the cell having the smallest voltage in each instance.

FIG. 6 shows a further exemplary embodiment of the inventive circuit arrangement with a full bridge and a (Graetz) rectifier in a two-phase variant. Here too the cell Z_xis the one with the lowest cell-voltage U_Zx.
Parts with identical functions have the same reference characters here as in FIG. 5.
The circuit of the exemplary embodiment with two phases operates in a similar manner to the circuit of the exemplary embodiment described above and shown in FIG. 5 with a half-bridge and one phase. There are however certain advantages here which have to be offset against the additional outlay.
The exemplary embodiment according to FIG. 6 has as its DC/AC voltage converter 2 a full-bridge circuit with two half-bridges, comprising a first and second transistor T1-T2 or third and fourth transistor T3-T4, each being connected to a bus line 4.1, 4.2. Each bus line is supplied with energy by way of the half-bridge assigned to it.
The bus line 4.1 is connected to the cells Z₁to Z_nconnected in series, in each instance by way of a coupling capacitor C_K1ato C_Knaand a rectifier circuit comprising two diodes D_1a, D_1bto D_na, D_nbrespectively.
The bus line 4.2 is connected to the cells Z₁to Z_nconnected in series, in each instance by way of a coupling capacitor C_K1bto C_Knband a rectifier circuit 3 comprising two diodes D_1c, D_1dto D_nc, D_ndrespectively.
For the cell Z_xfor example this means: the bus line 4.1 connected to the half-bridge T1-T2 is connected by way of the coupling capacitor C_Kxaon the one hand by way of the diode D_xaconducting current toward the cell to the positive terminal of the cell Z_xand on the other hand by way of the diode D_xbconducting current toward the coupling capacitor to the negative terminal of the cell Z_x.
The bus line 4.2 connected to the half-bridge T3-T4 is also connected by way of the coupling capacitor C_Kxbon the one hand by way of the diode D_xcconducting current toward the cell to the positive terminal of the cell Z_xand on the other hand by way of the diode D_xdconducting current toward the coupling capacitor to the negative terminal of the cell Z_x.
The two rectifiers D_xa, D_xband D_xc, D_xdtherefore operate parallel to the cell Z_x. The circuit for all the other cells Z₁to Z_x−1and Z_x+1to Z_nlooks similar.
A significant advantage with two phases is that there is no alternating current through the cells that are not actually involved, which are currently not charged, in other words all the cells, whose positive terminal has a smaller potential to reference potential GND but higher cell voltages U_Zthan the cell Z_x(in other words through the cells Z_x+1to Z_nhere).
In this exemplary embodiment the two half-bridges operate in phase opposition, in other words when the transistors T1 and T4 conduct current in the first phase, the transistors T2 and T3 are non-conducting; this is reversed in the second phase: here the transistors T2 and T3 conduct current, while the transistors T1 and T4 are non-conducting.
In the first phase a current flows from the intermediate circuit capacitor C_Zby way of transistor T1 into the bus 4.1, by way of coupling capacitor C_Kxaand diode D_xathrough the cell Z_xand back by way of diode D_xd, coupling capacitor C_Kxb, the bus 4.2 and transistor T4 to the intermediate circuit capacitor CZ.
In the second phase a current flows from the intermediate circuit capacitor C_zby way of transistor T3 into the bus 4.2, by way of coupling capacitor C_Kxband diode D_xcthrough the cell Z_xand back by way of diode D_xb, coupling capacitor C_Kxa, the bus 4.1 and transistor T2 to the intermediate circuit capacitor C_z.
The recharging current of the one coupling capacitor C_Kxaand the discharging current of the other coupling capacitor C_Kxbcompensate for each other.
The step-down converter 1 taps the energy from the entire capacitor stack, comprising the individual cells Z connected in series, in other words the double-layer capacitor DLC. Energy can optionally be fed to the system by way of an additional switch S2.
The voltage at the respective AC bus increases until it corresponds to the lowest cell voltage plus one (exemplary embodiment according to FIG. 5) or two diode voltages (exemplary embodiment according to FIG. 6). This achieves very efficient recharging of the most discharged cell.
The circuit as a whole does not require any complex or expensive individual components.
The structure of the AC bus 4 or 4.1 or 4.2 means that the system can easily be expanded. Additional energy storage devices Z_n+1can easily be connected to the bus and superfluous ones can easily be removed.
The charge equalizing circuit can also be used to equalize the charges of other energy storage devices, for example batteries connected in series.
These circuit arrangements (DLC, rectifier diodes, coupling capacitors and bus line(s)) can be integrated both in the housing, which encloses the individual cells, or in a common housing. This provides a compact unit, which only has three or four terminals.

Claims

1-13. (canceled)

14. A device for equalizing charges of series-connected individual cells of an energy storage device, comprising:

a DC/DC converter connected by way of a first switch to a terminal of the energy storage device;

a DC/AC converter connected to an output of said DC/DC converter, said DC/AC converter containing an intermediate circuit capacitor and a bridge circuit;

at least one AC bus connected to an output of said DC/AC converter; and

a series circuit of at least one coupling capacitor and a rectifier connected between said at least one AC bus and each cell of the energy storage device.

15. The device according to claim 14, wherein said coupling capacitor has a first terminal connected to said AC bus and a second terminal, and said rectifier has a first diode conducting current from said second terminal of said coupling capacitor to a positive terminal of the respectively assigned cell and a second diode conducting current from a negative terminal of the cell to said second terminal of said coupling capacitor.

16. The device according to claim 14, which comprises a second switch enabling a connection of said DC/DC converter to a further energy source.

17. The device according to claim 14, wherein said DC/DC converter is a current-regulated step-down converter.

18. The device according to claim 14, wherein said bridge circuit of said DC/AC converter is a single-phase half-bridge with two transistors connected in series, and disposed parallel to said intermediate circuit capacitor.

19. The device according to claim 14, wherein said bridge circuit of said DC/AC converter is a multi-phase bridge with each phase being a half-bridge comprising two transistors connected in series, and disposed parallel to said intermediate circuit capacitor.

20. The device according to claim 14, wherein the energy storage device is a double-layer capacitor.

21. The device according to claim 14, wherein the energy storage device comprises a series circuit of storage batteries.

22. The device according to claim 18, wherein said bridge circuit of said DC/AC converter is a self-clocking circuit.

23. The device according to claim 19, wherein said bridge circuit of said DC/AC converter is a self-clocking circuit.

24. The device according to claim 14, wherein the energy storage device, said rectifier, said coupling capacitors and said AC bus are commonly integrated in a common housing.

25. A charge equalization method, comprising:

providing the device according to claim 14;

feeding, with the DC/DC converter supplied by the energy storage device or a further energy source, a current to the intermediate circuit capacitor, causing a voltage for charging the cells at the intermediate circuit capacitor;

inverting the voltage with the DC/AC converter and feeding a rectified pulsing charging current by way of the at least one AC bus, the respectively assigned coupling capacitors and the diodes of the rectifier to a cell of the energy storage device with a lowest cell voltage.

26. The method according to claim 25, wherein the DC/AC converter is a single-phase DC/AC converter, and a charging current for the cell with the lowest cell voltage flows in a positive phase from the intermediate circuit capacitor by way of the current-conducting first transistor, the AC bus, the coupling capacitor, and the diode to the cell and from the cell by way of all cells, having a positive terminal with a smaller potential to reference potential than a positive terminal of the cell to be charged, and by way of reference potential back to the intermediate circuit capacitor, and the charging current flows in a negative phase in a reverse direction from the now current-conducting second transistor through the cells of the energy storage device whose positive terminal have a smaller potential to reference potential than the positive terminal of the cell to be charged, through the diode, the coupling capacitor and the AC bus back to the second transistor.

27. The method according to claim 25, wherein the DC/AC converter is a multi-phase DC/AC converter, and a charging current for the cell with the lowest cell voltage flows in the first phase from the intermediate circuit capacitor by way of the first transistor, the first AC bus, coupling capacitor and diode, through the cell and back by way of the diode, the coupling capacitor, a second AC bus and a fourth transistor to the intermediate circuit capacitor, and in a second phase flows from the intermediate circuit capacitor by way of a third transistor, the AC bus, the coupling capacitor and the diode, through the cell and back by way of the diode, the coupling capacitor, the AC bus and the second transistor to the intermediate circuit capacitor.