US20080245554A1 - Fabrication method and structure of pcb assembly, and tool for assembly thereof - Google Patents

Fabrication method and structure of pcb assembly, and tool for assembly thereof Download PDF

Info

Publication number
US20080245554A1
US20080245554A1 US12/140,973 US14097308A US2008245554A1 US 20080245554 A1 US20080245554 A1 US 20080245554A1 US 14097308 A US14097308 A US 14097308A US 2008245554 A1 US2008245554 A1 US 2008245554A1
Authority
US
United States
Prior art keywords
pads
solder
electronic device
solder joints
openings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/140,973
Inventor
Chun-Chieh Pan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wistron Corp
Original Assignee
Wistron Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wistron Corp filed Critical Wistron Corp
Priority to US12/140,973 priority Critical patent/US20080245554A1/en
Publication of US20080245554A1 publication Critical patent/US20080245554A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05571Disposition the external layer being disposed in a recess of the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061Disposition
    • H01L2224/0612Layout
    • H01L2224/0615Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1301Shape
    • H01L2224/13012Shape in top view
    • H01L2224/13013Shape in top view being rectangular or square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1301Shape
    • H01L2224/13012Shape in top view
    • H01L2224/13014Shape in top view being circular or elliptic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1301Shape
    • H01L2224/13016Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13026Disposition relative to the bonding area, e.g. bond pad, of the semiconductor or solid-state body
    • H01L2224/13027Disposition relative to the bonding area, e.g. bond pad, of the semiconductor or solid-state body the bump connector being offset with respect to the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/1405Shape
    • H01L2224/14051Bump connectors having different shapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141Disposition
    • H01L2224/14104Disposition relative to the bonding areas, e.g. bond pads, of the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16237Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/17Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H01L2224/171Disposition
    • H01L2224/17104Disposition relative to the bonding areas, e.g. bond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09381Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/094Array of pads or lands differing from one another, e.g. in size, pitch, thickness; Using different connections on the pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/0465Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Definitions

  • the present invention relates to a fabrication method and structure of a Printed Circuit Board Assembly (PCB Assembly, hereinafter PBCA), and a tool for assembly thereof.
  • PCB Assembly hereinafter PBCA
  • FIG. 1A is a top view of a PCB 100 .
  • the PCB 100 has a solder mask 105 on a surface.
  • the solder mask 105 has a plurality of openings 102 with a width W and being arranged at a pitch P, wherein W is less than P and the pitch is the distance between geometric centers of two neighboring openings 102 .
  • a plurality of inner pads 103 and a plurality of outer pads 104 are exposed from the openings 102 .
  • the outer pads 104 are arranged beyond the inner pads 103 . As shown in FIG. 1A , two lines of solder pads 104 sandwich one line of solder pads 103 .
  • the pads 103 and 104 can be SMD (solder mask defined) pads, NSMD (non-solder mask defined) pads, SMD-NSMD combinations thereof, or other types of pads.
  • a closed dash line 106 indicates the predetermined position for attaching an electronic device to the PCB 100 subsequently.
  • FIG. 1B shows a top view of a conventional tool 150 for applying the solder paste over the PCB 100 using stencil printing method.
  • the tool 150 is a metal plate having a plurality of openings 151 arranged corresponding to pads 103 and 104 of PCB 100 .
  • solder volume overlying each pads 103 and 104 may vary.
  • the volumes of solder joints formed by reflowing the solder paste with the solder balls of the BGA package are different.
  • the volumes of adjacent solder joints 62 for some pads 103 and 104 are oversized, which may result in solder bridge defects.
  • FIG. 2B shows another possible defect.
  • the outer solder joints 62 are undersized, thus increases the possibility of unsoldering between pads 12 of electronic device 10 and pads 104 of PCB 100 , resulting in failure of electrical connection between pads 12 and pads 104 . Even if electrical connection is formed between pads 12 and pads 104 , the actual connecting area therebetween may be too small to provide sufficient mechanical strength and may affect product reliability.
  • embodiments of the invention provide a fabrication method, fabrication tool, and structure of PBCA, permitting larger alignment deviation during process and enhancing joint strength of outer solder joints thereof, to reduce process cost and improve product reliability.
  • Embodiments of the invention provide a printed circuit board assembly (PBCA) structure having a circuit board, at least one first solder joint, a plurality of second solder joints, and an electronic device.
  • the circuit board has a solder mask, having a plurality of openings exposing at least one first pad and a plurality of second pads arranged beyond the first pad, on a surface.
  • the first solder joint has a maximum width J 1 and electrically connects to the first pad.
  • the second solder joints respectively have a maximum width J 2 larger than J 1 and respectively electrically connect to the second pads.
  • the electronic device has a plurality of third pads, arranged substantially corresponding to the openings, respectively electrically connecting to the first pad and second pads.
  • Embodiments of the invention further provide a tool for forming solder paste on a plurality of pads of a circuit board.
  • the tool has a metal plate having at least one first opening and a plurality of second openings respectively arranged beyond and larger than the first opening.
  • the first and second openings arrange substantially corresponding to the pads.
  • Embodiments of the invention further provide a tool for forming solder paste on a plurality of pads of a circuit board.
  • the tool has a metal plate having at least one first opening and a plurality of second openings respectively arranged beyond the first opening.
  • the first and second openings arrange substantially corresponding to the pads.
  • the first opening is substantially round.
  • the second openings are respectively rounded rectangles.
  • Embodiments of the invention further provide a PCBA structure having a circuit board and an electronic device.
  • the circuit board has a plurality of first pads and a plurality of second pads arranged beyond the first pads.
  • the electronic device has a plurality of third pads arranged corresponding to the first and second pads.
  • the first pads electrically connect to the corresponding third pads respectively using a first solder joint.
  • the second pads electrically connect to the corresponding third pads respectively using a second solder joint.
  • a first angle between one of the first solder joints and the corresponding first pad exceeds a second angle between one of the second solder joints and the corresponding second pad.
  • Embodiments of the invention further provide a PCBA structure having a circuit board and an electronic device.
  • the circuit board has a circuit board having a plurality of first pads and a plurality of second pads arranged beyond the first pads.
  • the electronic device has a plurality of third pads arranging as the first and second pads.
  • the first pads electrically connect to the corresponding third pads respectively using a first solder joint.
  • the second pads electrically connect to the corresponding third pads respectively using a second solder joint.
  • the second solder joints are larger than the first solder joints.
  • Embodiments of the invention further provide a fabrication method for a PBCA structure.
  • a circuit board having a plurality of first pads and a plurality of second pads arranged beyond the first pads.
  • a tool is disposed overlying the circuit board.
  • the tool has a metal plate, having a plurality of first openings substantially exposing the first pads, and a plurality of second openings substantially exposing the second pads.
  • the second openings are larger than and are beyond the first pads.
  • solder paste is formed overlying every first and second pad using stencil printing.
  • the solder paste overlying the second pads is larger than that overlying the first pads.
  • the tool and circuit board are separated.
  • an electronic device is disposed overlying the circuit board.
  • the electronic device has a plurality of third pads substantially corresponding to the first pads and second pads.
  • the third pads respectively have solder bumps electrically connecting thereto.
  • the solder bumps substantially equal in size, are respectively disposed on the corresponding solder pastes. Further, the solder bumps and solder paste are reflowed.
  • the solder paste on the first pads and the solder bumps forms a plurality of melted first solder joints.
  • the solder pastes on the second pads and the solder bumps form a plurality of melted second solder joints.
  • the second solder joints exert upward attraction on the electronic device.
  • the first solder joints provide downward pull stress exerting on the electronic device. Finally, the first solder joints and second solder joints are solidified.
  • FIG. 1A is a top view of a PCB 100 .
  • FIG. 1B is a top view of a conventional tool 150 .
  • FIG. 2A is a cross-section of a conventional PCBA structure, wherein some solder joints are oversized, which may result in solder bridge defect.
  • FIG. 2B is a cross-section of a conventional PCBA structure, wherein the outer solder joints are undersized, which may result in unsoldering, failing to electrically connect corresponding pads.
  • FIG. 3 is a cross-section of a PCBA structure of the present invention.
  • FIG. 4 is a skeleton diagram of possible opening shapes of a tool of the present invention.
  • FIG. 5A is a top view of the tool of the present invention.
  • FIG. 5B is a skeleton diagram of a positional relationship between a third opening 303 on the upper-left corner in FIG. 5A and the corresponding pad 104 .
  • FIG. 6 is a cross-section of a step of aligning tool 300 and PCB 100 of a fabrication method of the present invention.
  • FIG. 7 is a cross-section of a step forming solder paste 50 overlying PCB 100 of the fabrication method of the present invention.
  • FIG. 8 is a top view illustrating an advantage of the PCBA structure of the present invention during the assembly procedure thereof.
  • FIG. 9 is a cross-section of FIG. 8 along line CC.
  • FIG. 10A is a cross-section illustrating the reflow procedure of second solder joints 62 of the present invention.
  • FIG. 10B is a cross-section illustrating the reflow procedure of second solder joints 61 of the present invention.
  • FIG. 11 is a top view of a PCB 200 of the second embodiment of the present invention.
  • FIG. 12 is a top view of a tool of the second embodiment of the present invention.
  • FIG. 13 is a cross-section of a PCBA structure of the second embodiment of the present invention.
  • FIG. 14A is a microscopic photograph of a solder joint 81 masked (C) in FIG. 13 .
  • FIG. 14B is a microscopic photograph of a solder joint 82 masked (D) in FIG. 13 .
  • FIG. 15 is a skeleton diagram of stress distribution on an electronic device 20 during reflow.
  • a PCBA structure of one embodiment of the present invention has a PCB 100 , at least one first solder joint 61 , a plurality of second solder joints 62 , and an electronic device 10 .
  • the PCB 100 has a solder mask 105 on a surface.
  • the solder mask 105 has a plurality of openings 102 with a width W and being arranged at a pitch P.
  • At least one first pad 103 and a plurality of second pads 104 arranged beyond the first pad 103 are exposed from the openings 102 .
  • the first solder joint 61 with a maximum width J 1 , electrically connects to the first pad 103 .
  • the second solder joint 62 with a maximum width J 2 wherein J 1 ⁇ J 2 , electrically connects to the second pads 104 .
  • the electronic device 10 has a plurality of third pads 12 that are arranged substantially corresponding to the openings 102 and are electrically connected to the corresponding first solder joint 61 or second solder joints 62 respectively.
  • the distance between adjacent first solder joint 61 and second solder joint 62 is larger than that of the prior-art structure shown in FIG. 2A , thus effectively prevents solder bridging.
  • the second solder joints 62 located at the outer region are wider, thus provides larger joint areas and improves the interconnecting strength thereof. Because the outer region joints often face higher mechanical stress, better interconnecting strength results in improved product reliability of the PCBA structure.
  • the widths of solder joints 61 and 62 are controlled by adjusting the solder paste volume overlying each pads 103 and 104 .
  • the opening of a conventional tool is circular with a width W, and the area of this circular opening is nW 2 /4.
  • a rectangular opening b with area W 2 can be used. Since solder paste may remain in four corners of opening b, a tool of this embodiment provides rounded rectangular openings c, with areas between nW 2 /4 and W 2 . The areas of openings c can be controlled by adjustment of the round corners thereof.
  • solder paste residue problem of the opening b may also be eliminated by other methods, such as truncating four corners of the rectangular opening b to create an octagonal opening. Furthermore, when distances between two openings are not concerned, wider round openings can be used.
  • FIG. 5A a tool 300 of one embodiment of the present invention is shown.
  • the tool 300 is designed to overlay solder paste onto the PCB 100 shown in FIG. 1A .
  • the tool has a metal plate 305 having at least one first opening 301 and a plurality of second openings 302 arranged corresponding to the pads of PCB 100 .
  • the second openings 302 are located at peripheral region around the first opening 301 , and the area of second opening 302 is bigger than that of first opening 301 .
  • the first opening 301 is disposed to correspond to the pad 103 for formation of the solder paste thereon.
  • the second openings 302 are disposed to respectively correspond to the pads 104 for formation of the solder pastes thereon.
  • the tool 300 of this embodiment shown in FIG. 5A preferably has third openings 303 located substantially corresponding to the corner second pads 104 for applying the solder paste onto the corner second pads 104 .
  • the position of those third openings 303 are shifted slightly outward relative to their corresponding second pads 104 .
  • the closed dash lines in FIG. 5A indicate positions perfectly matching the corresponding second pads 104 .
  • FIG. 5B shows a positional relation between the third opening 303 and the corresponding second pads 104 at the upper-left corner of the tool 300 in FIG. 5A , in which center 502 is the center of the opening 303 and center 501 is the center of second pad 104 .
  • Center 502 of the opening 303 shifts in an upper-left direction relative to the center 501 of the second pad 104 .
  • the opening 303 is substantially 12 mils wide, for example, the displacement thereof can be substantially 2 mils. Accordingly, Solder pastes 50 formed through opening 303 will also shift outwardly.
  • the other third openings 303 also respectively shift in a direction away from the center.
  • FIG. 6 shows a cross-section of the tool-PCB combination cut along line BB of FIG. 5A (or along line AA of FIG. 1 .
  • solder paste is then applied onto PCB 100 through tool 300 using stencil printing, and the tool 300 is removed.
  • solder paste 50 is respectively formed overlying pads 103 and 104 of PCB 100 .
  • the solder paste volumes overlying the second pads 104 exceed those overlying the first pad 103 because that the third openings 303 of tool 300 are larger than the first openings 301 .
  • the two second pads 104 shown in FIG. 7 are at corner position, thus the solder paste 50 overlaid thereon shifts outwardly.
  • the electronic device 10 is disposed on PCB 100 followed by formation of electrical connection therebetween using reflow process to form a PBCA shown in FIG. 3 .
  • the electronic device 10 can be a BGA package, WLP (wafer level package), semiconductor chip for flip chip technology, or connector.
  • the electronic device 10 typically has a plurality of solder bumps 13 with substantially the same dimensions, and a plurality of pads 12 arranged substantially corresponding to pads 103 and 104 of PCB 100 .
  • the solder bumps 13 respectively electrically connects to its corresponding pad 12 .
  • solder bumps 13 are respectively disposed on the corresponding solder pastes 50 .
  • the PCB assembling method according to this invention also includes self-alignment feature.
  • the first solder joints 61 and second solder joints 62 are formed after reflow process.
  • the solder joints 61 and 62 are in fluid state during reflow process, and the self-alignment mechanism is are explained hereunder.
  • FIG. 8 the misalignment of FIGS. 8 and 9 as example, the first solder joints 61 and second solder joints 62 , as shown in FIG. 2C , are formed after reflow process.
  • the solder joints 61 and 62 are in fluid state during reflow process, and the self-alignment mechanism is are explained hereunder.
  • FIG. 10A a skeleton diagram of one of the melted second solder joints 62 is shown, wherein dash lines r indicate a part of an implied sphere.
  • the melted second solder joints 62 move inward to become spherical as sphere r during reflow resulting from the cohesion thereof. This exerts upward stress on the electronic device 10 as an arrow in FIG. 10A .
  • FIG. 10B a skeleton diagram of the melted first solder joints 61 is shown, wherein dash lines r indicate a part of an implied sphere.
  • the melted second solder joint 61 moves outward to become spherical as sphere r during reflow resulting from the cohesion thereof, thus exerting downward attraction on the electronic device 10 as an arrow in FIG. 10B .
  • the push and pull stresses make the electronic device 10 “float” over the PCB 100 .
  • melted solder paste 50 and solder bumps 13 over the outer second pads 104 exert upward stresses on electronic device 10 along directions 71 and 73
  • the melted solder paste 50 and solder bumps 13 over the first pad 103 exert downward attraction on electronic device 10 along direction 72 , driving and moving the electronic device to the desired position 106 along a direction 74 .
  • the first solder joint 61 and second solder joints are solidified, achieving the PBCA structure shown in FIG. 3 .
  • fabrication of the PBCA structure of the present invention permits more alignment deviation between the electronic 10 and PCB 100 , improving the solder joint opening and/or short problems in the known art, especially when pitches P between openings 102 (shown in FIG. 1A ) are 0.5 mm or less.
  • the ratio of the maximum width J 2 of the second solder joints 62 to maximum width J 1 of the first solder joint 61 is preferably between 1.05 and 1.50, resulting in the second solder joints 62 being wider and sufficiently lantern-shaped to provide more joint areas and higher joint strengths and prevent solder bridge problems, thereby reducing the process cost and improving process yield of the PCBA structure of the present invention.
  • the wider second solder joints 62 further resist more fatigue against cycling external stress exerted thereon during transportation, warehousing, and use, thereby further improving product reliability.
  • FIG. 11 a top view of a PCB 200 of the second embodiment of the present invention is shown. Details regarding the solder mask 205 , openings 202 , first pads 203 , and second pads 204 are the same as those of the solder mask 105 , openings 102 , first pad 103 , and second pads 104 in the first embodiment, and thus, are omitted herefrom.
  • the first pads 203 are arranged in the closed dash line 207 , and the second pads 204 between closed dash lines 207 and 206 , beyond the first pads 203 .
  • the closed dash line 206 further indicates a desired position of an electronic device subsequently attached to the PCB 200 .
  • FIG. 12 a top view of a tool for forming solder paste overlying PCB 200 to form a PCBA structure of the second embodiment of the present invention (shown in FIG. 13 ) is shown. Details regarding the metal plate 405 , first openings 401 , and second openings 402 are the same as those of the metal plate 305 , first openings 301 , and second openings 302 in the first embodiment, and thus, are omitted herefrom. The second openings 402 in four corners shift outwardly as the third openings 303 shown in FIG. 5A .
  • FIG. 13 is a cross-section of the PBCA structure of the second embodiment of the present invention.
  • the cross-section of PCB 200 is along line DD in FIG. 11 .
  • Details regarding the electronic device 20 , pads 22 , first solder joints 81 , and second solder joints 82 are the same as those of the electronic device 10 , pads 12 , first solder joint 61 , and second solder joints 62 in the first embodiment, and thus, are omitted herefrom.
  • FIGS. 14A and 14B microscopic photographs of the first solder joint 81 marked (c) and second solder joint 82 marked (D) in FIG. 13 are shown.
  • the pitch P is substantially 0.5 mm (500 ⁇ m)
  • a maximum diameter (a maximum width in FIG. 14A ) of first solder joint, 81 is substantially 333 ⁇ m
  • a maximum diameter (a maximum width in FIG. 14B ) of first solder joint 81 is substantially 388 ⁇ m.
  • the ratio of the maximum width J 2 of first solder joint 81 to the maximum width J 1 of first solder joint 81 (J 2 /J 1 ) is substantially 1.17, one of the examples.
  • a fillet angle R 1 between the first solder joint 81 and first pad 203 is larger than a fillet angle R 2 between the second solder joint 82 and second pad 204 .
  • FIG. 15 a skeleton diagram of stress distribution on the electronic device 20 during reflow is shown.
  • the first solder joints 81 in the closed dash line 207 exert downward attraction to drive the electronic device 20 (shown transparently) moving to the center of the PCB 200 as the arrows.
  • the outer second solder joints 82 exert upward stress to support and float the electronic device 20 .

Abstract

A fabrication method and structure for a PBCA, and tool for assembly of the structure. The structure includes a circuit board, at least one first solder joint, a plurality of second solder joints, and an electronic device. The circuit board has a solder mask, having a plurality of openings exposing at least one first pad and a plurality of second pads arranged beyond the first pad, on a surface. The first solder joint has a maximum width J1 and electrically connects to the first pad. The second solder joints respectively have a maximum width J2 exceeding J1 and respectively electrically connect to the second pads. The electronic device has a plurality of third pads, arranged substantially corresponding to the openings, respectively electrically connecting to the first pad and second pads.

Description

    BACKGROUND
  • The present invention relates to a fabrication method and structure of a Printed Circuit Board Assembly (PCB Assembly, hereinafter PBCA), and a tool for assembly thereof.
  • Due to the demand for small-aspect, light and powerful electronic products, it is necessary for a design rule of a semiconductor chip to lay out denser wiring and more devices in a limited area thereof, resulting in increased density and decreased pitch of terminals on the semiconductor chip and/or package thereof. When attaching a BGA (ball grid array) package with terminal pitch of 0.5 mm or less, for example, on a circuit board, alignment therebetween presents extreme difficulty. Although more alignment deviations are acceptable when assembling the BGA package resulting from self-alignment capability of solder balls, acting as terminals, of the BGA package, the acceptable deviation decreases with ball pitch of the BGA package. When ball pitch of the BGA package is 0.5 mm or less, unacceptable alignment deviation between the BGA package and circuit board becomes more often, resulting in solder joint opening and/or short when reflowing the solder balls, thus requires reworking or scraping the circuit board, negatively affecting process yield and cost. Even if solder joints experience neither open nor short, the quality thereof may be negatively affected, resulting in a defect such as decreased joint area, making it impossible for solder joints to form ideal lantern shape. The farther the solder joints from the center of the BGA package, the more the alignment deviation, results in more deterioration of the joint quality. External stress on the outer solder joints increase during shipping, warehousing, and use of the assembled electronic device, accelerating fatigue on the outer solder joints, negatively affecting the reliability of the assembled electronic device.
  • FIG. 1A is a top view of a PCB 100. The PCB 100 has a solder mask 105 on a surface. The solder mask 105 has a plurality of openings 102 with a width W and being arranged at a pitch P, wherein W is less than P and the pitch is the distance between geometric centers of two neighboring openings 102. A plurality of inner pads 103 and a plurality of outer pads 104 are exposed from the openings 102. The outer pads 104 are arranged beyond the inner pads 103. As shown in FIG. 1A, two lines of solder pads 104 sandwich one line of solder pads 103. The pads 103 and 104 can be SMD (solder mask defined) pads, NSMD (non-solder mask defined) pads, SMD-NSMD combinations thereof, or other types of pads. A closed dash line 106 indicates the predetermined position for attaching an electronic device to the PCB 100 subsequently.
  • FIG. 1B shows a top view of a conventional tool 150 for applying the solder paste over the PCB 100 using stencil printing method. The tool 150 is a metal plate having a plurality of openings 151 arranged corresponding to pads 103 and 104 of PCB 100. When forming solder paste over the PCB 100, solder volume overlying each pads 103 and 104 may vary. As a result, the volumes of solder joints formed by reflowing the solder paste with the solder balls of the BGA package are different.
  • Referring to FIG. 2A, the volumes of adjacent solder joints 62 for some pads 103 and 104 are oversized, which may result in solder bridge defects. FIG. 2B shows another possible defect. The outer solder joints 62 are undersized, thus increases the possibility of unsoldering between pads 12 of electronic device 10 and pads 104 of PCB 100, resulting in failure of electrical connection between pads 12 and pads 104. Even if electrical connection is formed between pads 12 and pads 104, the actual connecting area therebetween may be too small to provide sufficient mechanical strength and may affect product reliability.
  • SUMMARY
  • Thus, embodiments of the invention provide a fabrication method, fabrication tool, and structure of PBCA, permitting larger alignment deviation during process and enhancing joint strength of outer solder joints thereof, to reduce process cost and improve product reliability.
  • Embodiments of the invention provide a printed circuit board assembly (PBCA) structure having a circuit board, at least one first solder joint, a plurality of second solder joints, and an electronic device. The circuit board has a solder mask, having a plurality of openings exposing at least one first pad and a plurality of second pads arranged beyond the first pad, on a surface. The first solder joint has a maximum width J1 and electrically connects to the first pad. The second solder joints respectively have a maximum width J2 larger than J1 and respectively electrically connect to the second pads. The electronic device has a plurality of third pads, arranged substantially corresponding to the openings, respectively electrically connecting to the first pad and second pads.
  • Embodiments of the invention further provide a tool for forming solder paste on a plurality of pads of a circuit board. The tool has a metal plate having at least one first opening and a plurality of second openings respectively arranged beyond and larger than the first opening. The first and second openings arrange substantially corresponding to the pads.
  • Embodiments of the invention further provide a tool for forming solder paste on a plurality of pads of a circuit board. The tool has a metal plate having at least one first opening and a plurality of second openings respectively arranged beyond the first opening. The first and second openings arrange substantially corresponding to the pads. The first opening is substantially round. The second openings are respectively rounded rectangles.
  • Embodiments of the invention further provide a PCBA structure having a circuit board and an electronic device. The circuit board has a plurality of first pads and a plurality of second pads arranged beyond the first pads. The electronic device has a plurality of third pads arranged corresponding to the first and second pads. The first pads electrically connect to the corresponding third pads respectively using a first solder joint. The second pads electrically connect to the corresponding third pads respectively using a second solder joint. A first angle between one of the first solder joints and the corresponding first pad exceeds a second angle between one of the second solder joints and the corresponding second pad.
  • Embodiments of the invention further provide a PCBA structure having a circuit board and an electronic device. The circuit board has a circuit board having a plurality of first pads and a plurality of second pads arranged beyond the first pads. The electronic device has a plurality of third pads arranging as the first and second pads. The first pads electrically connect to the corresponding third pads respectively using a first solder joint. The second pads electrically connect to the corresponding third pads respectively using a second solder joint. The second solder joints are larger than the first solder joints.
  • Embodiments of the invention further provide a fabrication method for a PBCA structure. First, a circuit board, having a plurality of first pads and a plurality of second pads arranged beyond the first pads, is provided. Then, a tool is disposed overlying the circuit board. The tool has a metal plate, having a plurality of first openings substantially exposing the first pads, and a plurality of second openings substantially exposing the second pads. The second openings are larger than and are beyond the first pads. Next, solder paste is formed overlying every first and second pad using stencil printing. The solder paste overlying the second pads is larger than that overlying the first pads. Next, the tool and circuit board are separated. Next, an electronic device is disposed overlying the circuit board. The electronic device has a plurality of third pads substantially corresponding to the first pads and second pads. The third pads respectively have solder bumps electrically connecting thereto. The solder bumps, substantially equal in size, are respectively disposed on the corresponding solder pastes. Further, the solder bumps and solder paste are reflowed. The solder paste on the first pads and the solder bumps forms a plurality of melted first solder joints. The solder pastes on the second pads and the solder bumps form a plurality of melted second solder joints. The second solder joints exert upward attraction on the electronic device. The first solder joints provide downward pull stress exerting on the electronic device. Finally, the first solder joints and second solder joints are solidified.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • Embodiments of the invention can be more fully understood by reading the subsequent detailed description in conjunction with the examples and references made to the accompanying drawings, wherein:
  • FIG. 1A is a top view of a PCB 100.
  • FIG. 1B is a top view of a conventional tool 150.
  • FIG. 2A is a cross-section of a conventional PCBA structure, wherein some solder joints are oversized, which may result in solder bridge defect.
  • FIG. 2B is a cross-section of a conventional PCBA structure, wherein the outer solder joints are undersized, which may result in unsoldering, failing to electrically connect corresponding pads.
  • FIG. 3 is a cross-section of a PCBA structure of the present invention.
  • FIG. 4 is a skeleton diagram of possible opening shapes of a tool of the present invention.
  • FIG. 5A is a top view of the tool of the present invention.
  • FIG. 5B is a skeleton diagram of a positional relationship between a third opening 303 on the upper-left corner in FIG. 5A and the corresponding pad 104.
  • FIG. 6 is a cross-section of a step of aligning tool 300 and PCB 100 of a fabrication method of the present invention.
  • FIG. 7 is a cross-section of a step forming solder paste 50 overlying PCB 100 of the fabrication method of the present invention.
  • FIG. 8 is a top view illustrating an advantage of the PCBA structure of the present invention during the assembly procedure thereof.
  • FIG. 9 is a cross-section of FIG. 8 along line CC.
  • FIG. 10A is a cross-section illustrating the reflow procedure of second solder joints 62 of the present invention.
  • FIG. 10B is a cross-section illustrating the reflow procedure of second solder joints 61 of the present invention.
  • FIG. 11 is a top view of a PCB 200 of the second embodiment of the present invention.
  • FIG. 12 is a top view of a tool of the second embodiment of the present invention.
  • FIG. 13 is a cross-section of a PCBA structure of the second embodiment of the present invention.
  • FIG. 14A is a microscopic photograph of a solder joint 81 masked (C) in FIG. 13.
  • FIG. 14B is a microscopic photograph of a solder joint 82 masked (D) in FIG. 13.
  • FIG. 15 is a skeleton diagram of stress distribution on an electronic device 20 during reflow.
  • DETAILED DESCRIPTION OF THE INVENTION
  • The following embodiments are intended to illustrate the invention more fully without limiting the scope of the claims.
  • In FIG. 3, a PCBA structure of one embodiment of the present invention has a PCB 100, at least one first solder joint 61, a plurality of second solder joints 62, and an electronic device 10. The PCB 100 has a solder mask 105 on a surface. The solder mask 105 has a plurality of openings 102 with a width W and being arranged at a pitch P. At least one first pad 103 and a plurality of second pads 104 arranged beyond the first pad 103 are exposed from the openings 102. The first solder joint 61, with a maximum width J1, electrically connects to the first pad 103. The second solder joint 62, with a maximum width J2 wherein J1<J2, electrically connects to the second pads 104. The electronic device 10 has a plurality of third pads 12 that are arranged substantially corresponding to the openings 102 and are electrically connected to the corresponding first solder joint 61 or second solder joints 62 respectively. In this embodiment, the distance between adjacent first solder joint 61 and second solder joint 62 is larger than that of the prior-art structure shown in FIG. 2A, thus effectively prevents solder bridging. In addition, the second solder joints 62 located at the outer region are wider, thus provides larger joint areas and improves the interconnecting strength thereof. Because the outer region joints often face higher mechanical stress, better interconnecting strength results in improved product reliability of the PCBA structure.
  • In this embodiment, the widths of solder joints 61 and 62 are controlled by adjusting the solder paste volume overlying each pads 103 and 104. Referring to FIG. 4, the opening of a conventional tool is circular with a width W, and the area of this circular opening is nW2/4. In order to increase the volume of attached solder paste by increasing the opening area without affecting the width W, a rectangular opening b with area W2 can be used. Since solder paste may remain in four corners of opening b, a tool of this embodiment provides rounded rectangular openings c, with areas between nW2/4 and W2. The areas of openings c can be controlled by adjustment of the round corners thereof. The solder paste residue problem of the opening b may also be eliminated by other methods, such as truncating four corners of the rectangular opening b to create an octagonal opening. Furthermore, when distances between two openings are not concerned, wider round openings can be used.
  • In FIG. 5A, a tool 300 of one embodiment of the present invention is shown. The tool 300 is designed to overlay solder paste onto the PCB 100 shown in FIG. 1A. The tool has a metal plate 305 having at least one first opening 301 and a plurality of second openings 302 arranged corresponding to the pads of PCB 100.substantially The second openings 302 are located at peripheral region around the first opening 301, and the area of second opening 302 is bigger than that of first opening 301. The first opening 301 is disposed to correspond to the pad 103 for formation of the solder paste thereon. The second openings 302 are disposed to respectively correspond to the pads 104 for formation of the solder pastes thereon.
  • During manufacturing process of the PBCA shown in FIG. 3, especially during thermal process such as reflow, oftentimes larger alignment deviation happens in the corner region of the electronic device 10, which results in solder bridge between the second solder joint 62 and its neighboring solder joint 61/62. to avoid such undesired solder bridge, the tool 300 of this embodiment shown in FIG. 5A preferably has third openings 303 located substantially corresponding to the corner second pads 104 for applying the solder paste onto the corner second pads 104. The position of those third openings 303 are shifted slightly outward relative to their corresponding second pads 104. The closed dash lines in FIG. 5A indicate positions perfectly matching the corresponding second pads 104. FIG. 5B shows a positional relation between the third opening 303 and the corresponding second pads 104 at the upper-left corner of the tool 300 in FIG. 5A, in which center 502 is the center of the opening 303 and center 501 is the center of second pad 104. Center 502 of the opening 303 shifts in an upper-left direction relative to the center 501 of the second pad 104. When the opening 303 is substantially 12 mils wide, for example, the displacement thereof can be substantially 2 mils. Accordingly, Solder pastes 50 formed through opening 303 will also shift outwardly. The other third openings 303 also respectively shift in a direction away from the center.
  • In FIG. 6, the tool 300 shown in FIG. 5A is aligned with and disposed above a PCB 100. FIG. 6 shows a cross-section of the tool-PCB combination cut along line BB of FIG. 5A (or along line AA of FIG. 1.
  • Solder paste is then applied onto PCB 100 through tool 300 using stencil printing, and the tool 300 is removed. In FIG. 7, solder paste 50 is respectively formed overlying pads 103 and 104 of PCB 100. The solder paste volumes overlying the second pads 104 exceed those overlying the first pad 103 because that the third openings 303 of tool 300 are larger than the first openings 301. The two second pads 104 shown in FIG. 7 are at corner position, thus the solder paste 50 overlaid thereon shifts outwardly.
  • Next an electronic device 10 is disposed on PCB 100 followed by formation of electrical connection therebetween using reflow process to form a PBCA shown in FIG. 3. The electronic device 10 can be a BGA package, WLP (wafer level package), semiconductor chip for flip chip technology, or connector. In FIGS. 8 and 9, the electronic device 10 typically has a plurality of solder bumps 13 with substantially the same dimensions, and a plurality of pads 12 arranged substantially corresponding to pads 103 and 104 of PCB 100. The solder bumps 13 respectively electrically connects to its corresponding pad 12.substantially As seen in FIG. 9, solder bumps 13 are respectively disposed on the corresponding solder pastes 50.
  • It is very often that misalignment or mechanical deviation occurs when assembling the electronic device 10 with PCB 100, such as the upper-right shift of electronic device 10 shown in FIG. 8, in which the accurate position is denoted by the dotted line 106. As described previously, alignment of components becomes more difficult as the pitch gets smaller. The PCB assembling method according to this invention also includes self-alignment feature. Using the misalignment of FIGS. 8 and 9 as example, the first solder joints 61 and second solder joints 62, as shown in FIG. 2C, are formed after reflow process. The solder joints 61 and 62 are in fluid state during reflow process, and the self-alignment mechanism is are explained hereunder. In FIG. 10A, a skeleton diagram of one of the melted second solder joints 62 is shown, wherein dash lines r indicate a part of an implied sphere. The melted second solder joints 62 move inward to become spherical as sphere r during reflow resulting from the cohesion thereof. This exerts upward stress on the electronic device 10 as an arrow in FIG. 10A. In FIG. 10B, a skeleton diagram of the melted first solder joints 61 is shown, wherein dash lines r indicate a part of an implied sphere. The melted second solder joint 61 moves outward to become spherical as sphere r during reflow resulting from the cohesion thereof, thus exerting downward attraction on the electronic device 10 as an arrow in FIG. 10B. Thus, the push and pull stresses make the electronic device 10 “float” over the PCB 100.
  • In FIG. 9, melted solder paste 50 and solder bumps 13 over the outer second pads 104 exert upward stresses on electronic device 10 along directions 71 and 73, and the melted solder paste 50 and solder bumps 13 over the first pad 103 exert downward attraction on electronic device 10 along direction 72, driving and moving the electronic device to the desired position 106 along a direction 74. Finally, the first solder joint 61 and second solder joints are solidified, achieving the PBCA structure shown in FIG. 3. Thus, fabrication of the PBCA structure of the present invention permits more alignment deviation between the electronic 10 and PCB 100, improving the solder joint opening and/or short problems in the known art, especially when pitches P between openings 102 (shown in FIG. 1A) are 0.5 mm or less.
  • The ratio of the maximum width J2 of the second solder joints 62 to maximum width J1 of the first solder joint 61 is preferably between 1.05 and 1.50, resulting in the second solder joints 62 being wider and sufficiently lantern-shaped to provide more joint areas and higher joint strengths and prevent solder bridge problems, thereby reducing the process cost and improving process yield of the PCBA structure of the present invention. The wider second solder joints 62 further resist more fatigue against cycling external stress exerted thereon during transportation, warehousing, and use, thereby further improving product reliability.
  • In FIG. 11, a top view of a PCB 200 of the second embodiment of the present invention is shown. Details regarding the solder mask 205, openings 202, first pads 203, and second pads 204 are the same as those of the solder mask 105, openings 102, first pad 103, and second pads 104 in the first embodiment, and thus, are omitted herefrom. The first pads 203 are arranged in the closed dash line 207, and the second pads 204 between closed dash lines 207 and 206, beyond the first pads 203. The closed dash line 206 further indicates a desired position of an electronic device subsequently attached to the PCB 200.
  • In FIG. 12, a top view of a tool for forming solder paste overlying PCB 200 to form a PCBA structure of the second embodiment of the present invention (shown in FIG. 13) is shown. Details regarding the metal plate 405, first openings 401, and second openings 402 are the same as those of the metal plate 305, first openings 301, and second openings 302 in the first embodiment, and thus, are omitted herefrom. The second openings 402 in four corners shift outwardly as the third openings 303 shown in FIG. 5A.
  • FIG. 13 is a cross-section of the PBCA structure of the second embodiment of the present invention. The cross-section of PCB 200 is along line DD in FIG. 11. Details regarding the electronic device 20, pads 22, first solder joints 81, and second solder joints 82 are the same as those of the electronic device 10, pads 12, first solder joint 61, and second solder joints 62 in the first embodiment, and thus, are omitted herefrom.
  • In FIGS. 14A and 14B, microscopic photographs of the first solder joint 81 marked (c) and second solder joint 82 marked (D) in FIG. 13 are shown. The pitch P is substantially 0.5 mm (500 μm), a maximum diameter (a maximum width in FIG. 14A) of first solder joint, 81 is substantially 333 μm, a maximum diameter (a maximum width in FIG. 14B) of first solder joint 81 is substantially 388 μm. The ratio of the maximum width J2 of first solder joint 81 to the maximum width J1 of first solder joint 81 (J2/J1) is substantially 1.17, one of the examples. Further, a fillet angle R1 between the first solder joint 81 and first pad 203 is larger than a fillet angle R2 between the second solder joint 82 and second pad 204.
  • In FIG. 15, a skeleton diagram of stress distribution on the electronic device 20 during reflow is shown. The first solder joints 81 in the closed dash line 207 exert downward attraction to drive the electronic device 20 (shown transparently) moving to the center of the PCB 200 as the arrows. The outer second solder joints 82 exert upward stress to support and float the electronic device 20.
  • Although the present invention has been particularly shown and described with reference to the preferred specific embodiments and examples, it is anticipated that alterations and modifications thereof will no doubt become apparent to those skilled in the art. It is therefore intended that the following claims be interpreted as covering all such alteration and modifications as fall within the true spirit and scope of the present invention.

Claims (5)

1-14. (canceled)
15. A PCB assembly structure, comprising:
a circuit board comprising a plurality of first pads and a plurality of second pads wherein the second pads are arranged outside the first pads; and
an electronic device comprising a plurality of third pads arranged corresponding to the first and second pads, the first pads electrically connecting to the corresponding third pads using a plurality of first solder joints, the second pads electrically connecting to the corresponding third pads using a plurality of second solder joints;
wherein a first angle is formed between one of the first solder joints and the corresponding first pad, a second angle is formed between one of the second solder joints and the corresponding second pad, and the first angle is larger than the second angle.
16. A PCB assembly structure, comprising:
a circuit board comprising a plurality of first pads and a plurality of second pads, wherein the second pads are arranged outside the first pads, and the sizes of the first and second pads are substantially the same; and
an electronic device comprising a plurality of third pads arranged corresponding to the first and second pads, the first pads electrically connecting to the corresponding third pads using a plurality of first solder joints, the second pads electrically connecting to the corresponding third pads using a plurality of second solder joints;
wherein the volume of the second solder joint exceeds the volume of the first solder joint.
17. A method for assembling an electronic structure, comprising the following steps:
providing a circuit board having a plurality of first pads and a plurality of second pads in which the second pads are arranged outside the first pads;
disposing a tool over the circuit board, the tool comprising a metal plate having a plurality of first openings substantially corresponding to the first pads and a plurality of second
openings substantially corresponding to the second pads, wherein the measure of area of the second opening is larger than the measure of area of the first opening;
applying solder paste on the first and second pads through the first and second openings;
separating the tool and the circuit board;
disposing an electronic device over the circuit board, the electronic device comprising a plurality of third pads arranged substantially corresponding to the first and second pads and a plurality of solder bumps electrically connected to the third pads respectively, the solder bumps contacting their corresponding solder pastes respectively;
reflowing the solder bumps and solder paste, wherein the first solder pastes combine with their corresponding solder bumps to form a plurality of melted first solder joints, and wherein the second solder pastes combine with their corresponding solder bumps to form a plurality of melted second solder joints; and
solidifying the first and second solder joints.
18. The structure as claimed in claim 15, wherein the sizes of the first and second pads are substantially the same.
US12/140,973 2004-04-05 2008-06-17 Fabrication method and structure of pcb assembly, and tool for assembly thereof Abandoned US20080245554A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/140,973 US20080245554A1 (en) 2004-04-05 2008-06-17 Fabrication method and structure of pcb assembly, and tool for assembly thereof

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
TW093109332A TWI232072B (en) 2004-04-05 2004-04-05 Method and structure for printed circuit board assembly and jig for assembling structure
TWTW93109332 2004-04-05
US11/100,005 US7307221B2 (en) 2004-04-05 2005-04-05 Fabrication method and structure of PCB assembly, and tool for assembly thereof
US11/858,837 US7665648B2 (en) 2004-04-05 2007-09-20 Fabrication method and structure of PCB assembly, and tool for assembly thereof
US12/140,973 US20080245554A1 (en) 2004-04-05 2008-06-17 Fabrication method and structure of pcb assembly, and tool for assembly thereof

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US11/858,837 Division US7665648B2 (en) 2004-04-05 2007-09-20 Fabrication method and structure of PCB assembly, and tool for assembly thereof

Publications (1)

Publication Number Publication Date
US20080245554A1 true US20080245554A1 (en) 2008-10-09

Family

ID=35053040

Family Applications (3)

Application Number Title Priority Date Filing Date
US11/100,005 Expired - Fee Related US7307221B2 (en) 2004-04-05 2005-04-05 Fabrication method and structure of PCB assembly, and tool for assembly thereof
US11/858,837 Expired - Fee Related US7665648B2 (en) 2004-04-05 2007-09-20 Fabrication method and structure of PCB assembly, and tool for assembly thereof
US12/140,973 Abandoned US20080245554A1 (en) 2004-04-05 2008-06-17 Fabrication method and structure of pcb assembly, and tool for assembly thereof

Family Applications Before (2)

Application Number Title Priority Date Filing Date
US11/100,005 Expired - Fee Related US7307221B2 (en) 2004-04-05 2005-04-05 Fabrication method and structure of PCB assembly, and tool for assembly thereof
US11/858,837 Expired - Fee Related US7665648B2 (en) 2004-04-05 2007-09-20 Fabrication method and structure of PCB assembly, and tool for assembly thereof

Country Status (2)

Country Link
US (3) US7307221B2 (en)
TW (1) TWI232072B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100147570A1 (en) * 2007-09-06 2010-06-17 Murata Manufacturing Co., Ltd. Circuit substrate and circuit substrate manufacturing method
US20130077275A1 (en) * 2011-09-27 2013-03-28 Renesas Electronics Corporation Electronic device, wiring substrate, and method for manufacturing electronic device
US20130180772A1 (en) * 2011-12-20 2013-07-18 Ngk Spark Plug Co., Ltd. Wiring board and method of manufacturing the same

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007184381A (en) * 2006-01-06 2007-07-19 Matsushita Electric Ind Co Ltd Flip chip mounting circuit board, its manufacturing method, semiconductor device, and its manufacturing method
TWI302812B (en) * 2006-07-20 2008-11-01 Phoenix Prec Technology Corp Pcb electrical connection terminal structure and manufacturing method thereof
JP5356647B2 (en) * 2006-12-25 2013-12-04 新光電気工業株式会社 Mounting board and electronic device
TW200946000A (en) * 2008-04-18 2009-11-01 Wistron Corp Display that can be assembled in a force-saving manner and method for assembling the display
TWI332292B (en) * 2008-10-20 2010-10-21 Wistron Corp Sinking type connector and combination of sinking type connector and printed circuit board
KR101065963B1 (en) * 2009-07-28 2011-09-19 삼성에스디아이 주식회사 Battery Pack and Manufacturing Method for the Same
US9437534B2 (en) 2012-02-29 2016-09-06 Mediatek Inc. Enhanced flip chip structure using copper column interconnect
US9064757B2 (en) 2012-02-29 2015-06-23 Mediatek Inc. Enhanced flip chip structure using copper column interconnect
CN103624718B (en) * 2013-12-12 2015-07-22 天津市中环通讯技术有限公司 Multifunctional printed circuit board assembly (PCBA) maintenance tray support
RU2725617C2 (en) * 2016-03-01 2020-07-03 Кардлаб Апс Circuit layer for a card with integrated circuit
US11033990B2 (en) * 2018-11-29 2021-06-15 Raytheon Company Low cost approach for depositing solder and adhesives in a pattern for forming electronic assemblies
US10916518B2 (en) * 2019-04-22 2021-02-09 Mikro Mesa Technology Co., Ltd. Electrical binding structure and method of forming the same
US11553871B2 (en) 2019-06-04 2023-01-17 Lab NINE, Inc. System and apparatus for non-invasive measurement of transcranial electrical signals, and method of calibrating and/or using same for various applications

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3871015A (en) * 1969-08-14 1975-03-11 Ibm Flip chip module with non-uniform connector joints
US20050266613A1 (en) * 2003-03-31 2005-12-01 Intel Corporation Integrated circuit packages with reduced stress on die and associated methods
US20060216860A1 (en) * 2005-03-25 2006-09-28 Stats Chippac, Ltd. Flip chip interconnection having narrow interconnection sites on the substrate
US7358174B2 (en) * 2004-04-13 2008-04-15 Amkor Technology, Inc. Methods of forming solder bumps on exposed metal pads
US7531898B2 (en) * 2002-06-25 2009-05-12 Unitive International Limited Non-Circular via holes for bumping pads and related structures

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5431332A (en) * 1994-02-07 1995-07-11 Motorola, Inc. Method and apparatus for solder sphere placement using an air knife
US6157079A (en) * 1997-11-10 2000-12-05 Citizen Watch Co., Ltd Semiconductor device with a bump including a bump electrode film covering a projecting photoresist
US6406988B1 (en) * 1998-04-24 2002-06-18 Amerasia International Technology, Inc. Method of forming fine pitch interconnections employing magnetic masks
JP3399518B2 (en) * 1999-03-03 2003-04-21 インターナショナル・ビジネス・マシーンズ・コーポレーション Semiconductor structure and method of manufacturing the same
JP4237325B2 (en) * 1999-03-11 2009-03-11 株式会社東芝 Semiconductor device and manufacturing method thereof
US6386435B1 (en) * 2000-08-11 2002-05-14 Emc Corporation Systems and methods for distributing solder paste using a tool having a solder paste aperture with a non-circular cross-sectional shape
TW498506B (en) * 2001-04-20 2002-08-11 Advanced Semiconductor Eng Flip-chip joint structure and the processing thereof
US6988652B2 (en) * 2002-05-17 2006-01-24 Fry's Metals, Inc. Solder printing using a stencil having a reverse-tapered aperture

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3871015A (en) * 1969-08-14 1975-03-11 Ibm Flip chip module with non-uniform connector joints
US7531898B2 (en) * 2002-06-25 2009-05-12 Unitive International Limited Non-Circular via holes for bumping pads and related structures
US20050266613A1 (en) * 2003-03-31 2005-12-01 Intel Corporation Integrated circuit packages with reduced stress on die and associated methods
US7358174B2 (en) * 2004-04-13 2008-04-15 Amkor Technology, Inc. Methods of forming solder bumps on exposed metal pads
US20060216860A1 (en) * 2005-03-25 2006-09-28 Stats Chippac, Ltd. Flip chip interconnection having narrow interconnection sites on the substrate

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100147570A1 (en) * 2007-09-06 2010-06-17 Murata Manufacturing Co., Ltd. Circuit substrate and circuit substrate manufacturing method
US8279618B2 (en) * 2007-09-06 2012-10-02 Murata Manufacturing Co., Ltd. Circuit substrate and circuit substrate manufacturing method
US20130077275A1 (en) * 2011-09-27 2013-03-28 Renesas Electronics Corporation Electronic device, wiring substrate, and method for manufacturing electronic device
US8975528B2 (en) * 2011-09-27 2015-03-10 Renesas Electronics Corporation Electronic device, wiring substrate, and method for manufacturing electronic device
US20130180772A1 (en) * 2011-12-20 2013-07-18 Ngk Spark Plug Co., Ltd. Wiring board and method of manufacturing the same

Also Published As

Publication number Publication date
US7307221B2 (en) 2007-12-11
TW200534756A (en) 2005-10-16
TWI232072B (en) 2005-05-01
US20050217894A1 (en) 2005-10-06
US20080023528A1 (en) 2008-01-31
US7665648B2 (en) 2010-02-23

Similar Documents

Publication Publication Date Title
US7307221B2 (en) Fabrication method and structure of PCB assembly, and tool for assembly thereof
TWI404114B (en) Flip chip interconnection having narrow interconnection sites on the substrate
US7902666B1 (en) Flip chip device having soldered metal posts by surface mounting
US20060255473A1 (en) Flip chip interconnect solder mask
US6514845B1 (en) Solder ball contact and method
US5926731A (en) Method for controlling solder bump shape and stand-off height
US7659633B2 (en) Solder joint flip chip interconnection having relief structure
US20120273943A1 (en) Solder Joint Flip Chip Interconnection Having Relief Structure
US6498307B2 (en) Electronic component package, printing circuit board, and method of inspecting the printed circuit board
JP2011142185A (en) Semiconductor device
US7719853B2 (en) Electrically connecting terminal structure of circuit board and manufacturing method thereof
US7436682B2 (en) Wiring board, electronic component mounting structure, and electronic component mounting method
JPH11111771A (en) Method for connecting wiring board, carrier board and wiring board
US20100140796A1 (en) Manufacturing method of semiconductor device, and semiconductor device
JP3942952B2 (en) Reflow soldering method
JP2007201356A (en) Mounting method of shield
JP2002246512A (en) Structure of bga package and structure of mount substrate
JP2008140868A (en) Multilayer wiring board and semiconductor device
JP2001230537A (en) Method for forming solder bump
KR100746362B1 (en) Package on package substrate and the manufacturing method thereof
JP2007067129A (en) Mounting structure of semiconductor device
JP2005340230A (en) Method of manufacturing printed circuit board and part package
JP3498458B2 (en) Hybrid integrated circuit device
JP3183278B2 (en) Ball grid array type semiconductor package and its mounting structure
WO2022249408A1 (en) Solder connection method

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION