US20070125833A1 - Method for improved high current component interconnections - Google Patents
Method for improved high current component interconnections Download PDFInfo
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- US20070125833A1 US20070125833A1 US11/657,197 US65719707A US2007125833A1 US 20070125833 A1 US20070125833 A1 US 20070125833A1 US 65719707 A US65719707 A US 65719707A US 2007125833 A1 US2007125833 A1 US 2007125833A1
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- solder
- circuit board
- printed circuit
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- solder balls
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3478—Applying solder preforms; Transferring prefabricated solder patterns
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/041—Solder preforms in the shape of solder balls
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0548—Masks
- H05K2203/0557—Non-printed masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
A printed circuit board having at least one conductive region covered in solder paste has preformed solder elements placed on the solder paste in the conductive region. A component package is placed onto the printed circuit board over the conductive region and the solder is reflowed, forming a wide solder interconnection between the component and the conductive region of the printed circuit board.
Description
- This application is a divisional of prior application Ser. No. 10/427,681, filed Apr. 30, 2003.
- 1. Field of the Invention
- The present invention relates generally to the field of electronic printed circuit boards, and more specifically to forming solder interconnections on the printed circuit board.
- 2. Discussion of Related Art
- Demands on power delivery have increased as part of the effort to achieve higher performance in logic silicon products. Higher currents, better current transient response and bypass capacitance are frequently the key parameters sought in successful power delivery design. One potential power delivery bottleneck is in the printed circuit board-component interface. For example, a power MOSFET-board interface can introduce a substantial amount series resistance and thereby limit the effectiveness of the power delivery system. Currently, many standard off-the-shelf ball grid array (BGA) MOSFET components use similar interconnect structures for both the power and signal connection even though the electrical and thermal requirements for power and signaling can be different.
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FIGS. 1A, 1B , and 1C illustrate an exemplary means of the current art for forming an interconnection between a component in astandard BGA package 102 and aprinted circuit board 100.FIG. 1A illustrates a top view of a printedcircuit board 100 withcomponent 102 positioned above it. The printed circuit boardconductive planes 106 extend underneath theBGA component package 102. The conductive planes may be either power or ground planes. These planes are covered by an array of individualsolder paste pads 108. The printed circuit board also containssignal traces 105 that are each connected to a conductive pad covered withsolder paste 108.Individual solder balls 120 from theBGA component package 102 form the connection between the pads and the component for both the signal interconnections and the conductive plane interconnections. -
FIG. 1B illustrates a side view ofcomponent 102 positioned over printedcircuit board 100.Component solder balls 120 are positioned oversolder paste pads 108, connectingcomponent solder balls 120 tosignal pads 104 andconductive plane 106.Solder mask 101 protects areas of the printed circuit board that are not to be covered by solder. -
FIG. 1C illustrates thecomponent 102 and printedcircuit board 100 ofFIG. 1B after thecomponent solder balls 120 andsolder paste 108 have been reflowed to form anelectrical interconnection 122. Although thecomponent standoff 126 created by this method may be adequate, the electrical interconnection between thecomponent 102 and the printed circuit board is quite narrow in theconductive plane region 106. - The relatively low volume solder ball of the BGA limits the size of the component—power plane interface. The
smaller interconnects 122 formed using the prior art method limit current to the component. These smaller interconnects are highly resistive, and can limit the effectiveness of the power delivery system. In addition, the resulting high current density can result in excessive parasitic inductance. It is advantageous to remove this bottleneck by widening the power interface. A wider power interface has several advantages, including reduced resistance and increased heat transfer between the package and the printed circuit board. Though a wider power interface is desired, it is also advantageous to avoid altering the design of a commodity product like a MOSFET. - As illustrated in
FIGS. 2A and 2B , a wider conductive interconnection may be formed on the printed circuit board by replacing an array of solder paste pads over a conductive region with a larger region ofsolder paste 109. This may not provide for an optimal solder interconnection, however. Solder paste 108 coverssignal pads 104, forming aninterconnection 122 between the signal pads and the component solder balls after solder reflow.Solder paste region 109 coversconductive plane 106, forming aninterconnection 123 between the conductive plane and the component solder balls after solder reflow. As illustrated inFIG. 2B , the volume of solder provided bysolder paste region 109 andsolder balls 120 may not be sufficient to entirely fill thesolder interconnection area 123 after solder reflow.Solder voids 124 and solder separation will result from insufficient solder volume. Furthermore, the resultingcomponent standoff 126 will be less than the desired standoff when an inadequate amount of solder is used in forming interconnections. - In some cases, additional solder volume can be provided by the component, either by adding additional solder balls to the component, or by using larger solder balls on the component. However, this requires a change in product design by the component vendor to accommodate the additional solder on the component package.
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FIGS. 3A and 3B illustrate an exemplary means of the current art for providing a wider power interface between the component and the printed circuit board.FIG. 3A illustrates a bottom view of astandard component package 102 containing no solder.Conductive pads 121 andsignal pad 122 are located on the bottom ofcomponent package 102. -
FIG. 3B illustrates the interconnect formed betweenpackage 102 and printedcircuit board 100 after the conductive pads of the component are placed onto a layer of solder paste and the solder paste is reflowed. After reflow,solder interconnections 123 are formed betweenconductive pads 121 andconductive planes 106, and betweenconductive signal pad 122 andsignal pad 104. Thecomponent package 102 contains no solder on eitherconductive pads 121 orsignal pad 122, so the manufacturer must rely on solder paste alone to make up the entire solder volume of the solder interconnect between the component and the printed circuit board. Because of limitations on the amount of solder paste that can practically be applied to the printed circuit board, the solder paste alone provides insufficient solder volume to entirely fill thesolder interconnections 123. Solder separation may occur, orsolder voids 124 may be formed with thesolder interconnections 123. Furthermore, thecomponent standoff 126 formed by this method is less than the ideal component standoff. To avoid these problems, additional solder volume must be added to the solder interconnection. -
FIGS. 1A, 1B , and 1C illustrate a prior art method for forming an interconnection between a standard BGA component and a printed circuit board. -
FIGS. 2A and 2B illustrate problems associated with forming an interconnection between a standard BGA component and a printed circuit board having a widened power interface. -
FIGS. 3A and 3B illustrate a prior art method for widening the power interconnection between a component and a printed circuit board, wherein the component package contains no solder. -
FIG. 4A illustrates a top view of an exemplary printed circuit board and solder paste stencil prior to solder paste application according to one embodiment of the present invention. -
FIG. 4B illustrates a cross-section view of an exemplary printed circuit board and solder paste stencil prior to solder paste application according to one embodiment of the present invention. -
FIG. 5A illustrates a top view of an exemplary printed circuit board after solder paste application according to one embodiment of the present invention. -
FIG. 5B illustrates a cross-section view of an exemplary printed circuit board after solder paste application according to one embodiment of the present invention. -
FIG. 6A illustrates a top view of an exemplary printed circuit board and bonus solder ball stencil according to one embodiment of the present invention. -
FIG. 6B illustrates a cross-section view of an exemplary bonus solder ball stencil according to one embodiment of the present invention. -
FIG. 7 illustrates a cross-section view of an exemplary printed circuit board and bonus solder ball stencil after placing additional solder balls onto the solder paste according to one embodiment of the present invention. -
FIGS. 8A and 8B illustrate a bottom view of exemplary standard component packages according to embodiments of the present invention. -
FIG. 9A illustrates a top view of an exemplary printed circuit board and component according to one embodiment of the present invention. -
FIG. 9B illustrates a cross-section view of an exemplary printed circuit board, including solder paste and solder balls, and placement of a component with component solder balls onto the printed circuit board according to one embodiment of the present invention. -
FIG. 10A illustrates a top view of an exemplary solder interconnection between a component package and a printed circuit board according to one embodiment of the present invention. -
FIG. 10B illustrates a cross-section view of an exemplary solder interconnection between a component package and a printed circuit board according to one embodiment of the present invention. -
FIGS. 11A, 11B , and 11C illustrate an embodiment of the present invention using a standard component package having only conductive pads and no solder on the package. -
FIG. 12 illustrates an exemplary electrical/thermal conductivity gain according to one embodiment of the present invention. - Embodiments of the present invention provide a method for widening the power delivery interface between the printed circuit board and the component through printed circuit board manufacturing processes alone, and without requiring a re-design of existing components. This is accomplished by placing pre-formed solder elements in selected areas of solder paste where additional solder volume is required.
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FIG. 4A illustrates a top view of a printedcircuit board 300 prior to application of solder paste. Asolder paste stencil 303 containingapertures 307 is placed over the printed circuit board. The solder paste stencil is positioned over the printed circuit board such that theapertures 307 in the stencil correspond to areas on the printed circuit board where solder paste application is desired. The location of the apertures in the solder paste stencil corresponds to areas on the printed circuit board where there will be an electrical connection to a component. The apertures in the stencil may be positioned overconductive planes 306, over signal pads that are electrically connected toconductive traces 305 on the printed circuit board, or over any other region where electrical interconnections are desired. In one embodiment of the present invention,conductive plane 306 is a power plane. -
FIG. 4B illustrates a cross-section of a printedcircuit board 300 prior to application of solder paste. The printed circuit board containsconductive planes 306 as well asconductive signal pads 304 that are to be covered by solder paste. The areas of the board that are not to be covered with solder are protected bysolder mask 301. Asolder paste stencil 303 containingapertures 307 is used to selectively apply solder paste to the printed circuit board. Thesolder paste stencil 303 is placed such that solderpaste stencil apertures 307 are located over areas where solder paste is to be applied. The thickness of the solder paste to be applied is limited by the stencil thickness as well as by the small size of features such as traces and pads on the printed circuit board. - In one embodiment of the present invention, the
conductive planes 306 and theconductive signal pads 304 are copper. -
FIG. 5A illustrates a top view of the component attachregion 330 of the printedcircuit board 300 ofFIG. 3 after application of solder paste. Solder paste is printed over both the signal pads and theconductive planes 306. The individual signal pads are each covered by areas ofsolder paste 308, while theconductive regions 306 are covered by a larger region ofsolder paste 309. The large region ofsolder paste 309 ofFIG. 5A replaces an array of one or moreindividual solder pads 108 on a conductive plane, as shown inFIG. 1A .Solder paste region 309 is placed in a region on a conductive plane where an electrical connection is desired. Replacing an array of individual pads in a conductive plane with a largerconductive region 309 widens the solder interface to the printed circuit board. The signal pads that are connected totraces 305 are printed withsolder paste 308 and remain substantially equivalent to the signal pads printed withsolder paste 108 ofFIG. 1A . -
FIG. 5B illustrates a cross-section of printedcircuit board 300 after solder paste is applied through apertures in asolder paste stencil 303. Solder paste is applied to signalpads 304 and toconductive region 306. Regions ofsolder paste 308 are formed over each of thesignal pads 304. Regions ofsolder paste 309 are formed over each of the conductive regions of the printedcircuit board 306. In one embodiment of the present invention, asolder paste region 309 formed over a conductive region of the printed circuit board is larger than asolder paste region 308 formed over a signal pad on a printed circuit board. -
FIG. 6A illustrates a top view of asecond stencil 310 placed over the printed circuit board. Thestencil 310 contains openings, or apertures, 314. In one embodiment of the present invention, theapertures 314 in the second stencil are located in an area where additional solder volume is desired. In another embodiment of the present invention, theapertures 314 in the second stencil are located over an area on the printed circuit board containing aconductive plane 306. In yet another embodiment of the present invention, the location of theapertures 314 in the second stencil corresponds to the interstices of the component package solder balls. -
FIG. 6B illustrates a cross section of asecond stencil 310 placed over the printedcircuit board 300.Spacers 312 are placed between the stencil and the printed circuit board to prevent the stencil from interfering with the solder paste. Thestencil 310 contains openings, or apertures, 314 through which one or more pre-formed solder elements are placed onto a region of solder paste. The second stencil is used to place pre-formed solder elements directly onto the printed circuit board in a pre-determined location. The addition of pre-formed solder elements to the printed circuit board increases the solder volume on the printed circuit board in the area where the pre-formed solder elements are placed. Pre-formed solder elements that may be used include spherical solder balls, rectangular or cubic solder elements, or a solder element formed into any other solid shape. In one embodiment of the present invention, the pre-formed solder elements are composed of a combination of lead and tin. In another embodiment of the present invention, the pre-formed solder elements are lead-free, and are composed primarily of tin. In one embodiment of the present invention, the pre-formed solder elements are solder balls. In one embodiment of the present invention, solder balls or other pre-formed solder elements are placed onto the top of the stencil and a squeegee is used to push the solder elements along the surface. When a solder element is pushed to a stencil aperture, it will drop through the aperture, contact the underlying solder paste and remain stuck in place in the solder paste. In another embodiment of the present invention, solder balls or other pre-formed solder elements are placed onto the top of the stencil and the stencil is shaken until each of the solder elements drops through a stencil aperture, contacts the underlying solder paste, and is stuck in place in the solder paste. Through this process, additional solder balls or other solder elements are effectively pasted directly onto the printed circuit board. -
FIG. 7 illustrates a cross-section of printedcircuit board 300 after solder balls, or “bonus”solder balls 316, have been placed directly ontosolder paste region 309 through theapertures 314 in thesecond stencil 310. The solder balls will remain stuck in place insolder paste 309. Thesebonus solder balls 316, or other pre-formed solder elements, add additional solder volume to the solder interconnection after the solder has been reflowed. In one embodiment of the present invention, no additional solder elements have been placed onto thesolder paste 308covering signal pads 304. In another embodiment of the present invention, additional solder elements are placed onto an area of solder paste where additional solder volume is desired. In yet another embodiment of the present invention, additional solder elements are placed onto high power regions of the printed circuit board. -
FIGS. 8A and 8B illustrate a bottom view of exemplary standard component packages.FIG. 8A illustrates a bottom view of a standardBGA component package 302 that is fully populated withsolder balls 320. The solder balls oncomponent package 302 are equally distributed across the entire package.FIG. 8B illustrates a bottom view of another type of standardBGA component package 342 that is populated withsolder balls 320 around the periphery of the package and has anopen center cavity 321. The array of solder balls oncomponent package 342 is located around the periphery of the package. Bothcomponent packages solder balls 320. All conductive pads on the package that will be connected to the printed circuit board are associated with acomponent solder ball 320. Thesolder ball pitch 334 andsolder ball diameter 332 are consistent across all balls on the package. A region interstitial to the component solder balls is indicated by hatchedregion 324. A region between the component solder balls is indicated by hatchedregion 325. - Standard component packages are available in a wide variety of configurations. The array of solder balls on a component package in an embodiment of the present invention need not be identical to the arrays of solder balls shown in
FIG. 8A or 8B. In one embodiment of the present invention, the component package is an unmodified, off-the-shelf package that is fully populated with solder balls. In another embodiment of the present invention, the component package is an unmodified, off-the-shelf package that is populated with solder balls around the periphery of the component package and having an open center cavity. In yet another embodiment of the present invention, the solder balls are equally sized and consistently spaced on the component package, and have a constant ball pitch. -
FIG. 9A illustrates a top view of the placement of acomponent package 302 onto a printed circuit board in the component attachregion 330 prior to solder reflow. In one embodiment of the present invention, thecomponent package 302 is placed over largesolder paste regions 309 which are onconductive planes 306, such that thebonus solder balls 316 are located interstitial to the componentpackage solder balls 320. Thecomponent package 302 is also placed such that some of thecomponent solder balls 320 are aligned withsolder regions 308 that are connected to signal traces 305. -
FIG. 9B illustrates a cross-section of the placement ofcomponent package 302 onto printedcircuit board 300. Thecomponent package 302 is positioned over the printed circuit board such that at least some of thecomponent solder balls 320 are positioned over largesolder paste regions 309 located overconductive planes 306. At least some of thecomponent solder balls 320 are positioned oversignal pads 304. In one embodiment of the present invention, thecomponent package 302 is positioned such that thebonus solder balls 316 are located interstitial to the componentpackage solder balls 320. In another embodiment of the present invention, thecomponent package 302 is positioned such that thesolder balls 316 are located between the componentpackage solder balls 320. -
FIG. 10A illustrates a top view of thesolder interconnections solder interconnections 323 between theconductive planes 306 and thecomponent 302 are widened, while thesolder interconnections 322 between the individual signal pads and thecomponent 302 remain substantially similar to those formed by a prior art method. -
FIG. 10B illustrates a cross-section ofsolder interconnections solder interconnections component package 302 withsignal pads 304 andconductive planes 306, respectively. The solder interconnections formed by this method contain a sufficient amount of solder such that no solder voids exist in the solder interconnection. Furthermore, thecomponent standoff 326 created by this method is adequate because of the additional volume of solder added by placing solder elements directly onto the printed circuit board prior to component placement. -
FIG. 11A illustrates a bottom view of a component used in one embodiment of the present invention.Component package 402 is a standard package containing no solder.Conductive pads component package 402. In one embodiment of the present invention, the component package is a package having conductive pads, but containing no solder or solder balls.Component package 402 is typically connected to a printed circuit board using only the volume solder provided by the solder paste, as shown inFIGS. 3A and 3B . The volume of solder provided by solder paste alone is sometimes insufficient to form a reliable solder interconnect, as illustrated inFIG. 3B . -
FIG. 11B illustrates the addition of solder elements to the printed circuit board in one embodiment of the present invention.Solder paste signal pad 404 andconductive regions 406, respectively.Solder mask 401 protects areas of the printed circuit board where solder is not desired. Because thecomponent package 402 contains no solder on eitherconductive pads 421 orsignal pad 422, and because the volume of solder provided by thesolder paste additional solder elements 416 are placed onto the printedcircuit board 400 by the method of the present invention. In one embodiment of the present invention, additional solder elements are provided in areas of the printed circuit board where additional solder volume is desired.Component package 402 is positioned oversolder paste regions conductive pads solder paste structures solder balls 416. -
FIG. 11C illustrates the printed circuit board and component package ofFIG. 11B after the solder paste and solder balls are reflowed to formsolder interconnections 423.Solder interconnections 423 mechanically and electrically connect the component package withconductive planes 406 andsignal pad 404 on the printed circuit board. Because additional solder volume has been added to the interconnection, thecomponent standoff 426 is adequate. -
FIG. 12 illustrates the increase in solder interconnection area formed by this method over that of the prior art method. The increase in solder interconnection area decreases the resistance of the interconnection. This allows a higher current draw by the component. The increased interconnection area also decreases the power density of the interconnect. The percentage improvement in resistance can be calculated by comparing the relative areas of the interconnect structures formed by theprior art method 912 and the interconnect structure formed by the method of thepresent invention 922. Assuming aball diameter 932 of 0.5 mm, and aball pitch 934 of 0.8 mm, the increase in area, and thus the resistance improvement, is roughly 150%. The same increase in metal area is expected to improve the effective heat transfer coefficient between the component and the printed circuit board by approximately 150% as well. Using the method of the present invention it is possible for a printed circuit board to act as a primary heatsink for high-power components such as power MOSFETs or microprocessors.
Claims (21)
1. A method of forming a solder interconnection, comprising:
placing a plurality of preformed solder elements onto at least one region of solder paste on a printed circuit board;
placing a component package onto the printed circuit board, wherein the component package contains a plurality of solder balls, at least some of which are placed in the at least one region of solder paste; and
reflowing the plurality of preformed solder elements and the component solder balls to form a connection between the component and the printed circuit board.
2. The method of claim 1 , wherein the plurality of preformed solder elements are spherical solder balls.
3. The method of claim 1 , wherein the plurality of preformed solder elements are rectangular in shape.
4. The method of claim 1 , wherein each of the plurality of preformed solder elements is located interstitial to at least some of the plurality of component package solder balls.
5. The method of claim 1 , further comprising applying a solder mask to the printed circuit board, wherein the solder mask is applied to areas of the printed circuit board where solder is not desired.
6. A method of forming a solder interconnection, comprising:
applying a solder mask to a printed circuit board;
applying a layer of solder paste to the printed circuit board using a first stencil;
placing a plurality of bonus solder balls onto the layer of solder paste using a second stencil;
placing a component package onto the printed circuit board, wherein the component package contains solder balls which are placed in the solder paste and the plurality of bonus solder balls lie between the component package solder balls, the component package solder balls having interstices; and
reflowing the plurality of bonus solder balls and the component solder balls to form a connection between the component and the printed circuit board.
7. The method of claim 6 , wherein a spacer is placed between the second stencil and the printed circuit board.
8. The method of claim 6 , wherein the second stencil contains a plurality of openings corresponding to an area on the component where additional solder volume is desired.
9. The method of claim 8 , wherein the second stencil contains a plurality of openings over an area on the printed circuit board containing a conductive plane.
10. The method of claim 9 , wherein each of the plurality of openings corresponds to one of the interstices of the component package solder balls.
11. The method of claim 8 , wherein the placing of the plurality of bonus solder balls onto the solder paste is performed by rolling the plurality of bonus solder balls onto the top of the second stencil and using a squeegee to push the plurality of bonus solder balls along the surface of the second stencil until each of the plurality of bonus solder balls drops through one of the plurality of openings in the second stencil into the solder paste.
12. The method of claim 8 , wherein the placing of the plurality of bonus solder balls onto the solder paste is performed by placing the plurality of bonus solder balls onto the top of the second stencil and shaking until each of the plurality of bonus solder balls drops through one of the plurality of openings in the second stencil into the solder paste.
13. The method of claim 6 , wherein the component is a standard, off-the-shelf component.
14. The method of claim 13 , wherein the component package is fully populated with solder balls.
15. The method of claim 14 , wherein the component solder balls are consistently spaced.
16. A method of forming a solder interconnection, comprising:
applying a solder mask to a printed circuit board;
applying a layer of solder paste to a printed circuit board using a first stencil;
placing a plurality of solder balls onto the solder paste using a second stencil;
placing a component onto the printed circuit board, wherein the component is placed onto the solder paste and onto the plurality of solder balls; and
reflowing the plurality of solder balls to form a connection between the component and the printed circuit board.
17. The method of claim 16 , wherein a spacer is placed between the second stencil and the printed circuit board.
18. The method of claim 16 , wherein the second stencil contains a plurality of openings.
19. The method of claim 18 , wherein the placing of the plurality of solder balls onto the solder paste is performed by placing the plurality of solder balls onto the top of the second stencil and using a squeegee to push the plurality of solder balls along the surface of the second stencil until each of the plurality of solder balls drops through one of the plurality of openings in the second stencil into the solder paste.
20. The method of claim 18 , wherein the placing of the plurality of solder balls onto the solder paste is performed by placing the plurality of solder balls onto the top of the second stencil and shaking until each of the plurality of solder balls drops through one of the plurality of openings in the second stencil into the solder paste.
21. The method of claim 16 , wherein the component comprises a standard off-the-shelf component.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US11/657,197 US20070125833A1 (en) | 2003-04-30 | 2007-01-23 | Method for improved high current component interconnections |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US10/427,681 US7538440B2 (en) | 2003-04-30 | 2003-04-30 | Method for improved high current component interconnections |
US11/657,197 US20070125833A1 (en) | 2003-04-30 | 2007-01-23 | Method for improved high current component interconnections |
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US10/427,681 Division US7538440B2 (en) | 2003-04-30 | 2003-04-30 | Method for improved high current component interconnections |
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US10/427,681 Active 2024-05-22 US7538440B2 (en) | 2003-04-30 | 2003-04-30 | Method for improved high current component interconnections |
US11/148,535 Abandoned US20050225953A1 (en) | 2003-04-30 | 2005-06-08 | Method for improved high current component interconnections |
US11/657,197 Abandoned US20070125833A1 (en) | 2003-04-30 | 2007-01-23 | Method for improved high current component interconnections |
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US11/148,535 Abandoned US20050225953A1 (en) | 2003-04-30 | 2005-06-08 | Method for improved high current component interconnections |
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Cited By (2)
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US20090302095A1 (en) * | 2008-05-15 | 2009-12-10 | International Business Machines Corporation | Techniques for arranging solder balls and forming bumps |
US20120049359A1 (en) * | 2010-08-30 | 2012-03-01 | Wen-Jeng Fan | Ball grid array package |
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US7538440B2 (en) | 2003-04-30 | 2009-05-26 | Intel Corporation | Method for improved high current component interconnections |
US7955898B2 (en) * | 2007-03-13 | 2011-06-07 | Micron Technology, Inc. | Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices |
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US8415567B1 (en) * | 2009-02-04 | 2013-04-09 | Rf Micro Devices, Inc. | Forming soldering surfaces without requiring a solder mask |
JP2013149948A (en) * | 2011-12-20 | 2013-08-01 | Ngk Spark Plug Co Ltd | Wiring board and manufacturing method of the same |
US10617000B2 (en) * | 2017-12-20 | 2020-04-07 | Intel Corporation | Printed circuit board (PCB) with three-dimensional interconnects to other printed circuit boards |
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US20090302095A1 (en) * | 2008-05-15 | 2009-12-10 | International Business Machines Corporation | Techniques for arranging solder balls and forming bumps |
US8087566B2 (en) * | 2008-05-15 | 2012-01-03 | International Business Machines Corporation | Techniques for arranging solder balls and forming bumps |
US20120049359A1 (en) * | 2010-08-30 | 2012-03-01 | Wen-Jeng Fan | Ball grid array package |
Also Published As
Publication number | Publication date |
---|---|
US7538440B2 (en) | 2009-05-26 |
US20040216917A1 (en) | 2004-11-04 |
US20050225953A1 (en) | 2005-10-13 |
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