US20070050422A1 - Data file synchronous update - Google Patents
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- US20070050422A1 US20070050422A1 US11/512,508 US51250806A US2007050422A1 US 20070050422 A1 US20070050422 A1 US 20070050422A1 US 51250806 A US51250806 A US 51250806A US 2007050422 A1 US2007050422 A1 US 2007050422A1
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- 230000001360 synchronised effect Effects 0.000 title claims description 21
- 125000004122 cyclic group Chemical group 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims abstract description 10
- 230000015654 memory Effects 0.000 claims description 34
- 230000007246 mechanism Effects 0.000 description 18
- 230000002265 prevention Effects 0.000 description 9
- 230000008901 benefit Effects 0.000 description 5
- 230000004075 alteration Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 230000002747 voluntary effect Effects 0.000 description 1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/205—Substrate bias-voltage generators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
- H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
Definitions
- the present invention generally relates to electronic circuits with a memory and, more specifically to circuits integrating a sequential access memory.
- the present invention especially applies to smart cards having their chip communicating with a reader with or without contact.
- FIG. 1 very schematically shows, in the form of blocks, an example of an electronic circuit 1 of the type to which the present invention applies.
- Circuit 1 is, for example, intended to be assembled on a smart card or the like and comprises a central processing unit 2 (CPU), one or several memories 3 , among which at least one sequential access memory, and an input/output circuit 4 (I/O) intended to communicate with or without contact with the outside of circuit 1 .
- CPU central processing unit
- memories 3 among which at least one sequential access memory
- I/O input/output circuit 4
- the different elements contained in the circuit communicate over one or several data, address, and control buses 5 , and other circuits (for example, sensors) may be integrated to circuit 1 .
- the data files processed by the memory microcircuits of smart cards need to be protected against incidental or voluntary interrupts on updating of the data of these files in the memory. It may, for example, be the retrieval of a smart card from a contact reader or a disturbance in the radio-frequency field of an electromagnetic transponder generating an interrupt in the data updating in the memory. If nothing is done for the microcircuit to recover correct data at the next session, the electronic circuit operation is disturbed.
- FIG. 2 very schematically illustrates in the form of blocks a conventional example of a mechanism of transactional file updating used in file processing systems.
- Such a technique is known as a synchronous update or “commit-rollback” and aims at enabling the circuit to restart with correct data in the case where an updating of a file or of a memory has been disturbed.
- a file F is represented by its successive recordings to which are assigned indexes I 1 , I 2 , . . . Ii, . . . In- 1 , In.
- File F is associated with an index register IR providing, to the memory exploitation circuit (for example, central unit 2 ), the index of the current recording on which to point in the file.
- Index register IR is only updated once the memory recording operation has been properly performed.
- the transactional updating mechanism can be in a so-called past prevention mode or in a future prevention more. According to the case, when a data updating needs to be performed in the file, the index register is updated after (past prevention) or before (future prevention) the updating of these data. Such a mechanism enables the central unit to recover the data during the circuit operation in case of a problem, whatever it may be.
- a first transaction may be the updating of the electronic ticket (decrement of its value to bring a travel to account) while another transaction may concern the updating of a statistic file of the user. If one of the two transactions does not end, it would be desirable to be able to cancel the other one or take other appropriate measures.
- Another problem is linked to the need for operation rapidity of the synchronous update mechanism due to the limited time for which the involved smart cards generally remain in communication with the reader supplying them.
- the present invention aims at overcoming all or part of the disadvantages of file processing systems of electronic circuits with a microcircuit and memory, especially in smart card applications or the like.
- the present invention more specifically aims at a mechanism of synchronous update of several files or memory areas of an electronic circuit.
- the present invention also aims at preserving the properties and the individual access conditions of the different files.
- the present invention also aims at providing a mechanism which is compatible with so-called memory cards, that is, with no microcontrollers.
- the present invention also aims at a mechanism compatible with the two future prevention or past prevention operation modes of a commit-rollback system.
- the present invention provides a method for updating cyclic data files in sequential access storage elements, comprising the steps of storing, in at least one index file, itself cyclic, respective indexes of the data files and, in at least one index register, the current index of the index file.
- the content of a current recording of the index file is copied in the next recording of the same file before each synchronous update of the data files.
- the index register is updated at the end of the synchronous update of the data files.
- the sequential access areas of a memory are assigned to the data files.
- the present invention also provides an electronic circuit comprising at least one sequential access memory and an index management circuit of this memory and:
- At least one element for storing the current index of the index file.
- the present invention also provides a smart card.
- FIG. 1 previously described, very schematically shows in the form of blocks an example of an electronic circuit of the type to which the present invention applies;
- FIG. 2 previously described, illustrates a conventional example of an index register file system
- FIG. 3 very schematically shows an embodiment of a synchronized file updating mechanism according to the present invention.
- FIGS. 4A, 4B , and 4 C illustrate examples of operation of the mechanism of FIG. 3 .
- the present invention takes advantage from the fact that the electronic circuits of smart cards with a memory most often exploit, for addressing circuit simplicity reasons, sequential access memories, and process cyclic files. Such files are characterized by the fact that the different recordings are successively filled, in a loop.
- a feature of an embodiment of the present invention is to use, in addition to the main cyclic files containing data linked to the application, an additional cyclic file, each recording of which contains the respective current indexes of the different cyclic data files.
- the different cyclic files are not individually associated with index registers but with an index file, each recording of which contains several indexes, this cyclic index file being itself associated with a single index register.
- FIG. 3 very schematically illustrates an embodiment of the synchronous update mechanism according to the present invention.
- Each data file is a sequential and cyclic access file containing several recordings ( FIG. 2 ) having their respective positions identifiable by indexes Ii 1 (i 1 ranging from 1 to n 1 ) for file F 1 , Ii 2 (i 2 ranging from 1 to n 2 ) for file F 2 , and Ii m (i m ranging from 1 to nm) for file Fm. Recording numbers n 1 , n 2 , . . . nm of the different files are not necessarily identical.
- the present invention will be described hereafter in relation with files independently from their storage area, to refer to a software implementation. However, the invention may also be used in hardware implementations of a sequential access memory.
- An additional cyclic file IF is used to store the different indexes of files F 1 to Fm.
- each recording of file IF contains m indexes.
- index file IF is associated with an index register MIR containing a single element, that is, index IF i of the current recording into file IF.
- the different files will be stored in non-volatile memory areas of the electronic circuit or in a RAM area.
- the synchronous update concerns RAM files. In this case, the synchronous update concerns updating transactions in the memory but not to possible power failures.
- FIGS. 4A, 4B , and 4 C illustrates in views to be compared with that of FIG. 3 , showing the respective contents of the different files and registers, examples of operation of the commit-rollback mechanism of the present invention.
- the different indexes of the main files are positioned on their first respective recordings and main index register MIR thus contains value 1.
- the first recording of index file IF contains the succession of indexes I 1 1 , I 1 2 , . . . I 1 m of the different files F 1 to Fm.
- Files F 1 to Fm respectively contain values V 11 , V 21 , . . . Vm 1 .
- index file IF on which register MIR points here, for example, 1
- index 2 the content of the recording of index file IF on which register MIR points (here, for example, 1) is copied into the next recording (index 2), but the index register is not updated and keeps its value (for example, 1). It is assumed that file F 1 is updated with a new value V 12 stored at its next recording.
- index register MIR keeps value 1 and is not updated to obtain the value of the second recording.
- the second file F 2 has not needed to be updated but that the last file Fm has been updated to a value Vm 2 (the other files have not been shown and may behave either as file F 2 , or as file Fm).
- the second recording of index file IF contains values I 2 1 , I 1 2 , . . . I 2 m .
- main index register MIR is incremented to contain value 2.
- the reading from a file is performed based on the index contained in the current recording of the index file. Accordingly, in case the updating is interrupted before its end, the system takes index 1 of register MIR as a basis so that the contents of all the files recover the value before updating. In case of a failure in the synchronous update or of a setting to zero of the card, the card automatically finds itself in the state preceding the file updatings since the index of index file IF is 1.
- the file reading is performed based on the index contained in the recording of the index file which follows that pointed to by register MIR. Accordingly, in case the updating is interrupted before its end, the system uses index 2 as a basis, so that the contents of the files which have had time to be updated are taken into account.
- the different files only contain two recordings.
- the size of the different files is greater and the present invention then enables managing the card history over a time corresponding to the side of index file IF.
- index files using overlapping or not index ranges are used.
- An advantage of the present invention is that it enables managing a commit-rollback mechanism in simple fashion with limited hardware resources.
- Another advantage of the present invention is that it is compatible with a memory card with no microcontroller. Indeed, the indexes necessary to the management of the commit-rollback mechanism are themselves contained in memory areas in the form of recordings of a cyclic file.
- Another advantage of the present invention is that the delocalized index mechanism in the index file enables management of the circuit operation history.
- the present invention is likely to have various alterations, improvements, and modifications which will readily occur to those skilled in the art.
- the present invention has been more specifically described in relation with a memory card with no microcontroller, it is of course also compatible with cards provided with a microcontroller.
- the practical implementation of the present invention by software or hardware means is within the abilities of those skilled in the art based on the functional indications given hereabove.
- the implementation of the present invention may be combined with the keeping, for some files, of an index register.
Abstract
A method and a circuit for updating cyclic data files in sequential access storage elements, including storing, in at least one index file, itself cyclic, respective indexes of the data files and, in at least one index register, the current index of the index file.
Description
- 1. Field of the Invention
- The present invention generally relates to electronic circuits with a memory and, more specifically to circuits integrating a sequential access memory.
- The present invention especially applies to smart cards having their chip communicating with a reader with or without contact.
- 2. Discussion of the Related Art
-
FIG. 1 very schematically shows, in the form of blocks, an example of anelectronic circuit 1 of the type to which the present invention applies.Circuit 1 is, for example, intended to be assembled on a smart card or the like and comprises a central processing unit 2 (CPU), one orseveral memories 3, among which at least one sequential access memory, and an input/output circuit 4 (I/O) intended to communicate with or without contact with the outside ofcircuit 1. The different elements contained in the circuit communicate over one or several data, address, and control buses 5, and other circuits (for example, sensors) may be integrated tocircuit 1. - Increasingly, the data files processed by the memory microcircuits of smart cards need to be protected against incidental or voluntary interrupts on updating of the data of these files in the memory. It may, for example, be the retrieval of a smart card from a contact reader or a disturbance in the radio-frequency field of an electromagnetic transponder generating an interrupt in the data updating in the memory. If nothing is done for the microcircuit to recover correct data at the next session, the electronic circuit operation is disturbed.
-
FIG. 2 very schematically illustrates in the form of blocks a conventional example of a mechanism of transactional file updating used in file processing systems. Such a technique is known as a synchronous update or “commit-rollback” and aims at enabling the circuit to restart with correct data in the case where an updating of a file or of a memory has been disturbed. - In
FIG. 2 , a file F is represented by its successive recordings to which are assigned indexes I1, I2, . . . Ii, . . . In-1, In. File F is associated with an index register IR providing, to the memory exploitation circuit (for example, central unit 2), the index of the current recording on which to point in the file. Index register IR is only updated once the memory recording operation has been properly performed. Such a mechanism described in relation with a file (independently from its memory storage system) of course also applies in hardware fashion for a memory area. - The transactional updating mechanism can be in a so-called past prevention mode or in a future prevention more. According to the case, when a data updating needs to be performed in the file, the index register is updated after (past prevention) or before (future prevention) the updating of these data. Such a mechanism enables the central unit to recover the data during the circuit operation in case of a problem, whatever it may be.
- The use of such an updating mechanism becomes difficult if several files or several memory areas are concerned by the need to recover data in case of an interrupt of one of the updating processes. For example, in a card for transportation applications, a first transaction may be the updating of the electronic ticket (decrement of its value to bring a travel to account) while another transaction may concern the updating of a statistic file of the user. If one of the two transactions does not end, it would be desirable to be able to cancel the other one or take other appropriate measures.
- A problem linked to the application to electronic circuits of the type supported by smart cards (cards with microcircuit and memory) is linked to the generally limited calculation capacity of this type of circuit. It cannot be envisaged to implement complex file management systems of the type of those present in computers.
- Another problem is linked to the need for operation rapidity of the synchronous update mechanism due to the limited time for which the involved smart cards generally remain in communication with the reader supplying them.
- Such problems especially exclude the use of solutions gathering several recordings of different natures within a same file to be sure of their simultaneous updating. Indeed, the central processing unit should be able to individually have access to the files according to the performed transactions.
- The present invention aims at overcoming all or part of the disadvantages of file processing systems of electronic circuits with a microcircuit and memory, especially in smart card applications or the like.
- The present invention more specifically aims at a mechanism of synchronous update of several files or memory areas of an electronic circuit.
- The present invention also aims at preserving the properties and the individual access conditions of the different files.
- The present invention also aims at providing a mechanism which is compatible with so-called memory cards, that is, with no microcontrollers.
- The present invention also aims at a mechanism compatible with the two future prevention or past prevention operation modes of a commit-rollback system.
- To achieve all or part of these objects, as well as others, the present invention provides a method for updating cyclic data files in sequential access storage elements, comprising the steps of storing, in at least one index file, itself cyclic, respective indexes of the data files and, in at least one index register, the current index of the index file.
- According to an embodiment of the present invention, the content of a current recording of the index file is copied in the next recording of the same file before each synchronous update of the data files.
- According to an embodiment of the present invention, the index register is updated at the end of the synchronous update of the data files.
- According to an embodiment of the present invention, the sequential access areas of a memory are assigned to the data files.
- The present invention also provides an electronic circuit comprising at least one sequential access memory and an index management circuit of this memory and:
- several areas of said memory assigned to data files;
- at least one area assigned to an index file, each recording of which contains indexes of the data files; and
- at least one element for storing the current index of the index file.
- The present invention also provides a smart card.
- The foregoing and other objects, features, and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.
-
FIG. 1 , previously described, very schematically shows in the form of blocks an example of an electronic circuit of the type to which the present invention applies; -
FIG. 2 , previously described, illustrates a conventional example of an index register file system; -
FIG. 3 very schematically shows an embodiment of a synchronized file updating mechanism according to the present invention; and -
FIGS. 4A, 4B , and 4C illustrate examples of operation of the mechanism ofFIG. 3 . - The same elements have been designated with the same reference numerals in the different drawings. For clarity, only those steps and elements which are useful to the understanding of the present invention have been shown in the drawings and will be described hereafter. In particular, the exploitation of the data by the electronic circuit containing the file processing mechanism of the present invention has not been described in detail, the present invention being compatible with any conventional destination of said data. Further, the nature of the storage elements (RAM, rewritable non-volatile memory, etc.) has not been described in detail, the present invention being compatible with any memory provided that it is capable of storing cyclic files, thus with a sequential access.
- The present invention takes advantage from the fact that the electronic circuits of smart cards with a memory most often exploit, for addressing circuit simplicity reasons, sequential access memories, and process cyclic files. Such files are characterized by the fact that the different recordings are successively filled, in a loop.
- A feature of an embodiment of the present invention is to use, in addition to the main cyclic files containing data linked to the application, an additional cyclic file, each recording of which contains the respective current indexes of the different cyclic data files. Thus, the different cyclic files are not individually associated with index registers but with an index file, each recording of which contains several indexes, this cyclic index file being itself associated with a single index register.
-
FIG. 3 very schematically illustrates an embodiment of the synchronous update mechanism according to the present invention. - Assume a microcircuit and memory smart card of the type illustrated in
FIG. 1 , in which a synchronous update of m data or main files F1, F2, . . . Fm is desired to be managed. Each data file is a sequential and cyclic access file containing several recordings (FIG. 2 ) having their respective positions identifiable by indexes Ii1 (i1 ranging from 1 to n1) for file F1, Ii2 (i2 ranging from 1 to n2) for file F2, and Iim (im ranging from 1 to nm) for file Fm. Recording numbers n1, n2, . . . nm of the different files are not necessarily identical. - The present invention will be described hereafter in relation with files independently from their storage area, to refer to a software implementation. However, the invention may also be used in hardware implementations of a sequential access memory.
- An additional cyclic file IF is used to store the different indexes of files F1 to Fm. In other words, each recording of file IF contains m indexes. Further, index file IF is associated with an index register MIR containing a single element, that is, index IFi of the current recording into file IF.
- According to applications, the different files will be stored in non-volatile memory areas of the electronic circuit or in a RAM area. For example, for the synchronous update of files in an electronic ticket application, what remains of the available travels on the electronic ticket will be stored in the non-volatile memory, as well as the statistical files. According to another example, the synchronous update concerns RAM files. In this case, the synchronous update concerns updating transactions in the memory but not to possible power failures.
-
FIGS. 4A, 4B , and 4C illustrates in views to be compared with that ofFIG. 3 , showing the respective contents of the different files and registers, examples of operation of the commit-rollback mechanism of the present invention. - On manufacturing or initialization of the smart card (
FIG. 4A ), the different indexes of the main files are positioned on their first respective recordings and main index register MIR thus containsvalue 1. The first recording of index file IF contains the succession of indexes I1 1, I1 2, . . . I1 m of the different files F1 to Fm. Files F1 to Fm respectively contain values V11, V21, . . . Vm1. - At the beginning of a synchronous update (
FIG. 4B ), the content of the recording of index file IF on which register MIR points (here, for example, 1) is copied into the next recording (index 2), but the index register is not updated and keeps its value (for example, 1). It is assumed that file F1 is updated with a new value V12 stored at its next recording. - The index in the second recording of file IF is then updated with value I2 1. As long as the synchronous update of all the files is not over, index register MIR keeps
value 1 and is not updated to obtain the value of the second recording. - In
FIG. 4C , it is assumed that at the end of the synchronous update, the second file F2 has not needed to be updated but that the last file Fm has been updated to a value Vm2 (the other files have not been shown and may behave either as file F2, or as file Fm). As a result, the second recording of index file IF contains values I2 1, I1 2, . . . I2 m. At the end of the synchronous update of the different files, main index register MIR is incremented to containvalue 2. - In the case of a past prevention synchronous update, the reading from a file is performed based on the index contained in the current recording of the index file. Accordingly, in case the updating is interrupted before its end, the system takes
index 1 of register MIR as a basis so that the contents of all the files recover the value before updating. In case of a failure in the synchronous update or of a setting to zero of the card, the card automatically finds itself in the state preceding the file updatings since the index of index file IF is 1. - In the case of a future prevention synchronous update, the file reading is performed based on the index contained in the recording of the index file which follows that pointed to by register MIR. Accordingly, in case the updating is interrupted before its end, the system uses
index 2 as a basis, so that the contents of the files which have had time to be updated are taken into account. - Either the card is informed of this operating mode by the reader, or it is parameterized on manufacturing or on programming. It can be seen that the mechanism of the present invention is compatible with the two modes without modifying the file recording mode.
- According to a simplified embodiment, where the past or future prevention concerns but one event, the different files only contain two recordings.
- According to another embodiment, the size of the different files is greater and the present invention then enables managing the card history over a time corresponding to the side of index file IF.
- According to another embodiment of the present invention, several index files using overlapping or not index ranges are used.
- An advantage of the present invention is that it enables managing a commit-rollback mechanism in simple fashion with limited hardware resources.
- Another advantage of the present invention is that it is compatible with a memory card with no microcontroller. Indeed, the indexes necessary to the management of the commit-rollback mechanism are themselves contained in memory areas in the form of recordings of a cyclic file.
- Another advantage of the present invention is that the delocalized index mechanism in the index file enables management of the circuit operation history.
- Of course, the present invention is likely to have various alterations, improvements, and modifications which will readily occur to those skilled in the art. In particular, although the present invention has been more specifically described in relation with a memory card with no microcontroller, it is of course also compatible with cards provided with a microcontroller. Further, the practical implementation of the present invention by software or hardware means is within the abilities of those skilled in the art based on the functional indications given hereabove. Further, the implementation of the present invention may be combined with the keeping, for some files, of an index register.
- Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and the scope of the present invention. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. The present invention is limited only as defined in the following claims and the equivalents thereto.
Claims (7)
1. A method for updating cyclic data files in sequential access storage elements, comprising the steps of storing, in at least one index file, itself cyclic, respective indexes of the data files and, in at least one index register, the current index of the index file.
2. The method of claim 1 , wherein the content of a current recording of the index file is copied in the next recording of the same file before each synchronous update of the data files.
3. The method of claim 2 , wherein the index register is updated at the end of the synchronous update of the data files.
4. The method of claim 1 , applied to data files to which sequential access areas of a memory are assigned.
5. An electronic circuit comprising at least one sequential access memory and an index management circuit of this memory, and comprising:
several areas of said memory assigned to data files;
at least one area assigned to an index file, each recording of which contains indexes of the data files; and
at least one element for storing the current index of the index file.
6. The circuit of claim 5 , comprising means for implementing the method of claim 1 .
7. A smart card comprising the circuit of claim 5.
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FR0552638A FR2890239B1 (en) | 2005-08-31 | 2005-08-31 | COMPENSATION OF ELECTRICAL DERIVATIVES OF MOS TRANSISTORS |
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US13/040,148 Active 2027-05-03 USRE44922E1 (en) | 2005-08-31 | 2011-03-03 | Compensation for electric drifts of MOS transistors |
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US8994446B2 (en) * | 2013-06-28 | 2015-03-31 | Freescale Semiconductor, Inc. | Integrated circuits and methods for monitoring forward and reverse back biasing |
FR3013474A1 (en) * | 2013-11-15 | 2015-05-22 | St Microelectronics Crolles 2 | |
CN104133515B (en) * | 2014-07-09 | 2016-06-15 | 山东汉旗科技有限公司 | PMOS substrate selection circuit |
JP2016019235A (en) * | 2014-07-10 | 2016-02-01 | 株式会社半導体理工学研究センター | Amplifier circuit, cmos inverter amplifier circuit, comparator circuit, δς analog/digital converter and semiconductor apparatus |
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- 2006-08-30 US US11/468,672 patent/US7498863B2/en not_active Ceased
- 2006-08-30 US US11/512,508 patent/US20070050422A1/en not_active Abandoned
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Also Published As
Publication number | Publication date |
---|---|
US7498863B2 (en) | 2009-03-03 |
USRE44922E1 (en) | 2014-06-03 |
US20070057688A1 (en) | 2007-03-15 |
FR2890239A1 (en) | 2007-03-02 |
FR2890239B1 (en) | 2008-02-01 |
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