US20060196843A1 - Process for fabricating monolithic membrane substrate structures with well-controlled air gaps - Google Patents
Process for fabricating monolithic membrane substrate structures with well-controlled air gaps Download PDFInfo
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- US20060196843A1 US20060196843A1 US11/416,529 US41652906A US2006196843A1 US 20060196843 A1 US20060196843 A1 US 20060196843A1 US 41652906 A US41652906 A US 41652906A US 2006196843 A1 US2006196843 A1 US 2006196843A1
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- 238000000034 method Methods 0.000 title abstract description 30
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- 239000012528 membrane Substances 0.000 title abstract description 22
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- 239000000463 material Substances 0.000 claims description 35
- 238000000151 deposition Methods 0.000 abstract description 28
- 239000002184 metal Substances 0.000 abstract description 22
- 238000000059 patterning Methods 0.000 abstract description 6
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 22
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- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- 229920001721 polyimide Polymers 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 239000004642 Polyimide Substances 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 238000001816 cooling Methods 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00134—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
- B81C1/00158—Diaphragms, membranes
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2201/00—Manufacture or treatment of microstructural devices or systems
- B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
- B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
- B81C2201/0128—Processes for removing material
- B81C2201/013—Etching
- B81C2201/0135—Controlling etch progression
- B81C2201/014—Controlling etch progression by depositing an etch stop layer, e.g. silicon nitride, silicon oxide, metal
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
- Y10T428/24612—Composite web or sheet
- Y10T428/2462—Composite web or sheet with partial filling of valleys on outer surface
Abstract
A process for fabricating monolithic membrane structures having air gaps is disclosed, comprising the steps of: providing a wafer; depositing and patterning a protective layer on the wafer; providing a trench in the wafer; depositing and patterning a metal in the trench; depositing and patterning a sacrificial layer on the metal; depositing and patterning a membrane pad on the sacrificial layer; providing a polymeric film on the protective layer and sacrificial layer, wherein part of the polymeric film has a tensile stress; and releasing part of the polymeric film from the protective layer and sacrificial layer, wherein the tensile stress of a portion of the polymeric film releases the portion of the polymeric film from the wafer and generates the air gap.
Description
- This application claims the benefit of U.S. provisional application Ser. No. 60/460,524 filed on Apr. 4, 2003, which is incorporated herein by reference in its entirety.
- 1. Field of the Invention
- The present invention relates to a process for fabricating a monolithic structure comprising a polymeric membrane on a patterned substrate and to a monolithic membrane-substrate structure. The monolithic membrane-substrate structure has a well-controlled air gap in between.
- 2. Description of the Related Art
- Prior fabrication processes for making structures with well-controlled air gaps have used sacrificial layers to form the gap. However, the use of sacrificial layers to form release membranes or cantilever type structures suffers from certain limitations. The size of the air gap obtained from these processes is determined entirely by the height of the sacrificial layer. Since deposition of any sacrificial layer (SiO2, SiN, etc.) is time consuming and costly, the layer thickness is not much greater than about 1 μm. This severely limits the gap size, and also the lateral dimensions that the released structures can have.
- Other related techniques that are useful for achieving large air gaps consist of bonding together two separate sections either directly or by means of an adhesive. One of the pieces is recessed or contains a cavity that gives the required gap. Such a process is not monolithic in nature, and hence involves a more tedious and costly assembly procedure. Also, the size of the air gap may not be as uniform due to the difficulties associated with the bonding process.
- Numerous examples exist in the prior art that use the concept of sacrificial layers to release membranes and cantilevers, and realize air gaps. For example, U.S. Pat. No. 5,738,799 discloses using a sacrificial layer for an ink-jet printhead fabrication technique. Furthermore, N. S. Barker and G. M. Rebeiz also discuss use of sacrificial layers for phase shifters and wide-band switches in the publication “Distributed MEMS True-Time Delay Phase Shifters and Wide-Band Switches” (IEEE Transactions on Microwave Theory and Techniques, vol. 46, no. 11, November 1998).
- However, none of the prior art documents relies on the tensile stress intrinsically present in certain membranes to form released structures with air gaps much larger than the thickness of the sacrificial layer. The present invention achieves this, and also provides a means of ensuring that the tensile stress in the released membranes is retained.
- The present invention discloses a process for fabricating a monolithic structure having an air gap and consisting of a preferably polyimide membrane on a patterned silicon substrate. The process and resulting device do not require bonding of two separate sections to achieve the air gaps. The structure is easy to fabricate, reliable, and can be miniaturized using standard cleanroom processing techniques. Therefore, the size of the gap can be controlled with extreme precision. Furthermore, any desired layer can be patterned on the membrane or substrate surfaces forming the micro-chamber. The metal layers can easily be used as electrodes for electrostatic actuation of the membrane, providing tuning capability for any application. The process and resulting device relies on the use of an intermediate sacrificial layer to release the membrane. However, unlike conventional techniques, the height of the sacrificial layer does not determine the size of the air gap that is eventually obtained. This represents a significant advantage in fabricating tunable electronic components that require relatively large air gaps that would be impossible or extremely cost prohibitive to realize using conventional methods. The process also ensures that the polyimide membrane retains the desirable tensile stress.
- According to a first embodiment, the present invention discloses a process for fabricating membrane-substrate structures comprising: providing a substrate; depositing a protective layer on said substrate; forming a trench in said substrate, said trench having a trench depth; depositing a first intermediate layer in said trench; depositing a sacrificial layer on said first intermediate layer, said sacrificial layer having a sacrificial layer depth; depositing and patterning a second intermediate layer on said sacrificial layer; depositing a layer of polymeric material on said second intermediate layer and said sacrificial layer, said layer of polymeric material contacting said second intermediate layer; removing said sacrificial layer; and forming an air gap between the layer of polymeric material and the substrate by release of said layer of polymeric material upon removal of said sacrificial layer, whereby said air gap has an air gap depth greater than said sacrificial layer depth.
- According to a second embodiment, the present invention discloses a process for fabricating membrane-substrate structures comprising the steps of: providing a substrate having a one side and an other side; depositing a first protective layer on said one side and a second protective layer on said other side; forming a trench in said substrate, said trench having a trench depth; depositing a third protective layer in said trench; depositing a first intermediate layer on said third protective layer; depositing a sacrificial layer on said first intermediate layer and said third-protective-layer, said sacrificial layer having a sacrificial layer depth; depositing a second intermediate layer on said sacrificial layer; depositing a layer of polymeric material on said first protective layer, said second intermediate layer, and said sacrificial layer; removing said sacrificial layer; and forming an air gap between the layer of polymeric material and the substrate by release of said layer of polymeric material from said sacrificial layer upon removal of said sacrificial layer, whereby said air gap has an air gap depth greater than said sacrificial layer depth.
- According to a third embodiment, the present invention discloses a process for restoring tensile stress to a monolithic membrane-substrate structure comprising the steps of: a) fabricating a membrane-substrate structure, said step of fabricating the membrane-substrate structure comprising: a1) providing a substrate having a one side and an other side; a2) depositing a first protective layer on said one side and a second protective layer on said other side; a3) forming a trench in said substrate, said trench having a trench depth; a4) depositing a third protective layer in said trench; a5) depositing a first intermediate layer on said third protective layer; a6) depositing a sacrificial layer on said first intermediate layer and said third protective layer, said sacrificial layer having a sacrificial layer depth; a7) depositing a second intermediate layer on said sacrificial layer; a8) depositing a layer of polymeric material on said first protective layer, said second intermediate layer, and said sacrificial layer; a9) removing said sacrificial layer; and a10) forming an air gap between the layer of polymeric material and the substrate by release of said layer of polymeric material from said sacrificial layer upon removal of said sacrificial layer, whereby said air gap has an air gap depth greater than said sacrificial layer depth; b) providing a wafer; c) disposing said membrane-substrate structure on said wafer; d) heating said wafer and said membrane-substrate structure; and e) cooling said wafer and said membrane-substrate structure to room temperature.
- According to a fourth embodiment, the present invention discloses a process for restoring tensile stress to a monolithic membrane-substrate structure comprising the steps of: a) fabricating a membrane-substrate structure, said step of fabricating the membrane-substrate structure comprising: a1) providing a substrate; a2) depositing a protective layer on said substrate; a3) forming a trench in said substrate, said trench having a trench depth; a4) depositing a first intermediate layer in said trench; a5) depositing a sacrificial layer on said first intermediate layer, said sacrificial layer having a sacrificial layer depth; a6) depositing and patterning a second intermediate layer on said sacrificial layer; a7) depositing a layer of polymeric material on said second intermediate layer and said sacrificial layer, said layer of polymeric material contacting said second intermediate layer; a8) removing said sacrificial layer; and a9) forming an air gap between the layer of polymeric material and the substrate by release of said layer of polymeric material upon removal of said sacrificial layer, whereby said air gap has an air gap depth greater than said sacrificial layer depth; b) providing a wafer; c) disposing said membrane-substrate structure on said wafer; d) heating said wafer and said membrane-substrate structure; and e) cooling said wafer and said membrane-substrate structure to room temperature.
- According to a fifth embodiment, the present invention discloses a monolithic membrane-substrate structure, comprising: a substrate having a trench, said trench having a trench depth; a protective layer located on the substrate; a layer of polymeric material located above the substrate and the protective layer; a first intermediate layer located in said trench; a second intermediate layer located under said layer of polymeric material and contacting said layer of polymeric material; and an air gap between the layer of polymeric material and the substrate.
- According to a sixth embodiment, the present invention discloses a monolithic membrane-substrate structure, comprising: a substrate having a first side; a first protective layer disposed on the first side of the substrate; a second protective layer disposed on the second side of the substrate; a third protective layer disposed on the first side of the substrate; a layer of polymeric material located above the first and third protective layer; a first intermediate layer located above said third protective layer and contacting said third protective layer; a second intermediate layer located under said layer of polymeric material and contacting said layer of polymeric material; and an air gap between the layer of polymeric material and the substrate.
- The process of the present invention can also realize large trench depths of about 50 μm or more. With large trench depths of about 50 μm or greater, the residual stress in the released polymeric, preferably polyimide, membrane may not be sufficient to keep the membrane taunt. This is not desirable from an application point of view, as the tuning ability and response time of the structure could be degraded. A further embodiment of the present invention solves this problem, by providing a process for restoring tensile stress to a monolithic membrane-substrate structure comprising the steps of: fabricating a membrane-substrate structure; providing a wafer; disposing said membrane-substrate structure on said wafer; heating said wafer and said membrane-substrate structure; and cooling said wafer and said membrane-substrate structure to room temperature.
- The main purpose of the air gap structure is to realize tunable RF capacitors with an air dielectric (for low loss), for use in tunable filters and phase shifters. In particular, the filters and phase shifters can be tuned by controlling the movement of the membrane.
- The present invention will be understood and appreciated more fully from the following detailed description taken in conjunction with the drawings in which:
-
FIGS. 1-10 show a series of steps on a membrane-substrate structure, performed in accordance with a first embodiment of the process of the present invention; -
FIG. 11 shows a top plan view of the membrane-substrate structure obtained through the first embodiment of the process according to the present invention; -
FIGS. 12-22 show a series of steps on a membrane-substrate structure, performed in accordance with a second embodiment of the process of the present invention; -
FIG. 23 shows a top plan view of the membrane-substrate structure obtained through the second embodiment of the process of the present invention; and -
FIGS. 24A-24C show a cross section of a device, in which large trench depths are realized, following sequential steps according to a third embodiment of the present invention. - In one embodiment of the current invention a silicon substrate or
wafer 4 hasprotective layers 5 of Si3N4 deposited on both sides of the silicon wafer by, for example, plasma enhanced chemical vapor deposition (PECVD), as shown inFIG. 1 . Preferably, thelayers 5 are about 0.5 μm thick. - A
window 6, as shown inFIG. 2 , is then patterned in one of thelayers 5 so that thesilicon wafer 4 lying underneath thelayer 5 can be etched. - Next, a
trench 7, shown inFIG. 3 , is etched in thesilicon wafer 4. Preferably, the etchant used in this step is a KOH solution and thetrench 7 has a depth of between about 5 and about 50 μm. - A
metal pad 8, an example of which is shown inFIG. 4 , is deposited and patterned in thetrench 7. Preferably themetal pad 8 consists of a Ti—Au film having a thickness of about 1 μm. Themetal pad 8 can be, for example, an electrode for electrostatic actuation. - The following figures show embodiments where the upper
protective layer 5 is present, even after formation of thetrench 7. However, once the trench is formed, the upper protective layer is not necessary anymore and can be removed. - A
sacrificial layer 9, shown inFIG. 5 , is then deposited and patterned on top of themetal pad 8 to have a lateral dimension, in plan view, larger than the corresponding dimensions of thewindow 6 in thetop layer 5. In this embodiment, thesacrificial layer 9 is about 50 μm wider than thewindow 6. Thesacrificial layer 9 should preferably be larger than the lateral dimension of thewindow 6 to prevent the membrane from attaching to the trench sidewalls. Further, thesacrificial layer 9 is preferably 1 μm thick and composed of metal, PECVD SiO2, KCl, or the like. The material for thesacrificial layer 9 is selected such that the chemical or technique used to eventually dissolve away thesacrificial layer 9 does not attack a polymeric film, preferably a polyimide film. - An
intermediate layer 10, shown inFIG. 6 , is then patterned and deposited on thesacrificial layer 9. - A layer of polymeric material or
film 11, shown inFIG. 7 , is then spun onto thesilicon wafer 4 and cured at a temperature of about 300° C. Thepolymeric film 11 used should preferably shrink by about 20-40% upon final curing. The polymeric film is under tensile stress. - A
metal mask 12, shown inFIG. 8 and preferably composed of Al, is then preferably deposited on thepolymeric film 11 and patterned to have mask holes 13. The function of the mask holes 13 is that of allowing etching of the underlying portions of thepolymeric film 11. Thepolymeric film 11 is dry etched, preferably using reactive ion etching (RIE), in correspondence of the mask holes 13, leaving film holes 13 a in thepolymeric film 11, as shown inFIG. 9 . - The
metal mask 12 is then removed, for example by a metal etchant such as Al etchant for an Al metal mask. The metal etchant used will depend on the composition of the metal mask used. - As shown in
FIG. 10 , thesacrificial layer 9 is then removed by immersing the device in a solution such as BOE for SiO2, or hot DI water for KCl. This last step, as shown inFIG. 10 , releases thepolymeric film 11 from the substrate. Since the polymeric material is under tensile stress, the air gap height obtained is determined by the original depth of thetrench 7, and not only by the height of the sacrificial layer. The depth of thetrench 7 is, in general, much larger than the depth or thickness of thesacrificial layer 9. -
FIG. 11 shows a view from the top ofFIG. 10 , thus better showing a preferred position of theholes 13 a in thepolymeric film 11. Also shown are themetal layers - In another embodiment of the process of the present invention, a
protective layer 15 of Si3N4 is deposited on the top of asilicon wafer 14 and aprotective layer 16 of Si3N4 is deposited on the bottom of thesilicon wafer 14, preferably by plasma enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition (LPCVD) as shown inFIG. 12 . Preferably, thelayers - The following figures show embodiments where the
protective layer 15 is present, even after formation of thetrench 17. However, once the trench is formed, the protective layer is not necessary anymore and can be removed. - A
window 17, shown inFIG. 13 , is then patterned in thetop layer 15 so that thesilicon wafer 14 lying underneath thetop layer 15 can be etched. - Next, a
trench 18, shown inFIG. 14 , is etched in thesilicon wafer 14. Preferably, the etchant used in this step is a KOH solution and thetrench 18 has a depth of between about 5 and about 50 μm. - Further to this, another
protective layer 19 of Si3N4, shown inFIG. 15 , is deposited in thetrench 18 to act as anetch stop layer 19 later. - A
first metal layer 20, shown inFIG. 16 , is deposited and patterned in thetrench 18 and covers theetch stop layer 19. The patternedmetal layer 20 is preferably composed of a Ti—Au film and has a thickness of about 1 μm. Themetal layer 20 can either form an electrode or reinforce theetch stop layer 19. - A
sacrificial layer 21, shown inFIG. 17 , is then deposited and patterned on top of thefirst metal pad 20. Thesacrificial layer 21 has a lateral dimension which is larger than a corresponding lateral dimension of thewindow 16 in thelayer 19. In this embodiment, the lateral dimension of thesacrificial layer 21 is about 50 μm larger than the lateral dimension of thewindow 17. Thesacrificial layer 21 should preferably be larger than the lateral dimension of thewindow 16 to prevent the membrane from attaching to the trench sidewalls. - The material for the
sacrificial layer 21 is chosen such that the chemical used to eventually dissolve away thesacrificial layer 20 does not attack a polymeric film, preferably a polyimide film. For example, thesacrificial layer 21 is composed of metal, SiO, KCl, or the like, and is preferably 1 μm thick. - Next, a
second metal pad 22, shown inFIG. 18 , is deposited and patterned on thesacrificial layer 21. - A
polymeric film 23, shown inFIG. 19 , is then spun onto thetop layer 15 and cured at a temperature of about 300° C. Thepolymeric film 23 should preferably shrink by about 20-40% upon final curing. - The bottom
protective layer 16 is then patterned to form an etch mask as shown inFIG. 20 . Thesilicon wafer 14 is mounted onto a holder (not shown) to protect thetop layer 15, and etched, preferably in KOH solution. This etching step opens access holes 24 in thebottom layer 16 as shown inFIG. 20 . - In
FIG. 21 , the portions of thesilicon wafer 14 directly above the access holes 24 are etched to theetch stop layer 19. - As shown in
FIG. 22 , thelayer 19 is then dry etched or wet etched, and thesacrificial layer 21 is then removed by immersion in a solution, such as BOE for SiO2, or hot deionized water for KCl. The tensile stress in thepolymeric membrane 23 releases the membrane and a gap height equal to theoriginal trench 18 depth is obtained as shown inFIG. 22 . -
FIG. 23 shows a view from the top ofFIG. 12 , thus better showing a preferred position of theholes 24 below thepolymeric film 23. Also shown are the metal layers 20 and 22, in dotted lines. - In a third embodiment of the process of the present invention, large trench depths, preferably of about 50 μm or greater, can be realized. This is shown in
FIGS. 24A-24C below. A released membrane-substrate structure 25, like for example the structure ofFIG. 22 , is placed on a flat,rough surface 26, preferably the unpolished side of a silicon wafer, with the polymeric, preferably polyimide,film 23 facing down as shown inFIG. 24A . In a different embodiment, also the structure shown inFIG. 10 can be used. - The membrane-
substrate structure 25 and theunpolished silicon wafer 26 are then placed in an oven (not shown) and heated to a temperature that is higher than the glass transition temperature of thepolymeric material 23. Preferably, this temperature is about 300° C. Heating thepolymeric film 23 to a temperature higher than its glass transition temperature makes thepolymeric film 23 more compliant with the unpolished side of thesilicon wafer 26 as shown inFIG. 24B . The surface roughness of the unpolished side of thesilicon wafer 25 prevents thepolymeric film 23 from adhering to thesilicon wafer 26. - The released
membrane structure 25 andsilicon wafer 26 are allowed to cool down to room temperature, following which thepolymeric film 23 will contract more than thesilicon substrate 26 and the tensile stress in thepolymeric film 23 of the releasedmembrane structure 25 is restored as shown inFIG. 24C . - As an alternative to the Si3N4 used in the above disclosed embodiments, SiO2 can be used. The method of deposition for SiO2 includes thermal deposition. With SiO2 being deposited on both sides of the silicon wafer, etching is accomplished by using ethylene diamine pyrocatechol (EDP). The disadvantages of EDP are that it etches high resistivity silicon wafers slowly or not at all and releases byproducts that tend to get deposited on other parts of the device; the device must be cleaned more rigorously following etching steps using EDP.
- In addition, as an alternative to the
silicon wafers - Although the present invention has been described with respect to specific embodiments thereof, various changes and modifications can be carried out by those skilled in the art without departing from the scope of the invention. It is intended, therefore, that the present invention encompass changes and modifications falling within the scope of the appended claims.
Claims (3)
1-52. (canceled)
53. A monolithic membrane-substrate structure, comprising:
a substrate having a trench, said trench having a trench depth;
a protective layer located on the substrate;
a layer of polymeric material located above the substrate and the protective layer;
a first intermediate layer located in said trench;
a second intermediate layer located under said layer of polymeric material and contacting said layer of polymeric material; and
an air gap between the layer of polymeric material and the substrate.
54. A monolithic membrane-substrate structure, comprising:
a substrate having a first side;
a first protective layer disposed on the first side of the substrate;
a second protective layer disposed on the second side of the substrate;
a third protective layer disposed on the first side of the substrate;
a layer of polymeric material located above the first and third protective layer;
a first intermediate layer located above said third protective layer and contacting said third protective layer;
a second intermediate layer located under said layer of polymeric material and contacting said layer of polymeric material; and
an air gap between the layer of polymeric material and the substrate.
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US11/416,529 US20060196843A1 (en) | 2003-04-04 | 2006-05-02 | Process for fabricating monolithic membrane substrate structures with well-controlled air gaps |
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US46052403P | 2003-04-04 | 2003-04-04 | |
US10/786,824 US7128843B2 (en) | 2003-04-04 | 2004-02-24 | Process for fabricating monolithic membrane substrate structures with well-controlled air gaps |
US11/416,529 US20060196843A1 (en) | 2003-04-04 | 2006-05-02 | Process for fabricating monolithic membrane substrate structures with well-controlled air gaps |
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TW570896B (en) | 2003-05-26 | 2004-01-11 | Prime View Int Co Ltd | A method for fabricating an interference display cell |
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Also Published As
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US20040197526A1 (en) | 2004-10-07 |
US7128843B2 (en) | 2006-10-31 |
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