US20060104799A1 - Methods and apparatus for reducing an electronic device manufacturing tool footprint - Google Patents
Methods and apparatus for reducing an electronic device manufacturing tool footprint Download PDFInfo
- Publication number
- US20060104799A1 US20060104799A1 US11/179,037 US17903705A US2006104799A1 US 20060104799 A1 US20060104799 A1 US 20060104799A1 US 17903705 A US17903705 A US 17903705A US 2006104799 A1 US2006104799 A1 US 2006104799A1
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- US
- United States
- Prior art keywords
- floor area
- electronic device
- device manufacturing
- mainframe
- manufacturing tool
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/6719—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the processing chambers, e.g. modular processing chambers
Abstract
In at least one aspect, a method includes positioning a load lock of an electronic device manufacturing tool such that the load lock occupies a first floor area; and positioning a mainframe power supply in a second floor area, wherein a substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint. Additionally, or alternatively, a mainframe controller may be placed so that the footprint thereof substantially overlaps the footprint of the load lock. Numerous other aspects are also provided.
Description
- The present application claims priority from U.S. Provisional Patent Application Ser. No. 60/587,110, Filed Jul. 12, 2004 (Attorney Docket No. 9081/L), which is hereby incorporated by reference herein in its entirety.
- The present invention relates generally to electronic device manufacturing, and more particularly to methods and apparatus for reducing an electronic device manufacturing tool footprint.
-
FIG. 1 illustrates a conventional electronic device manufacturing tool (or system) 101. With reference toFIG. 1 , the electronicdevice manufacturing tool 101 includes components, such as a mainframe power supply (e.g., a mainframe power box) 103 and amainframe controller 105, coupled to amainframe 107. Themainframe 107 may include one ormore processing chambers 109, each of which is coupled to a respective processingchamber power box 110 andprocessing chamber controller 111, and atransfer chamber 112 coupled to aload lock 113. A footprint of the electronicdevice manufacturing tool 101 is the area of a floor (e.g., in a clean room) 115 occupied by the electronicdevice manufacturing tool 101. Themainframe power box 103 andmainframe controller 105 are coupled to a rack 117 (e.g., an enclosure rack) separate from themainframe 107. Therefore, themainframe power box 103 andcontroller 105 occupy afloor space 118 separate from the mainframe of the electronicdevice manufacturing tool 101, thereby increasing the electronic device manufacturing tool's footprint. - Further, the
mainframe power box 103 andcontroller 105 are coupled to themainframe 107 viawiring 119, which extends from theseparate rack 117 to themainframe 107. Therefore, the farther theseparate rack 117 is located from themainframe 107, themore wiring 119 is required by the electronicdevice manufacturing tool 101, which reduces system integration. As described below, reducing the electronic device manufacturing tool footprint may increase tool (or system) integration. - Accordingly, methods and apparatus for reducing an electronic device manufacturing tool footprint are desired.
- In a first aspect of the invention, a first method is provided for reducing an electronic device manufacturing tool's footprint. The first method includes the steps of (1) positioning a load lock of an electronic device manufacturing tool such that the load lock occupies a first floor area; and (2) positioning a mainframe power supply in a second floor area, wherein a substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
- In a second aspect of the invention, a second method is provided for reducing an electronic device manufacturing tool footprint. The second method includes the steps of (1) positioning a load lock of an electronic device manufacturing tool such that the load lock occupies a first floor area; and (2) positioning a mainframe controller in a second floor area, wherein a substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
- In a third aspect of the invention, a third method is provided for reducing an electronic device manufacturing tool shipping cost. The third method includes the steps of (1) placing a load lock and a mainframe power supply of an electronic device manufacturing tool into a container; and (2) shipping the container.
- In a fourth aspect of the invention, a fourth method is provided for reducing an electronic device manufacturing tool shipping cost. The fourth method includes the steps of (1) placing a load lock and a mainframe controller of an electronic device manufacturing tool into a container; and (2) shipping the container.
- In a fifth aspect of the invention, a first apparatus is provided for reducing an electronic device manufacturing tool footprint. The first apparatus includes (1) a load lock frame; (2) a load lock of an electronic device manufacturing tool coupled to the load lock frame such that the load lock occupies a first floor area; and (3) a mainframe power supply coupled to the load lock frame such that the mainframe power supply occupies a second floor area. A substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
- In a sixth aspect of the invention, a second apparatus is provided for reducing an electronic device manufacturing tool footprint. The second apparatus includes (1) a load lock frame; (2) a load lock of an electronic device manufacturing tool coupled to the load lock frame such that the load lock occupies a first floor area; and (3) a mainframe controller coupled to the load lock frame such that the mainframe controller occupies a second floor area. A substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
- In a seventh aspect of the invention, a third apparatus is provided that includes (1) an electronic device manufacturing tool having a mainframe that occupies a first footprint, and (2) a mainframe power supply that occupies a second footprint that substantially overlaps the first footprint.
- In an eighth aspect of the invention, a fourth apparatus is provided that includes (1) an electronic device manufacturing tool having a mainframe that occupies a first footprint, and (2) a mainframe controller that occupies a second footprint that substantially overlaps the first footprint. Numerous other aspects are provided, as are systems and apparatus in accordance with these and other aspects of the invention.
- Other features and aspects of the present invention will become more fully apparent from the following detailed description, the appended claims and the accompanying drawings.
-
FIG. 1 illustrates a conventional electronic device manufacturing tool. -
FIG. 2 illustrates an exemplary electronic device manufacturing tool in accordance with an embodiment of the present invention. - The present invention relates to increasing the integration and reducing the footprint of an electronic device manufacturing tool (or system).
FIG. 2 illustrates an exemplary electronic device manufacturing tool (or system) 201 in accordance with an embodiment of the present invention. The electronicdevice manufacturing tool 201 may be employed to manufacture and/or process substrates such as glass or polymer substrates used to manufacture flat panel displays, semiconductor wafers, etc. With reference toFIG. 2 , the configuration of the exemplary electronicdevice manufacturing tool 201 is similar to the configuration of the conventional electronicdevice manufacturing tool 101 ofFIG. 1 . More specifically, the exemplary electronicdevice manufacturing tool 201 includes amainframe 203. Themainframe 203 includes one ormore processing chambers 205, each of which is coupled to a respective processingchamber power box 206 andprocessing chamber controller 207, atransfer chamber 208 and aload lock 209. Theload lock 209 is supported by aload lock rack 211. - A mainframe power box (e.g., power supply) 213 of the exemplary electronic
device manufacturing tool 201, which provides power to themainframe 203 and to each processingchamber power box 206, is positioned differently than is themainframe power box 103 of the conventional electronicdevice manufacturing tool 101. More specifically, theload lock 209 is positioned (e.g., on the load lock rack 211) such that theload lock 209 occupies afirst floor area 215, and themainframe power box 213 is positioned to occupy asecond floor area 217, a substantial portion of which is included in thefirst floor area 215. For example, thefirst floor area 215 may include the entiresecond floor area 217. Themainframe power box 213 is adapted to couple to theload lock rack 211. For example, themainframe power box 213 may couple to and be supported by theload lock rack 211 and/or be an integral part of theload lock 209. For example, themainframe power box 213 may be positioned below theload lock 209. However, themainframe power box 213 may assume other positions, such as above theload lock 209. Therefore, according to the configuration of the exemplary electronicdevice manufacturing tool 201, theload lock 209 and themainframe power box 213 occupy at least substantially overlapping floor areas. In this manner, the footprint of the electronicdevice manufacturing tool 201 is reduced. Reducing the electronic device manufacturing tool footprint may reduce a required clean room size, which may lower the cost of operating the tool. - Alternatively or additionally, in a similar manner to that described above, a
mainframe controller 218 of the exemplary electronicdevice manufacturing tool 201 may be positioned differently than is themainframe controller 105 of the conventional electronicdevice manufacturing tool 101. For example, in embodiments in which both themainframe power box 213 and themainframe controller 218 are positioned so as to reduce the footprint of themanufacturing tool 101, themainframe controller 218 is positioned to occupy a floor area (e.g., a third floor area) 219, a substantial portion of which is included within thefirst floor area 215. For example, thefirst floor area 215 may include at least 50 percent of, or preferably the entirethird floor area 219. Themainframe controller 218 may be adapted to couple to and be supported by theload lock rack 211. For example, themainframe controller 218 may couple to a side of theload lock rack 211 opposite the side of theload lock rack 211 to which themainframe power box 213 is coupled. Alternatively, themainframe controller 218 may be coupled to other portions or sides of theload lock rack 211. Further, themainframe controller 218 may be positioned above or below theload lock 209. Therefore, according to the exemplary configuration shown inFIG. 2 , theload lock 209 and themainframe controller 218 occupy overlapping floor areas. In this manner, the footprint of the electronicdevice manufacturing tool 201 is reduced. - The position of the
mainframe power box 213 and/or themainframe controller 218 of the inventive electronicdevice manufacturing tool 201 may allow wiring 220 between themainframe power box 213 and/or themainframe controller 218 and other components of the electronicdevice manufacturing tool 201 to be reduced. More specifically, because of the position of themainframe power box 213 and/or themainframe controller 218, the electronicdevice manufacturing tool 201 does not require wiring to be run from a separate enclosure to themainframe 203 in order to couple themainframe power box 213 and/or themainframe controller 218 to themainframe 203. Thewiring 220 between themainframe power box 213 and/or themainframe controller 218 and themainframe 203 may fit compactly within the mainframe footprint. Therefore, in addition to reducing the footprint of the electronic device manufacturing tool, the present methods and apparatus may increase system integration and reduce system complexity. - In accordance with an embodiment of the present invention the exemplary electronic
device manufacturing tool 201 may be transported (e.g., shipped) more efficiently than the conventional electronicdevice manufacturing tool 101. More specifically, conventionally, themainframe power box 103 andmainframe controller 105 are shipped separately from theload lock 113 of the conventional electronicdevice manufacturing tool 101. In contrast, themainframe power box 213 of the inventive electronicdevice manufacturing tool 201 may be shipped with theload lock 209. As described above, themainframe power box 213 may be adapted to couple to theload lock rack 211 and occupy an overlapping footprint with theload lock 209. Therefore, theload lock 209 and themainframe power box 213 of the inventive electronic device manufacturing tool 201 (e.g., which may both be assembled to the load lock rack 209) may be shipped in the same container. By shipping theload lock 209 and themainframe power box 213 in the same container, a total number of containers required to ship the exemplary electronicdevice manufacturing tool 201 is reduced. Consequently, the electronic device manufacturing tool shipping cost is reduced. Alternatively or additionally, in a similar manner, themainframe controller 218 may be shipped in the same container as theload lock 209. - The foregoing description discloses only exemplary embodiments of the invention. Modifications of the above disclosed apparatus and methods which fall within the scope of the invention will be readily apparent to those of ordinary skill in the art. In one or more embodiments, a substantial portion (e.g., at least 50 percent, and preferably 100 percent) of the floor area occupied by the
mainframe power box 213 and/or the mainframe controller 218 (e.g., a second and/or third floor area, respectively) is within the floor area occupied by the load lock 209 (e.g., a first floor area 215). However, in other embodiments, a substantial portion of the floor area occupied by themainframe power box 213 and/or themainframe controller 218 may be within the floor area occupied by another component of the electronicdevice manufacturing tool 201. For example, themainframe power box 213 and/or themainframe controller 218 may be coupled to another component of the electronicdevice manufacturing tool 201 or to a support rack of that component. - Accordingly, while the present invention has been disclosed in connection with exemplary embodiments thereof, it should be understood that other embodiments may fall within the spirit and scope of the invention, as defined by the following claims.
Claims (21)
1. A method of reducing an electronic device manufacturing tool footprint, comprising:
positioning a load lock of an electronic device manufacturing tool such that the load lock occupies a first floor area; and
positioning a mainframe power supply in a second floor area, wherein a substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
2. The method of claim 1 wherein positioning the mainframe power supply in the second floor area, wherein a substantial portion of the second floor area is within the first floor area, includes positioning the mainframe power supply in the second floor area, wherein all of the second floor area is within the first floor area.
3. The method of claim 1 further comprising reducing wiring required by the electronic device manufacturing tool.
4. The method of claim 1 further comprising positioning a mainframe controller in a third floor area, wherein a substantial portion of the third floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
5. The method of claim 4 wherein positioning the mainframe controller in the third floor area, wherein a substantial portion of the third floor area is within the first floor area, includes positioning the mainframe controller in the third floor area, wherein all of the third floor area is within the first floor area.
6. A method of reducing an electronic device manufacturing tool footprint, comprising:
positioning a load lock of an electronic device manufacturing tool such that the load lock occupies a first floor area; and
positioning a mainframe controller in a second floor area, wherein a substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
7. The method of claim 6 wherein positioning the mainframe controller in the second floor area, wherein a substantial portion of the second floor area is within the first floor area, includes positioning the mainframe controller in the second floor area, wherein all of the second floor area is within the first floor area.
8. The method of claim 6 further comprising reducing wiring required by the electronic device manufacturing tool.
9. The method of claim 6 further comprising positioning a mainframe power supply in a third floor area, wherein all of the third floor area is within the first floor area.
10. A method of reducing an electronic device manufacturing tool shipping cost, comprising:
placing a load lock and at least one of a mainframe power supply and a mainframe controller of an electronic device manufacturing tool into a container; and
shipping the container.
11. The method of claim 10 further comprising placing both the main frame power supply and the mainframe controller of the electronic device manufacturing tool into the container prior to shipping.
12. An apparatus for reducing an electronic device manufacturing tool footprint, comprising:
a load lock frame;
a load lock of an electronic device manufacturing tool coupled to the load lock frame such that the load lock occupies a first floor area; and
a mainframe power supply coupled to the load lock frame, such that the mainframe power supply occupies a second floor area wherein a substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
13. The apparatus of claim 12 wherein all of the second floor area is within the first floor area.
14. The apparatus of claim 12 further comprising a mainframe controller coupled to the load lock frame such that the mainframe controller occupies a third floor area, wherein a substantial portion of the third floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
15. The apparatus of claim 14 wherein all of the third floor area is within the first floor area.
16. An apparatus for reducing an electronic device manufacturing tool footprint, comprising:
a load lock frame;
a load lock of an electronic device manufacturing tool coupled to the load lock frame such that the load lock occupies a first floor area; and
a mainframe controller coupled to the load lock frame such that the mainframe controller occupies a second floor area, wherein a substantial portion of the second floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
17. The apparatus of claim 16 wherein all of the second floor area is within the first floor area.
18. The apparatus of claim 17 further comprising a mainframe power supply coupled to the load lock frame such that the mainframe power supply occupies a third floor area, wherein a substantial portion of the third floor area is within the first floor area, thereby reducing the electronic device manufacturing tool footprint.
19. The apparatus of claim 18 wherein all of the third floor area is within the first floor area.
20. An apparatus comprising:
an electronic device manufacturing tool having a mainframe that occupies a first footprint, and
a mainframe power supply that occupies a second footprint that substantially overlaps the first footprint.
21. The apparatus of claim 20 further comprising a mainframe controller that occupies a third footprint that substantially overlaps the first footprint.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/179,037 US20060104799A1 (en) | 2004-07-12 | 2005-07-11 | Methods and apparatus for reducing an electronic device manufacturing tool footprint |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US58711004P | 2004-07-12 | 2004-07-12 | |
US11/179,037 US20060104799A1 (en) | 2004-07-12 | 2005-07-11 | Methods and apparatus for reducing an electronic device manufacturing tool footprint |
Publications (1)
Publication Number | Publication Date |
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US20060104799A1 true US20060104799A1 (en) | 2006-05-18 |
Family
ID=35906106
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/179,037 Abandoned US20060104799A1 (en) | 2004-07-12 | 2005-07-11 | Methods and apparatus for reducing an electronic device manufacturing tool footprint |
Country Status (5)
Country | Link |
---|---|
US (1) | US20060104799A1 (en) |
JP (1) | JP4567541B2 (en) |
KR (1) | KR100648321B1 (en) |
CN (1) | CN1802084B (en) |
TW (1) | TWI297906B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6463220B2 (en) * | 2015-05-21 | 2019-01-30 | 東京エレクトロン株式会社 | Processing system |
Citations (5)
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US5855681A (en) * | 1996-11-18 | 1999-01-05 | Applied Materials, Inc. | Ultra high throughput wafer vacuum processing system |
US6303906B1 (en) * | 1999-11-30 | 2001-10-16 | Wafermasters, Inc. | Resistively heated single wafer furnace |
US20030213560A1 (en) * | 2002-05-16 | 2003-11-20 | Yaxin Wang | Tandem wafer processing system and process |
US20040088145A1 (en) * | 2002-11-06 | 2004-05-06 | Rosenthal Richard Edwin | Methods and apparatus for designing the racking and wiring configurations for pieces of hardware |
US6860965B1 (en) * | 2000-06-23 | 2005-03-01 | Novellus Systems, Inc. | High throughput architecture for semiconductor processing |
Family Cites Families (11)
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US5838121A (en) * | 1996-11-18 | 1998-11-17 | Applied Materials, Inc. | Dual blade robot |
US5909994A (en) * | 1996-11-18 | 1999-06-08 | Applied Materials, Inc. | Vertical dual loadlock chamber |
US6059507A (en) * | 1997-04-21 | 2000-05-09 | Brooks Automation, Inc. | Substrate processing apparatus with small batch load lock |
JP3582330B2 (en) * | 1997-11-14 | 2004-10-27 | 東京エレクトロン株式会社 | Processing apparatus and processing system using the same |
JP4316752B2 (en) * | 1999-11-30 | 2009-08-19 | キヤノンアネルバ株式会社 | Vacuum transfer processing equipment |
JP2004522321A (en) * | 2000-12-01 | 2004-07-22 | ウエファーマスターズ, インコーポレイテッド | Wafer processing system including robot |
JP2002343720A (en) * | 2001-05-11 | 2002-11-29 | Hitachi Kokusai Electric Inc | Heat treatment system |
JP2003017543A (en) * | 2001-06-28 | 2003-01-17 | Hitachi Kokusai Electric Inc | Substrate processing apparatus, substrate processing method, semiconductor device manufacturing method, and conveying apparatus |
JP2003092329A (en) * | 2001-09-18 | 2003-03-28 | Hitachi Kokusai Electric Inc | Substrate processing system |
JP2003133388A (en) * | 2001-10-25 | 2003-05-09 | Ulvac Japan Ltd | Substrate-conveying apparatus |
JP2004119401A (en) * | 2002-09-20 | 2004-04-15 | Foi:Kk | Substrate processing system |
-
2005
- 2005-07-11 JP JP2005202138A patent/JP4567541B2/en not_active Expired - Fee Related
- 2005-07-11 US US11/179,037 patent/US20060104799A1/en not_active Abandoned
- 2005-07-12 TW TW094123643A patent/TWI297906B/en not_active IP Right Cessation
- 2005-07-12 KR KR1020050062596A patent/KR100648321B1/en active IP Right Grant
- 2005-07-12 CN CN2005101132259A patent/CN1802084B/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5855681A (en) * | 1996-11-18 | 1999-01-05 | Applied Materials, Inc. | Ultra high throughput wafer vacuum processing system |
US6303906B1 (en) * | 1999-11-30 | 2001-10-16 | Wafermasters, Inc. | Resistively heated single wafer furnace |
US6860965B1 (en) * | 2000-06-23 | 2005-03-01 | Novellus Systems, Inc. | High throughput architecture for semiconductor processing |
US20030213560A1 (en) * | 2002-05-16 | 2003-11-20 | Yaxin Wang | Tandem wafer processing system and process |
US20040088145A1 (en) * | 2002-11-06 | 2004-05-06 | Rosenthal Richard Edwin | Methods and apparatus for designing the racking and wiring configurations for pieces of hardware |
Also Published As
Publication number | Publication date |
---|---|
TW200614328A (en) | 2006-05-01 |
KR20060050063A (en) | 2006-05-19 |
JP4567541B2 (en) | 2010-10-20 |
CN1802084B (en) | 2011-08-10 |
KR100648321B1 (en) | 2006-11-23 |
TWI297906B (en) | 2008-06-11 |
CN1802084A (en) | 2006-07-12 |
JP2006041509A (en) | 2006-02-09 |
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Legal Events
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AS | Assignment |
Owner name: APPLIED MATERIALS, INC., CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:JOZWIAK, JANUSZ;REEL/FRAME:016854/0470 Effective date: 20050831 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |