US20060103019A1 - Socket grid array - Google Patents

Socket grid array Download PDF

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Publication number
US20060103019A1
US20060103019A1 US11/302,589 US30258905A US2006103019A1 US 20060103019 A1 US20060103019 A1 US 20060103019A1 US 30258905 A US30258905 A US 30258905A US 2006103019 A1 US2006103019 A1 US 2006103019A1
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United States
Prior art keywords
pcb
projections
mounting surface
sockets
solder
Prior art date
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Abandoned
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US11/302,589
Inventor
Kenneth Hodson
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Individual
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Individual
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Publication date
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Priority to US11/302,589 priority Critical patent/US20060103019A1/en
Publication of US20060103019A1 publication Critical patent/US20060103019A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • E—FIXED CONSTRUCTIONS
    • E04—BUILDING
    • E04H—BUILDINGS OR LIKE STRUCTURES FOR PARTICULAR PURPOSES; SWIMMING OR SPLASH BATHS OR POOLS; MASTS; FENCING; TENTS OR CANOPIES, IN GENERAL
    • E04H4/00—Swimming or splash baths or pools
    • E04H4/12—Devices or arrangements for circulating water, i.e. devices for removal of polluted water, cleaning baths or for water treatment
    • E04H4/1209—Treatment of water for swimming pools
    • C—CHEMISTRY; METALLURGY
    • C02—TREATMENT OF WATER, WASTE WATER, SEWAGE, OR SLUDGE
    • C02F—TREATMENT OF WATER, WASTE WATER, SEWAGE, OR SLUDGE
    • C02F1/00—Treatment of water, waste water, or sewage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • C—CHEMISTRY; METALLURGY
    • C02—TREATMENT OF WATER, WASTE WATER, SEWAGE, OR SLUDGE
    • C02F—TREATMENT OF WATER, WASTE WATER, SEWAGE, OR SLUDGE
    • C02F2103/00—Nature of the water, waste water, sewage or sludge to be treated
    • C02F2103/42—Nature of the water, waste water, sewage or sludge to be treated from bathing facilities, e.g. swimming pools
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    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/8112—Aligning
    • H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
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    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/81139—Guiding structures on the body
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    • H01—ELECTRIC ELEMENTS
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    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/81801—Soldering or alloying
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    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/01029—Copper [Cu]
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    • H01L2924/01033—Arsenic [As]
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10992—Using different connection materials, e.g. different solders, for the same connection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T29/49002—Electrical device making
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128—Assembling formed circuit to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T29/49002—Electrical device making
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

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  • Connecting Device With Holders (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

Assembly methods and semiconductor device assemblies are disclosed in which corresponding IC sockets and PCB projections are used for alignment and bond formation between IC and PCB components of a completed assembly, for example, a BGA. Embodiments of the invention further provide the capability of disassembly and reassembly.

Description

    TECHNICAL FIELD
  • The invention relates to semiconductor devices and integrated circuits (ICs). More particularly, it relates to new socket grid array devices and methods for assembling the same.
    • BACKGROUND OF THE INVENTION
  • Semiconductor devices are subject to many competing design goals. When considering resin encapsulated semiconductor devices in terms of mounting approaches, packaged devices may be roughly classified into the pin insertion type and the surface mount type. Since it is very often desirable to minimize the profile of electronic apparatus, surface mount semiconductor devices are often preferred, such as for example, ball grid array (BGA) devices. BGAs are commonly used in applications requiring high-density surface-mounted devices. BGAs known in the arts are generally assembled by affixing an integrated circuit (IC) device to a printed circuit board (PCB). The BGA and PCB have corresponding contact points, or bond pads. The components are aligned, typically using sophisticated optical aligning tools, and solder balls pre-positioned at the contact points are reflowed. Obtaining the precise alignment necessary to properly position the corresponding contact points on the BGA and PCB presents a serious challenge. When completed, the BGA/PCB assembly solder joints are typically “blind,” that is, they are not readily accessible for visual inspection. Due to the blind solder joints, trouble-shooting an assembly often requires specialized tools such as x-ray equipment or fiber-optic equipped “BGA microscopes”. Due to the complexity of the devices, it is sometimes desirable to remove a BGA device from a PCB for independent testing or replacement. Removal and replacement are made difficult by the same type alignment and soldering constraints as encountered in assembly.
  • Due to these and other problems, improved alignment techniques, accessibility, replaceability, and increasingly robust and durable devices are desirable in the arts.
    • SUMMARY OF THE INVENTION
  • In carrying out the principles of the present invention, in accordance with preferred embodiments thereof, methods and devices of the invention provide sockets and projections facilitating alignment and attachment of an IC to a PCB.
  • According to one aspect of the invention, a method of assembling a semiconductor device includes a step of providing a plurality of sockets on the mounting surface of a IC device and corresponding projections on the mounting surface of a PCB. In a further step, the IC device and the PCB are positioned with corresponding sockets and projections in alignment. The IC is then affixed to the PCB.
  • According to an additional aspect of the invention, a semiconductor device assembled according to preferred embodiments of the invention may be disassembled by a step of detaching the IC from the PCB.
  • According to a further aspect of the invention, a step of reaffixing a detached IC to the PCB may be performed.
  • According to still another aspect of the invention, an embodiment of a semiconductor assembly includes an IC having a plurality of metallic sockets arrayed on a mounting surface. The semiconductor assembly also includes a PCB having a plurality of metallic projections arrayed on a mounting surface. The PCB and IC are positioned so that some of the sockets adjoin some of the projections, and solder joints couple the adjoining IC sockets and PCB projections.
  • According to a further aspect of the invention, solder joints coupling the IC and PCB are designed to be readily detachable.
  • Preferred embodiments of the invention are disclosed include use in BGA assemblies.
  • The invention provides technical advantages including but not limited to providing semiconductor device assemblies and methods having readily aligned bonding surfaces and robust, removable, and replaceable, solder joints. These and other features, advantages, and benefits of the present invention can be understood by one of ordinary skill in the art upon careful consideration of the detailed description of representative embodiments of the invention in connection with the accompanying drawings.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The present invention will be more clearly understood from consideration of the following detailed description and drawings in which:
  • FIG. 1 is a cut away partial side view of an example of a PCB according to a preferred embodiment of the invention;
  • FIG. 2 is a cut away partial side view of a PCB with solder added, further illustrating an example of a preferred embodiment of the invention;
  • FIG. 3 is a cut away partial side view of an example of a PCB and a BGA according to a preferred embodiment of the invention;
  • FIG. 4 is a cut away partial side view of a BGA affixed to a PCB further illustrating an example of a preferred embodiment of the invention;
  • FIG. 5 is a cut away partial side view of an example of a PCB according to an example of an alternative embodiment of the invention;
  • FIG. 6 is a cut away partial side view of a PCB and a BGA according to an example of an alternative embodiment of the invention;
  • FIG. 7 is a cut away partial side view of a BGA affixed to a PCB further illustrating an example of an alternative embodiment of the invention;
  • FIG. 8 is a cut away partial side view of a PCB with solder added, further illustrating an example of an alternative embodiment of the invention;
  • FIG. 9 is a cut away partial side view of a PCB and a BGA according to an example of an alternative embodiment of the invention; and
  • FIG. 10 is a cut away partial side view of a BGA affixed to a PCB further illustrating an example of an alternative embodiment of the invention.
  • References in the detailed description correspond to the references in the figures unless otherwise noted. Descriptive and directional terms used in the written description such as first, second, top, bottom, side, etc., refer to the drawings themselves as laid out on the paper and not to physical limitations of the invention unless specifically noted. The drawings are not to scale, and some features of embodiments shown and discussed are simplified or amplified for illustrating the principles, features, and advantages of the invention.
    • DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
  • In general, the methods and apparatus of the invention provide improved semiconductor device assemblies such as, for example, BGAs.
  • Now referring first to FIG. 1, exemplary embodiments of the invention and steps in their assembly are shown in partial cross section. A printed circuit board (PCB) 10 is shown. The PCB 10 has a surface 12 for mounting an IC. Typically, the mounting surface 12 has numerous metal contact points 14 designed for making electrical connections with a mounted device.
  • Now referring primarily to FIG. 2, a cross section of a portion of a PCB 10 is shown exhibiting a further step in the assembly of a semiconductor device according to a preferred embodiment of the invention. Numerous projections 16 are attached to the contact points 14. The projections 16 are metallic, for example, preferably copper, aluminum, gold, or one or metals or alloys selected for their conductivity and amenability to soldering. The projections 16 may be made using individual nodes 15 of metal, in this example generally hemispherical in shape. Preferably, if individual nodes 15 are used, they are positioned using pick-and-place procedures familiar in the arts. The nodes 15 are preferably attached to the contact points 14 with solder 17, although adhesive such as epoxy may also be used, to form a completed projection 16. If solder 17 is used, high temperature solder 17 is preferred. Although the projections 16 appear as single units in the drawings, it should be understood that they may be also constructed of multiple metallic layers. The projections may alternatively be formed in place on the contact points using masking, deposition, and etching techniques known in the arts.
  • FIG. 3 exhibits a PCB 10 cross section with a IC 18, also shown in cross section, positioned with a mounting surface 20 adjacent to the mounting surface 12 of the PCB 10. The IC 18 has numerous contact points 22 on its mounting surface 20. Preferably, the contact points 22 are positioned in alignment with the contact points 14 of the PCB 10. As shown in the preferred embodiment, the contact points 22 each have a socket 24. The sockets 24 are configured for receiving the projections 16 of the PCB 10, and for the disposition of solder 26 in between. The sockets 24 are preferably formed by patterning, etching, and deposition processes known in the arts, but may also be drilled or punched into the contact points 22.
  • A partial cross section view of a semiconductor device assembly 28 according to an example of a preferred embodiment of the invention is shown in FIG. 4. The IC 18 is shown affixed to the PCB 10 with the contact points 14, 22, of their adjacent mounting surfaces, 12, 20, in alignment. According to the methods of the invention, the projections 16 and sockets 24 are preferably used to ensure correct alignment, either with or without the assistance of optical alignment tools known in the arts. When the sockets 24 and projections 16 are in alignment, the solder 26 placed in between is reflowed and allowed to harden forming a mechanically secure and electrically conductive bond. In the presently preferred embodiment of the invention, low temperature solder 26 is used. The use of low temperature solder 26 permits the disassembly of the semiconductor device assembly 28 shown in FIG. 4 into the separate IC 18 and PCB components shown in FIG. 3 by reflowing the low temperature the solder 26 without reflowing the higher temperature solder 17.
  • Now referring primarily to FIG. 5, exemplary alternative embodiments of the invention and steps in the assembly of semiconductor devices according to the invention are shown in partial cross section. A printed circuit board (PCB) 10 is shown. The PCB 10 has a surface 12 for mounting an IC. The mounting surface 12 has numerous metal contact points 14 for making electrical connections with a mounted device. In this embodiment of the invention, the contact points 14 include projections 16. The numerous projections 16 integral portions of the contact points 14, preferably copper other metal selected for PCB use for good for conductivity and soldering characteristics. As mentioned above, the projections 16 may be constructed of multiple metallic layers formed on the contact points 14 using masking, deposition, and etching techniques known in the arts.
  • FIG. 6 exhibits a PCB 10 cross section with a IC 18, also shown in cross section, positioned with a mounting surface 20 adjacent to the mounting surface 12 of the PCB 10. The IC 18 has numerous contact points 22 on its mounting surface 20. Preferably, the contact points 22 are positioned in alignment with the contact points 14 of the PCB 10. As shown in the preferred embodiment, the contact points 22 each have a socket 24. The sockets 24 are configured for receiving the projections 16 of the PCB 10. Solder 26 is positioned in the sockets 24.
  • FIG. 7 illustrates a partial cross section view of a semiconductor device assembly 30 according to an example of an alternative embodiment of the invention. The IC 18 is shown affixed to the PCB 10 with the contact points 14, 22, of their adjacent mounting surfaces, 12, 20, aligned. Using the methods of the invention, the projections 16 and sockets 24 are preferably used to ensure correct alignment, either with or without the assistance of optical alignment tools known in the arts. When the sockets 24 and projections 22 are in alignment, the solder 26 is reflowed and allowed to harden forming a mechanically secure and electrically conductive bond. It should be noted that the disassembly of the assembly 30 of FIG. 7 may be accomplished by again reflowing the solder 26 separating the constituent PCB 10 and IC 18 components as shown in FIG. 6.
  • Now referring to FIG. 8, another example of alternative embodiments of the invention is described. A PCB 10 as shown initially in FIG. 1 includes projections 16 added to contact points 14 by the attachment of solder balls. The term “solder balls” as used in the arts refers to nodules of solder, which are often not ball-shaped.
  • In FIG. 9, the PCB 10 of FIG. 8 is shown with a IC 18 positioned with the mounting surface 20 adjacent to the mounting surface 12 of the PCB 10. Preferably, the contact points 22, 14 of the IC 18 and PCB 10 are positioned in alignment. The contact points 22 of the IC 18 each have a socket 24. The sockets 24 are configured for receiving the solder ball projections 16 of the PCB 10.
  • A partial cross section view of a completed semiconductor device assembly 32 according to an alternative example of an embodiment of the invention is shown in FIG. 10. The IC 18 is shown affixed to the PCB 10 with the contact points 14, 22, of their adjacent mounting surfaces, 12, 20, aligned. Using the methods of the invention, the projections 16 and sockets 24 are preferably used to ensure correct alignment, either with or without the assistance of optical alignment tools known in the arts. When the sockets 24 and projections 16 are in alignment, the solder ball projections 16 are reflowed and allowed to harden forming a mechanically secure and electrically conductive bond. Disassembly of the semiconductor device assembly 32 of may be accomplished by again reflowing the solder ball projections 16, separating the constituent PCB 10 and IC 18 components as shown in FIG. 9.
  • Thus, the invention provides reliable removable and replaceable solder joints for joining an IC to a PCB. The methods and devices of the invention provide advantages including facilitation of alignment during assembly and reassembly. While the invention has been described with reference to certain illustrative embodiments, the methods and apparatus described are not intended to be construed in a limited sense. Various modifications and combinations of the illustrative embodiments as well as other advantages and embodiments of the invention will be apparent to persons skilled in the art upon reference to the description and claims.

Claims (13)

1. A method of assembling a semiconductor device comprising the steps of:
providing a plurality of sockets on the mounting surface of an IC;
providing a plurality of projections on the mounting surface of a PCB;
positioning the IC and the PCB such that a plurality of the sockets and a plurality of the projections are in alignment; and
affixing the IC to the PCB whereby the aligned sockets and projections maintain the proper positioning of the IC and the PCB.
2. A method according to claim 1 further comprising the step of subsequently detaching the IC from the PCB.
3. A method according to claim 2 further comprising the step of subsequently reaffixing the IC to the PCB.
4. A method according to claim 1 wherein the step of affixing the IC to the PCB further comprises the step of reflowing solder there-between.
5. A method according to claim 1 wherein the step of providing projections on the mounting surface of the PCB further comprises a step of applying high melting point solder to selected locations on the PCB.
6. A method according to claim 1 wherein the step of providing projections on the mounting surface of the PCB further comprises a step of attaching metallic projections to selected locations on the PCB.
7. A method according to claim 1 wherein the step of providing projections on the mounting surface of the PCB further comprises a step of attaching metallic projections to selected locations on the PCB using high melting point solder.
8. A method according to claim 1 wherein the step of affixing the IC to the PCB further comprises a step of applying low melting point solder to the sockets of the IC.
9. A method according to claim 8 further comprising the step of subsequently detaching the IC from the PCB by reflowing the low melting point solder.
10. A method according to claim 1 wherein the step of providing a plurality of sockets on the mounting surface of the IC further comprises steps of patterning and etching selected locations on the mounting surface.
11. A method according to claim 1 wherein the step of providing a plurality of sockets on the mounting surface of the IC further comprises a step of drilling selected locations on the mounting surface.
12. A method according to claim 1 wherein the step of providing a plurality of sockets on the mounting surface of the IC further comprises a step of punching selected locations on the mounting surface.
13-24. (canceled)
US11/302,589 2004-02-05 2005-12-13 Socket grid array Abandoned US20060103019A1 (en)

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JP2016167544A (en) * 2015-03-10 2016-09-15 ソニー株式会社 Electronic component, electronic component mounting board and mounting method of electronic component
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US20050173795A1 (en) 2005-08-11
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US7005742B2 (en) 2006-02-28

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