The present invention relates to voltage regulator circuits, and more particularly, to fully integrated DC-to-DC voltage regulators.
The vast majority of voltage regulators (converters) used in high performance electronics may be classified into two basic types: linear and switched regulators. Switched regulators are much more efficient than linear regulators because the pass transistors used in switched regulators do not continuously draw current. The best efficiency achievable with a linear regulator, even assuming ideal (lossless) components, is Vout/Vin, where Vout is the regulated output voltage and Vin is the input voltage to the voltage regulator. Linear regulators may be a good choice for applications in which the difference between the output voltage Vout and the original supply input voltage Vin is not too large. But when the regulated voltage is sufficiently less than the input voltage, switched regulators are usually the preferred option, particular where power savings is important.
Switched regulators making use of inductors, such as a Buck switching regulator, can offer an operating efficiency greater than 90%. Presently, such voltage regulators are not fully integrated on the processor die for several reasons. Voltage regulators are usually designed with operating frequencies in a range of 0.1 to 10 MHz. But the inductance needed for switched voltage regulators using inductors operating in this frequency range is too large for an on-chip inductor. Increasing the operating frequency still leads to inductors that are too large for on-chip placement without the use of magnetic material in the inductor. However, magnetic materials are typically not used in high-frequency inductors because their frequency range has to date been limited to much less than 100 MHz.
As processor technology scales to smaller dimensions, supply voltages to circuits within a processor will also scale to smaller values. The power consumption of processors has also been increasing. Using an external power supply or an off-chip voltage regulator to provide a small supply voltage to a processor with a large power consumption will lead to a larger total electrical current being supplied to the processor. This will increase the electrical current per pin, or the total number of pins needed. Currently, the number of pins limits the scaling of ULSI circuits. An increase in supply current can also lead to an increase in resistive voltage drops across various off-chip and on-chip interconnects.
Furthermore, there has been interest in using two different supply voltages in a processor to reduce power consumption and pin count. As an example, a processor may be designed so that high performance circuits within the processor use a higher supply voltage than that used for low performance circuits within the processor. Modeling has shown that at least a 30% savings in power can be achieved by using a dual power supply in a microprocessor. Using one or more off-chip voltage regulators to provide two circuit supply voltages to a processor die can lead to an increase in complexity, pin count, and cost.
BRIEF DESCRIPTION OF THE DRAWINGS
Consequently, as technology scales to smaller voltages, and for dual voltage processors, there would be advantages to integrating switched voltage regulators on the die.
FIG. 1 is a computer system employing an embodiment of the present invention.
FIG. 2 is a DC-to-DC converter having an inductor according to an embodiment of the present invention.
FIG. 3 illustrates the structure of an inductor according to an embodiment of the present invention.
DESCRIPTION OF EMBODIMENTS
FIG. 4 illustrates another structure of an inductor according to an embodiment of the present invention.
Embodiments of the present invention may be integrated on a processor, or used in computer systems, such as that in FIG. 1. In FIG. 1, microprocessor die 102 comprises many sub-blocks, such as arithmetic logic unit (ALU) 104 and on-die cache 106. Microprocessor 102 may also communicate to other levels of cache, such as off-die cache 108. Higher memory hierarchy levels, such as system memory 110, are accessed via host bus 112 and chipset 114. In addition, other off-die functional units, such as graphics accelerator 116 and network interface controller (NIC) 118, to name just a few, may communicate with microprocessor 102 via appropriate busses or ports.
Power supply 120 provides a supply voltage to microprocessor 102 via power bus 122. Power supply 120 may be part of a power distribution system providing power to other modules, but for simplicity such connections are not shown. Embodiments of the present invention are realized in voltage regulator 124.
Regulator 124 is an on-chip DC-to-DC switching regulator comprising an inductor which is switched ON and OFF at a relatively high switching frequency. The switching frequency may be much higher than 100 MHz, and it is expected that embodiments may have switching frequencies greater than 1 GHz. FIG. 2 provides one example of a circuit topology for regulator 124, which is recognized as a Buck converter. Switch controller 202 senses the load voltage at output port 204 and compares it with a reference voltage Vref. In response to this comparison, switches 206 and 208 are switched ON and OFF by switch controller 202 at a switching frequency and with a duty factor so as to maintain the sensed output voltage close to Vref. Switches 206 and 208 may be realized by field effect transistors.
Inductor 210 comprises magnetic material, such as amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys. An amorphous alloy used in a particular embodiment may comprise various atomic percentages of its constituent elements. For example, a particular embodiment using the amorphous cobalt alloy CoZrTa may have 4% Zr, 4.5% Ta, with the rest being Co. For some other embodiments using CoZrTa, the range for Zr may be from 3% to 12% and the range for Ta may be from 0% to 10%. Other embodiments may use the cobalt alloy CoFeHfO, with 19.1% Fe, 14.5% Hf, and 22.1% 0, or the Cobalt alloy CoFeAlO, with 51.1% Co, 21.9% Fe, and 27% Al. These merely serve as particular examples.
In preferred embodiments, the structure of inductor 210 is such that it has a relatively low resistance. For some embodiments, inductor 210 has a structure shown in FIG. 3. FIG. 3 shows a portion of a low resistance inductor comprising a first sub-structure 302 and a second sub-structure 304. These sub-structures are substantially parallel to each other, and each comprises a conductor 306. Above and below conductor 306 are magnetic films 308. Insulating layers 310 are between magnetic films 308 and conductor 306.
For each sub-structure in FIG. 3, conductor 306 and magnetic films 308 may be viewed as comprising “upper” portions and “lower” portions. An upper portion of conductor 306 or magnetic film 310 is that part of conductor 306 or magnetic film 310 substantially parallel to and above insulating pedestals 312. Insulating pedestals 312 are insulating layers deposited above substrate 314. A lower portion of conductor 306 or magnetic film 310 is that part of conductor 306 or magnetic film which is substantially parallel to substrate 314 but not above pedestals 312. For some embodiments, the upper and lower portions of conductor 306 and magnetic film 308 of a sub-structure form a periodic structure.
As seen from FIG. 3, sub-structures 302 and 304 are joined by connecting sub-structure 305, so that conductive layers 306 in substructures 302 and 304 are electrically connected to each other. As a result, DC current flow in sub-structure 302 is opposite in direction to DC current flow in sub-structure 304. For the embodiment of FIG. 3, the upper magnetic layers in sub-structures 302 and 304 are also in physical contact via connecting sub-structure 305, but may not be for other embodiments. Within sub-structures 302 and 304, FIG. 3 shows the upper and lower portions of conductor 306 connected to each other by “vertically” oriented conductors 316. In practice, the upper and lower portions of conductor 306 may be electrically connected by vias. In another embodiment, the upper and lower portions of conductor 306 may be electrically connected by conductive layers arranged in a stepped manner over pedestals 312. The vertically oriented conductors 316 in FIG. 3 are meant to pictorially represent these and other methods by which the upper and lower portions of conductor 306 are in electrical contact, and it is to be understood that reference to “vertical conductor” is meant to include reference to a conductor formed by vias, a conductor that is stepped, or a conductor of other shape formed by processing techniques to connect upper and lower portions of the conductor.
Similarly, FIG. 3 shows the upper and lower portions of upper magnetic film 310 connected by vertically oriented magnetic films 317. As stated with respect to vertical conductors 316, vertically oriented magnetic films 317 may be referred to as vertical magnetic films and may represent structures that are stepped, as well other structures formed by processing techniques to connect upper and lower portions of upper magnetic film 310.
Insulating pedestals 312 for two adjacent sub-structures are arranged so that the insulating pedestals in one sub-structure are not aligned with the insulating pedestals of the other sub-structure. As a result, the upper (lower) portions of the conductor and magnetic film of one sub-structure are not aligned with the upper (lower) portions of the conductor and magnetic film of the other sub-structure. This arrangement allows for an increase in inductance. To discuss this further, define a trench as that region bounded by two adjacent vertical magnetic films 317 and the lower portion of the magnetic film 310 therebetween. The arrangement of alternating pedestals and trenches in a sub-structure, in which the trenches of one sub-structure align with the pedestals of an adjacent sub-structure, allows for the magnetic flux along the trenches of one sub-structure to align with the magnetic flux through the pedestals of an adjacent sub-structure. This alignment of flux increases the inductance. The structure of FIG. 3 is also described in U.S. Pat. No. 6,452,247.
It is found that integrated inductors according to the embodiment of FIG. 3 having wide lines with magnetic material can provide an inductance in the 5 to 100 pH range. Inductances in this range can be used in switching regulators that switch in the 10 MHz to 1 GHz range. With a structure that has a relatively wide width compared to length, the resistance of inductor of FIG. 3 may be made relatively small. For some embodiments, but not all, the conductors and magnetic material may be approximately 200 microns long and 1 mm wide, the distance between two adjacent sub-structures may be approximately 20 microns, the thickness of the conductor and magnetic material is approximately 1 to 2 microns, and the height (depth) of a pedestal (trench) is approximately 2 to 4 microns.
Other embodiments may be realized by utilizing inductors with various structures. For example, an integrated inductor is shown in FIG. 4 which has a simpler structure than that of FIG. 3. A simple, wide line conductor 402 is surrounded by high-frequency magnetic material 404. An oxide 406 immediately surrounds conductor 402 and insulates conductor 402 from magnetic material 404. That is, the top, bottom, and sides of conductor 402 are surrounded by oxide 406 and high-frequency magnetic material 404, whereas the edges of conductor 402 are available for connection to interconnects, not shown. Magnetic material 404 is chosen from the same set of high-frequency materials as discussed for FIG. 3. Other embodiments may not need oxide 406. For example, magnetic material may immediately surround conductor 402 if the magnetic material itself is insulated from other conductors, or if the magnetic material is itself an insulator.
Typical dimensions for the structure of FIG. 4 are 100 microns for the overall width w, 1 mm for the overall length l, and 8 microns for the height h. A typical thickness for magnetic material 404 and conductor 402 is 2 microns. These dimensions merely serve as an example, and other embodiments may have different dimensions.
Various modifications may be made to the disclosed embodiments without departing from the scope of the invention as claimed below. For example, the integrated DC-to-DC switching regulator need not be on the same die as microprocessor 102, but may be integrated on another die with interconnects to the microprocessor die. Furthermore, it is to be understood in these letters patent that the phrase “A is connected to B” means that A and B are directly connected to each other by way of an interconnect, such as metal or polysilicon. This is to be distinguished from the phrase “A is coupled to B”, which means that the connection between A and B may not be direct. That is, there may be an active device or passive element between A and B.