US20050098900A1 - Relaxed tolerance flip chip assembly - Google Patents
Relaxed tolerance flip chip assembly Download PDFInfo
- Publication number
- US20050098900A1 US20050098900A1 US11/016,824 US1682404A US2005098900A1 US 20050098900 A1 US20050098900 A1 US 20050098900A1 US 1682404 A US1682404 A US 1682404A US 2005098900 A1 US2005098900 A1 US 2005098900A1
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- United States
- Prior art keywords
- flip chip
- housing
- heat sink
- substrate
- silicone adhesive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83104—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus by applying pressure, e.g. by injection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Definitions
- a system, method and/or apparatus or assembly for conducting heat from a flip chip semiconductor device such as a power flip chip.
- a heat-dissipating assembly for removing heat from a flip-chip semiconductor device.
- the assembly includes a housing having a thermally-conductive first housing portion and a second housing portion, a flexible substrate supported within the housing, the substrate having conductors thereon, a flip chip mounted to the substrate, the flip chip having a first surface and solder bumps on the first surface registered with the conductors on the substrate, the flip chip having a second surface oppositely disposed from the first surface, a first heat sink extending inwardly towards the flip chip from the first housing portion; and a first pre-cured silicone adhesive layer disposed on an end of the first heat sink and in thermal relationship with the second surface of the flip chip.
- the first and second housing portions are provided with a joint configured to control the pressure exerted on the flip chip through the heat sink components.
- the flip chip is mounted between heat sink pedestals connected to the first and second housings. The joint between the housings controls the travel of the two housings toward each other when the assembly is put together. More particularly, the joint prevents excessive travel of the heat sink pedestals toward each other, which might damage the flip chip entrained between the pedestals.
- the subject invention provides a method for conducting heat from a flip chip, the method including the steps of: (a) providing a flexible substrate having conductors thereon, a flip chip having a first surface with solder bumps on the first surface and a second surface oppositely disposed from the first surface, the flip chip being mounted to the substrate such that the solder bumps are registered with the conductors on the substrate; and (b) enclosing the substrate and flip chip within a housing so that a first pre-cured silicone adhesive disposed on a first heat sink contacts the second surface of the flip chip in a first thermal transfer relationship.
- FIG. 1 is a side sectional view of a housing that encloses a pair of flip chips mounted to a substrate with heat conductive features in accordance with the principles of the subject invention
- FIG. 2 is representation of one of the flip chips about to be retained between two heatsink pedestals of the housing and depicting the manner in which the two housing portions join.
- the assembly 10 includes a housing or enclosure 14 that encloses the flip chips 12 .
- the housing 14 includes a first housing or enclosure portion or half 16 and a second housing or enclosure portion or half 18 .
- the first and second housing portions 14 and 18 are preferably either die-cast or sheet metal.
- the first and second portions 16 and 18 are joined together as described more fully below to define the housing 14 .
- the flip chip 12 is situated on a flexible substrate 20 such as laminate circuit board or thin substrate such as is known in the art. Suitable substrates, for example, include thin laminates, rigid inorganic substrates and printed wiring boards (PWB).
- Mounting of the flip chips 12 to the substrate 20 may be accomplished by conventional flip chip techniques, such as via preformed solder bumps 22 on the front side of the flip chip 12 (i.e. the surface of the flip chips 12 on which the flip chip microcircuitry is formed).
- the solder bumps 22 are registered with and reflow soldered to conductors 23 on the surface of the substrate 20 to yield solder connections with the substrate conductors 23 .
- the flip chips 12 are underfilled with a suitable polymeric material 24 , as is conventionally done in the art to promote the thermal cycle life of the solder connections.
- the housing 14 is composed of first and second portions or members 16 and 18 each having a respective peripheral flange or edge structure 37 and 41 .
- the two edge structures 37 and 41 provide a manner of joining the two housing portions 16 and 18 together.
- a pair of heat sinks in the form of pedestals 26 is shown projecting from an inner surface of the housing portion 16 and into the interior of the housing 14 .
- the pedestals 26 may be integrally formed with the housing portion 16 or may be formed separately and subsequently attached to the housing portion 16 .
- the pedestals 26 may be die-cast with the housing portion 16 , formed as sheet metal with the housing portion 16 , or formed thereafter out of a suitable thermal transfer material.
- the pedestals 26 have a depression or concavity 30 formed in the end thereof.
- the concavity 30 is preferably dimensioned so that the flip chip 12 can be at least partially received within the cavity, as depicted in FIG. 1 .
- the perimeter of the concavity is similarly configured to the perimeter of the flip chip, although larger in lateral dimension so the flip chip can sit at least partially within the cavity when the heat sink assembly is fully seated together.
- a silicone adhesive 32 is disposed in the concavity 30 and is thereafter cured. This forms a pre-cured silicone adhesive pad or layer 32 on the pedestal 26 .
- the concavity 30 is sized to accommodate the flip chip 12 . Particularly, the concavity 30 is preferably sized to be larger than the size of the flip chip 12 such that the cured silicone adhesive 32 is also preferably larger than the size of the flip chip 12 . This allows the silicone pad 32 to receive the flip chip 12 when the housing portions 16 and 18 are fully seated together.
- a further pair of heat sinks in the form of pedestals 28 extend or project from the housing portion 18 toward the interior thereof.
- the pedestals 28 may be integrally formed with the housing portion 16 or may be formed separately and subsequently attached to the housing portion 16 .
- the pedestals 28 may be die-cast with the housing portion 16 , formed as sheet metal with the housing portion 16 , or formed thereafter out of a suitable thermal transfer material.
- the pedestals 28 define an upper or end surface 34 on which is disposed a silicone adhesive layer or pad 36 .
- the silicone adhesive layer 36 is preferably pre-cured before assembly of the housing portions 16 and 18 .
- FIG. 1 shows assembly 10 in an assembled state with the housing portions 16 and 18 joined together.
- the substrate 20 and thus the flip chips 12 , are retained by the pedestals 26 and 28 .
- the silicone adhesive pad 36 of the pedestal 28 is caused to contact and provide a slight pressure against the substrate 20 .
- the silicone adhesive pad 36 is thus slightly compressed against the substrate 20 to provide thermal conductivity between the substrate 20 and the pedestal 28 .
- the silicone adhesive pad 32 of the pedestal 26 is caused to contact and provide a slight pressure against the flip chip 12 .
- the silicone adhesive pad 32 is thus slightly compressed against the flip chip 12 .
- the pre-cured silicone adhesive pads 32 and 36 will still be pliable or soft after cure and thus conform to the shape of the flip chips 12 (in the case of the pad 32 ) and the substrate 20 (in the case of the pad 36 ). This also allows the flip chip assembly (i.e. flip chips and substrate) to be removed from the housing 14 with little to no damage.
- the housing 14 may have any number of pedestal pairs and thus flip chips.
- the height of the pedestals 26 and 28 are such that the flip chips 12 and substrate 20 are slightly compressed against and into the respective silicone adhesive pads 32 and 36 upon assembly of the housing portions 16 and 18 .
- FIG. 2 there is illustrated the assembly of the housing portions 16 and 18 .
- the flip chips 12 have previously been assembled onto the substrate 20 .
- the two housing portions 16 and 18 are joined as indicated by the arrows.
- the pedestals 26 , 28 with their respective pre-cured silicone adhesive pads 32 , 36 contact the flip chips 12 and substrate 20 as indicated above.
- the edge portions 37 and 41 of the housing portions 16 and 18 respectively, join together in a manner as now described.
- the edge portion 37 which extends about the outer periphery of the housing portion 16 , includes a horizontal shelf or flat 38 .
- a flange or wall 40 extends from the flat 38 in a perpendicular direction. In FIG. 2 , the perpendicular direction is oriented as downward.
- the edge portion 41 which also extends about the outer periphery of the housing portion 18 , includes a horizontal shelf or flat 42 .
- Dual flanges or walls 44 and 46 extend from the flat 42 in a perpendicular direction. In FIG. 2 , the perpendicular direction is oriented as upward.
- the dual walls 44 and 46 are spaced from each other to form an inner trough, channel, groove or the like 48 .
- the channel 48 is dimensioned to receive the wall 40 that is dimensioned slightly smaller than the channel 48 .
- the channel 48 and wall 40 can thus form a “tongue and groove” type joint.
- a silicone adhesive is applied in the channel 48 before joining of the housing portions 16 and 18 .
- the channel 48 and the wall 40 are also dimensioned so that the wall 40 bottoms out in the channel 48 when the silicone pads 32 and 36 contact and provide adequate contact pressure on the flip chips 12 and the substrate 20 respectively.
- the channel 48 and wall 40 provide the maximum travel of the housing portions 16 and 18 (and thus the pressure of the pads 32 and 36 into the flip chips 12 and the substrate 20 ) allowed in order not to crush the flip chips 12 into the adhesive pads or beyond.
- a silicone adhesive is provided in the channel 48 that will bond with the wall 40 . In this manner, an adhesive joint is provided in addition to the tongue and groove joint. Thus, it is contemplated that no fasteners will be used to secure the housing portions 16 and 18 together.
- the subject invention minimizes any critical tolerance requirements for the assembly, and specifically the height tolerance for the heatsink pedestals 26 and 28 . Furthermore, the subject invention protects the flip chips from damage at assembly and during use.
- the dimensions of the joint between the channel 48 and the wall 40 can be calibrated to limit the travel of the pedestals 26 , 28 toward each other, thereby controlling the pressure exerted on the stacked components, substrate 20 , pads 32 , 36 and flip chips 12 .
- the flat 38 can limit the housing travel when it contacts the walls 44 , 46 , where the height of the wall 40 is significantly less than the depth of the channel 48 .
- the channel/wall joint provide the control feature of the present invention, as described above.
- the subject invention may be used in many applications, the subject invention may be used, for example, in powertrain gasoline or diesel engine modules (ECMs), powertrain engine and transmission control modules (PCMs), powertrain transmission control modules (TCMs), and powertrain non-automotive control modules.
- ECMs powertrain gasoline or diesel engine modules
- PCMs powertrain engine and transmission control modules
- TCMs powertrain transmission control modules
- non-automotive control modules powertrain non-automotive control modules
Abstract
A method and assembly (10) for conducting heat from a semiconductor device, such as a power flip chip (12). The assembly (10) is generally constructed to dissipate heat from the flip chip (12) when mounted to a flexible or rigid substrate (20). Heat is conducted from the flip chip (12) through upper and lower pedestals (26, 28) each of which includes a pliable pre-cured silicone adhesive pad (32, 36). The pre-cured silicon adhesive pads (32, 36) promote thermal contact while also decoupling any lateral mechanical strains that may arise as a result of different thermal expansion and movement between the flip chips (12). The housing portions (16, 18) form a housing (14) when assembled, with each housing portion (16, 18) including a configured edge (37, 41) that controls the travel of the pedestals (26, 28) toward each other, to thereby limit the pressure exerted on the flip chip (12) disposed therebetween. Silicone adhesive can be applied between the edges (37, 41) to hold the housing portions (16, 18) together.
Description
- The subject invention relates generally to an electronic assembly containing flip chip components on a laminate circuit board within the electronic assembly and, more particularly, to an apparatus and method of providing a relaxed tolerance assembly for the flip chip components and laminate circuit board with respect to heat dissipating structures of the assembly.
- A variety of methods are known for dissipating heat generated by semiconductor devices. In the case of semiconductor devices mounted on a circuit board and mounted within an enclosure, thermal management is usually achieved by dissipating heat primarily in the vertical direction, both above and beneath the semiconductor device. For example, heat-generating semiconductor chips, such as power flip chips, are often mounted to alumina substrates that conduct and dissipate heat in the vertical direction away from the chip.
- One form of assembly utilizes a housing having a plurality of heat sink devices in the form of pedestals that are adapted to be both above and below the flip chip when the housing is assembled. The flip chips are made to come into contact with the pedestals through contact pressure. Additionally, thermal grease is used between the flip chip and the pedestal. The thermal grease provides a conductive path between the heat sink and the flip chip. The thermal grease also protects the flip chip due to the contact pressure required to maintain the heat sink to the flip chip for proper thermal contact.
- This type of enclosure and/or heat dissipating method, however, requires fairly close tolerances. Particularly, these systems require fairly precise measurement and control.
- It is an object of the subject invention to provide a system, method and/or apparatus for conducting heat from a flip chip semiconductor device mounted to a substrate that requires less tolerance in providing thermal contact between the flip chip and the heat dissipating structure or heat sink.
- It is another object of the subject invention to provide a system, method and/or apparatus for conducting heat from a flip chip assembly that minimizes critical height tolerance requirements between a flip chip and a heatsink pedestal.
- It is yet another object of the subject invention to provide a system, method and/or apparatus for conducting heat from a flip chip assembly that does not require thermal grease.
- In accordance with a preferred embodiment of the subject invention, these and other objects and advantages are accomplished as follows.
- According to the subject invention, there is provided a system, method and/or apparatus or assembly for conducting heat from a flip chip semiconductor device such as a power flip chip.
- In one form, there is provided a heat-dissipating assembly for removing heat from a flip-chip semiconductor device. The assembly includes a housing having a thermally-conductive first housing portion and a second housing portion, a flexible substrate supported within the housing, the substrate having conductors thereon, a flip chip mounted to the substrate, the flip chip having a first surface and solder bumps on the first surface registered with the conductors on the substrate, the flip chip having a second surface oppositely disposed from the first surface, a first heat sink extending inwardly towards the flip chip from the first housing portion; and a first pre-cured silicone adhesive layer disposed on an end of the first heat sink and in thermal relationship with the second surface of the flip chip.
- In another aspect of the invention, the first and second housing portions are provided with a joint configured to control the pressure exerted on the flip chip through the heat sink components. In one embodiment, the flip chip is mounted between heat sink pedestals connected to the first and second housings. The joint between the housings controls the travel of the two housings toward each other when the assembly is put together. More particularly, the joint prevents excessive travel of the heat sink pedestals toward each other, which might damage the flip chip entrained between the pedestals.
- In another form, the subject invention provides a method for conducting heat from a flip chip, the method including the steps of: (a) providing a flexible substrate having conductors thereon, a flip chip having a first surface with solder bumps on the first surface and a second surface oppositely disposed from the first surface, the flip chip being mounted to the substrate such that the solder bumps are registered with the conductors on the substrate; and (b) enclosing the substrate and flip chip within a housing so that a first pre-cured silicone adhesive disposed on a first heat sink contacts the second surface of the flip chip in a first thermal transfer relationship.
- Other objects and advantages of this invention will be appreciated from the following detailed description.
- The present invention will now be described, by way of example, with reference to the accompanying drawings, in which:
-
FIG. 1 is a side sectional view of a housing that encloses a pair of flip chips mounted to a substrate with heat conductive features in accordance with the principles of the subject invention; and -
FIG. 2 is representation of one of the flip chips about to be retained between two heatsink pedestals of the housing and depicting the manner in which the two housing portions join. - Referring now to
FIG. 1 , there is shown a heat-dissipating assembly 10 for a pair ofpower flip chips 12. Theassembly 10 includes a housing orenclosure 14 that encloses theflip chips 12. Thehousing 14 includes a first housing or enclosure portion orhalf 16 and a second housing or enclosure portion orhalf 18. The first andsecond housing portions second portions housing 14. Theflip chip 12 is situated on aflexible substrate 20 such as laminate circuit board or thin substrate such as is known in the art. Suitable substrates, for example, include thin laminates, rigid inorganic substrates and printed wiring boards (PWB). - Mounting of the
flip chips 12 to thesubstrate 20 may be accomplished by conventional flip chip techniques, such as viapreformed solder bumps 22 on the front side of the flip chip 12 (i.e. the surface of theflip chips 12 on which the flip chip microcircuitry is formed). Thesolder bumps 22 are registered with and reflow soldered toconductors 23 on the surface of thesubstrate 20 to yield solder connections with thesubstrate conductors 23. Theflip chips 12 are underfilled with a suitablepolymeric material 24, as is conventionally done in the art to promote the thermal cycle life of the solder connections. - As indicated above, the
housing 14 is composed of first and second portions ormembers edge structure edge structures housing portions - A pair of heat sinks in the form of
pedestals 26 is shown projecting from an inner surface of thehousing portion 16 and into the interior of thehousing 14. Thepedestals 26 may be integrally formed with thehousing portion 16 or may be formed separately and subsequently attached to thehousing portion 16. Thus, thepedestals 26 may be die-cast with thehousing portion 16, formed as sheet metal with thehousing portion 16, or formed thereafter out of a suitable thermal transfer material. In accordance with an aspect of the subject invention, thepedestals 26 have a depression orconcavity 30 formed in the end thereof. Theconcavity 30 is preferably dimensioned so that theflip chip 12 can be at least partially received within the cavity, as depicted inFIG. 1 . Thus, the perimeter of the concavity is similarly configured to the perimeter of the flip chip, although larger in lateral dimension so the flip chip can sit at least partially within the cavity when the heat sink assembly is fully seated together. - A
silicone adhesive 32 is disposed in theconcavity 30 and is thereafter cured. This forms a pre-cured silicone adhesive pad orlayer 32 on thepedestal 26. Theconcavity 30 is sized to accommodate theflip chip 12. Particularly, theconcavity 30 is preferably sized to be larger than the size of theflip chip 12 such that the curedsilicone adhesive 32 is also preferably larger than the size of theflip chip 12. This allows thesilicone pad 32 to receive theflip chip 12 when thehousing portions - A further pair of heat sinks in the form of
pedestals 28 extend or project from thehousing portion 18 toward the interior thereof. Thepedestals 28 may be integrally formed with thehousing portion 16 or may be formed separately and subsequently attached to thehousing portion 16. Thus, thepedestals 28 may be die-cast with thehousing portion 16, formed as sheet metal with thehousing portion 16, or formed thereafter out of a suitable thermal transfer material. Thepedestals 28 define an upper orend surface 34 on which is disposed a silicone adhesive layer orpad 36. The siliconeadhesive layer 36 is preferably pre-cured before assembly of thehousing portions -
FIG. 1 showsassembly 10 in an assembled state with thehousing portions substrate 20, and thus theflip chips 12, are retained by thepedestals adhesive pad 36 of thepedestal 28 is caused to contact and provide a slight pressure against thesubstrate 20. The siliconeadhesive pad 36 is thus slightly compressed against thesubstrate 20 to provide thermal conductivity between thesubstrate 20 and thepedestal 28. Moreover, the siliconeadhesive pad 32 of thepedestal 26 is caused to contact and provide a slight pressure against theflip chip 12. Thesilicone adhesive pad 32 is thus slightly compressed against theflip chip 12. In both instances, the pre-cured siliconeadhesive pads housing 14 with little to no damage. - It should be appreciated that while only two
flip chips 12 and pedestal pairs 26 and 28 (i.e. anupper pedestal 26 andlower pedestal 28 for each flip chip 12) are shown within thehousing 14, thehousing 14 may have any number of pedestal pairs and thus flip chips. Moreover, it should be appreciated that the height of thepedestals flip chips 12 andsubstrate 20 are slightly compressed against and into the respective siliconeadhesive pads housing portions - Referring now to
FIG. 2 , there is illustrated the assembly of thehousing portions flip chips 12 have previously been assembled onto thesubstrate 20. The twohousing portions pedestals adhesive pads flip chips 12 andsubstrate 20 as indicated above. Moreover, theedge portions housing portions - Particularly, the
edge portion 37, which extends about the outer periphery of thehousing portion 16, includes a horizontal shelf or flat 38. A flange orwall 40 extends from the flat 38 in a perpendicular direction. InFIG. 2 , the perpendicular direction is oriented as downward. Theedge portion 41, which also extends about the outer periphery of thehousing portion 18, includes a horizontal shelf or flat 42. Dual flanges orwalls FIG. 2 , the perpendicular direction is oriented as upward. Thedual walls channel 48 is dimensioned to receive thewall 40 that is dimensioned slightly smaller than thechannel 48. Thechannel 48 andwall 40 can thus form a “tongue and groove” type joint. A silicone adhesive is applied in thechannel 48 before joining of thehousing portions - The
channel 48 and thewall 40 are also dimensioned so that thewall 40 bottoms out in thechannel 48 when thesilicone pads flip chips 12 and thesubstrate 20 respectively. Thechannel 48 andwall 40 provide the maximum travel of thehousing portions 16 and 18 (and thus the pressure of thepads flip chips 12 and the substrate 20) allowed in order not to crush theflip chips 12 into the adhesive pads or beyond. Additionally, a silicone adhesive is provided in thechannel 48 that will bond with thewall 40. In this manner, an adhesive joint is provided in addition to the tongue and groove joint. Thus, it is contemplated that no fasteners will be used to secure thehousing portions - It should be appreciated that the subject invention minimizes any critical tolerance requirements for the assembly, and specifically the height tolerance for the heatsink pedestals 26 and 28. Furthermore, the subject invention protects the flip chips from damage at assembly and during use. Thus, the dimensions of the joint between the
channel 48 and thewall 40 can be calibrated to limit the travel of thepedestals substrate 20,pads flip chips 12. Alternatively, the flat 38 can limit the housing travel when it contacts thewalls wall 40 is significantly less than the depth of thechannel 48. However, it is preferred that the channel/wall joint provide the control feature of the present invention, as described above. - While the subject invention may be used in many applications, the subject invention may be used, for example, in powertrain gasoline or diesel engine modules (ECMs), powertrain engine and transmission control modules (PCMs), powertrain transmission control modules (TCMs), and powertrain non-automotive control modules.
- While this invention has been described in terms of a preferred embodiment, it is apparent that other forms could be adopted by one skilled in the art. For example, various components of the
assembly 10 could be configured differently from that shown in the figures. Moreover, appropriate materials could be substituted for those noted. Accordingly, the scope of the invention is to be limited only by the claims.
Claims (6)
1. A method for conducting heat from a flip chip comprising the steps of:
providing a flexible substrate having conductors thereon, a flip chip having a first surface with solder bumps on the first surface and a second surface oppositely disposed from the first surface, the flip chip being mounted to the substrate such that the solder bumps are registered with the conductors on the substrate;
applying a first pre-cured silicone adhesive pad to a first heat sink, the first heat sink having a concavity in an end thereof dimensioned so that the flip chip can be at least partially received within the concavity; and
arranging the flip chip and the first heat sink so that the first pre-cured silicone adhesive pad disposed on the first heat sink contacts the second surface of the flip chip in a first thermal transfer relationship.
2. The method of claim 1 , wherein the step of arranging the flip chip and the first heat sink comprises enclosing the substrate and the flip chip within a housing and further wherein the first heat sink is formed as a first pedestal projecting from an inner surface of the housing.
3. The method of claim 1 , wherein the arranging step includes enclosing the substrate and flip chip within a housing so that a first pre-cured silicone adhesive pad disposed on a first heat sink contacts the second surface of the flip chip in a first thermal transfer relationship, and a second pre-cured silicone adhesive pad disposed on a second heat sink contacts the substrate opposite the first surface of the flip chip in a second thermal transfer relationship.
4. The method of claim 3 , wherein the second heat sink is formed as a second pedestal projecting from an inner surface of the housing opposite the first pedestal.
5. The method of claim 2 , further comprising the step of:
sealing a first edge structure of a first housing portion of the housing to a second edge structure of a second housing portion of the housing using a silicone adhesive.
6. The method of claim 5 , wherein the sealing step includes sealing the first edge structure having a flange to the second edge structure having a groove through insertion of the flange into the groove.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/016,824 US20050098900A1 (en) | 2003-06-13 | 2004-11-24 | Relaxed tolerance flip chip assembly |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/461,577 US6821816B1 (en) | 2003-06-13 | 2003-06-13 | Relaxed tolerance flip chip assembly |
US11/016,824 US20050098900A1 (en) | 2003-06-13 | 2004-11-24 | Relaxed tolerance flip chip assembly |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US10/461,577 Continuation US6821816B1 (en) | 2003-06-13 | 2003-06-13 | Relaxed tolerance flip chip assembly |
Publications (1)
Publication Number | Publication Date |
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US20050098900A1 true US20050098900A1 (en) | 2005-05-12 |
Family
ID=33434925
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
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US10/461,577 Expired - Lifetime US6821816B1 (en) | 2003-06-13 | 2003-06-13 | Relaxed tolerance flip chip assembly |
US10/955,706 Expired - Lifetime US6998706B2 (en) | 2003-06-13 | 2004-09-30 | Relaxed tolerance flip chip assembly |
US11/016,824 Abandoned US20050098900A1 (en) | 2003-06-13 | 2004-11-24 | Relaxed tolerance flip chip assembly |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
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US10/461,577 Expired - Lifetime US6821816B1 (en) | 2003-06-13 | 2003-06-13 | Relaxed tolerance flip chip assembly |
US10/955,706 Expired - Lifetime US6998706B2 (en) | 2003-06-13 | 2004-09-30 | Relaxed tolerance flip chip assembly |
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US (3) | US6821816B1 (en) |
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Citations (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5409865A (en) * | 1993-09-03 | 1995-04-25 | Advanced Semiconductor Assembly Technology | Process for assembling a TAB grid array package for an integrated circuit |
US5770477A (en) * | 1997-02-10 | 1998-06-23 | Delco Electronics Corporation | Flip chip-on-flip chip multi-chip module |
US5773884A (en) * | 1996-06-27 | 1998-06-30 | International Business Machines Corporation | Electronic package with thermally conductive support member having a thin circuitized substrate and semiconductor device bonded thereto |
US5953814A (en) * | 1998-02-27 | 1999-09-21 | Delco Electronics Corp. | Process for producing flip chip circuit board assembly exhibiting enhanced reliability |
US5990550A (en) * | 1997-03-28 | 1999-11-23 | Nec Corporation | Integrated circuit device cooling structure |
US6225695B1 (en) * | 1997-06-05 | 2001-05-01 | Lsi Logic Corporation | Grooved semiconductor die for flip-chip heat sink attachment |
US6262489B1 (en) * | 1999-11-08 | 2001-07-17 | Delphi Technologies, Inc. | Flip chip with backside electrical contact and assembly and method therefor |
US6271058B1 (en) * | 1998-01-06 | 2001-08-07 | Nec Corporation | Method of manufacturing semiconductor device in which semiconductor chip is mounted facedown on board |
US6365954B1 (en) * | 1998-09-18 | 2002-04-02 | Cirrus Logic, Inc. | Metal-polycrystalline silicon-n-well multiple layered capacitor |
US6365964B1 (en) * | 1998-05-04 | 2002-04-02 | Delphi Technologies, Inc. | Heat-dissipating assembly for removing heat from a flip chip semiconductor device |
US6570247B1 (en) * | 1997-12-30 | 2003-05-27 | Intel Corporation | Integrated circuit device having an embedded heat slug |
US6723584B2 (en) * | 1994-09-20 | 2004-04-20 | Tessera, Inc. | Methods of making microelectronic assemblies including compliant interfaces |
US6751099B2 (en) * | 2001-12-20 | 2004-06-15 | Intel Corporation | Coated heat spreaders |
US6821816B1 (en) * | 2003-06-13 | 2004-11-23 | Delphi Technologies, Inc. | Relaxed tolerance flip chip assembly |
US6853068B1 (en) * | 2002-05-22 | 2005-02-08 | Volterra Semiconductor Corporation | Heatsinking and packaging of integrated circuit chips |
US6864120B2 (en) * | 2000-01-24 | 2005-03-08 | Shinko Electric Industries Co., Ltd. | Semiconductor device having a carbon fiber reinforced resin as a heat radiation plate having a concave portion |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0948307A (en) * | 1995-08-11 | 1997-02-18 | Denso Corp | Manufacture of air bag |
US20030047388A1 (en) * | 2001-08-30 | 2003-03-13 | Faitel William M. | Scissors lifter drive apparatus |
JP3825005B2 (en) * | 2003-02-06 | 2006-09-20 | 松下電器産業株式会社 | Disk unit |
-
2003
- 2003-06-13 US US10/461,577 patent/US6821816B1/en not_active Expired - Lifetime
-
2004
- 2004-09-30 US US10/955,706 patent/US6998706B2/en not_active Expired - Lifetime
- 2004-11-24 US US11/016,824 patent/US20050098900A1/en not_active Abandoned
Patent Citations (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5409865A (en) * | 1993-09-03 | 1995-04-25 | Advanced Semiconductor Assembly Technology | Process for assembling a TAB grid array package for an integrated circuit |
US6723584B2 (en) * | 1994-09-20 | 2004-04-20 | Tessera, Inc. | Methods of making microelectronic assemblies including compliant interfaces |
US5773884A (en) * | 1996-06-27 | 1998-06-30 | International Business Machines Corporation | Electronic package with thermally conductive support member having a thin circuitized substrate and semiconductor device bonded thereto |
US5770477A (en) * | 1997-02-10 | 1998-06-23 | Delco Electronics Corporation | Flip chip-on-flip chip multi-chip module |
US5914535A (en) * | 1997-02-10 | 1999-06-22 | Delco Electronics Corporation | Flip chip-on-flip chip multi-chip module |
US5990550A (en) * | 1997-03-28 | 1999-11-23 | Nec Corporation | Integrated circuit device cooling structure |
US6225695B1 (en) * | 1997-06-05 | 2001-05-01 | Lsi Logic Corporation | Grooved semiconductor die for flip-chip heat sink attachment |
US6570247B1 (en) * | 1997-12-30 | 2003-05-27 | Intel Corporation | Integrated circuit device having an embedded heat slug |
US6271058B1 (en) * | 1998-01-06 | 2001-08-07 | Nec Corporation | Method of manufacturing semiconductor device in which semiconductor chip is mounted facedown on board |
US5953814A (en) * | 1998-02-27 | 1999-09-21 | Delco Electronics Corp. | Process for producing flip chip circuit board assembly exhibiting enhanced reliability |
US6365964B1 (en) * | 1998-05-04 | 2002-04-02 | Delphi Technologies, Inc. | Heat-dissipating assembly for removing heat from a flip chip semiconductor device |
US6365954B1 (en) * | 1998-09-18 | 2002-04-02 | Cirrus Logic, Inc. | Metal-polycrystalline silicon-n-well multiple layered capacitor |
US6262489B1 (en) * | 1999-11-08 | 2001-07-17 | Delphi Technologies, Inc. | Flip chip with backside electrical contact and assembly and method therefor |
US6864120B2 (en) * | 2000-01-24 | 2005-03-08 | Shinko Electric Industries Co., Ltd. | Semiconductor device having a carbon fiber reinforced resin as a heat radiation plate having a concave portion |
US6751099B2 (en) * | 2001-12-20 | 2004-06-15 | Intel Corporation | Coated heat spreaders |
US6853068B1 (en) * | 2002-05-22 | 2005-02-08 | Volterra Semiconductor Corporation | Heatsinking and packaging of integrated circuit chips |
US6821816B1 (en) * | 2003-06-13 | 2004-11-23 | Delphi Technologies, Inc. | Relaxed tolerance flip chip assembly |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180349571A1 (en) * | 2006-12-22 | 2018-12-06 | Excalibur Ip, Llc | Method and system for unauthorized content detection and reporting |
US20180375307A1 (en) * | 2015-12-16 | 2018-12-27 | Autonetworks Technologies, Ltd. | Electrical junction box |
Also Published As
Publication number | Publication date |
---|---|
US6998706B2 (en) | 2006-02-14 |
US20050040521A1 (en) | 2005-02-24 |
US6821816B1 (en) | 2004-11-23 |
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