US20050023951A1 - Electron emitters with dopant gradient - Google Patents
Electron emitters with dopant gradient Download PDFInfo
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- US20050023951A1 US20050023951A1 US10/928,566 US92856604A US2005023951A1 US 20050023951 A1 US20050023951 A1 US 20050023951A1 US 92856604 A US92856604 A US 92856604A US 2005023951 A1 US2005023951 A1 US 2005023951A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
- H01J1/02—Main electrodes
- H01J1/30—Cold cathodes, e.g. field-emissive cathode
- H01J1/304—Field-emissive cathodes
- H01J1/3042—Field-emissive cathodes microengineered, e.g. Spindt-type
- H01J1/3044—Point emitters
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
- H01J1/02—Main electrodes
- H01J1/30—Cold cathodes, e.g. field-emissive cathode
- H01J1/304—Field-emissive cathodes
- H01J1/3042—Field-emissive cathodes microengineered, e.g. Spindt-type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
- H01J9/02—Manufacture of electrodes or electrode systems
- H01J9/022—Manufacture of electrodes or electrode systems of cold cathodes
- H01J9/025—Manufacture of electrodes or electrode systems of cold cathodes of field emission cathodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2201/00—Electrodes common to discharge tubes
- H01J2201/30—Cold cathodes
- H01J2201/304—Field emission cathodes
- H01J2201/30403—Field emission cathodes characterised by the emitter shape
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/116—Oxidation, differential
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/172—Vidicons
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers
Definitions
- This invention relates to field emitter technology and, more particularly, to electron emitters and a method for forming them.
- Cathode ray tube (CRT) displays such as those commonly used in desktop computer screens, function as a result of a scanning electron beam from an electron gun impinging on phosphors on a relatively distant screen.
- the electrons increase the energy level of the phosphors.
- the phosphors release energy imparted to them from the bombarding electrons, thereby emitting photons, which photons are transmitted through the glass screen of the display to the viewer.
- U.S. Pat. No. 3,875,442 entitled “Display Panel,” Wasa et. al. disclose a display panel comprising a transparent gas-tight envelope, two main planar electrodes, which are arranged within the gas-tight envelope parallel with each other, and a cathode luminescent panel.
- One of the two main electrodes is a cold cathode, and the other is a low potential anode, gate, or grid.
- the cathode luminescent panel may consist of a transparent glass plate, a transparent electrode formed on the transparent glass plate, and a phosphor layer coated on the transparent electrode.
- the phosphor layer is made of, for example, zinc oxide which can be excited with low-energy electrons.
- a potential source is provided with its positive terminal connected to the gate, or grid, and its negative terminal connected to the emitter electrode (cathode conductor substrate).
- the potential source may be made variable for the purpose of controlling the electron emission current.
- the performance of a field emission display is a function of a number of factors, including emitter tip or edge sharpness.
- a dopant material that effects the oxidation rate or the etch rate of silicon is diffused into a silicon substrate or film.
- “Stalks” or “pillars” are then etched, and the dopant differential is used to produce a sharpened tip.
- “fins” or “hedges” may be etched, and the dopant differential used to produce a sharpened edge.
- One of the advantages of the present invention is the manufacturing control, and available process window for fabricating emitters, particularly if a high-aspect ratio is desired. Another advantage of the present invention is its scalability to large areas.
- FIG. 1 is a schematic cross-section of a field emission device in which the emitter tips or edges formed from the process of the present invention can be used;
- FIG. 2 is a schematic cross-section of the doped substrate of the present invention superjacent to which is a mask; in this embodiment the mask comprises several layers;
- FIG. 3 is a schematic cross-section of the substrate of FIG. 2 , after the substrate has been patterned and etched according to the process of the present invention
- FIG. 4 is a schematic cross-section of the substrate of FIG. 3 , after the tips or edges have been formed according to the process of the present invention.
- FIG. 5 is a schematic cross-section of the tips or edges of FIG. 4 , after the nitride and oxide layers of the mask have been removed.
- a field emission display employing a pixel 22 is depicted.
- the cold cathode emitter tip 13 of the present invention is depicted as part of the pixel 22 .
- the emitter 13 is in the shape of an elongated wedge, the apex of such a wedge being referred to as a “knife edge” or “blade.”
- the schematic cross-sections for the alternative embodiment are substantially similar to those of the preferred embodiment in which the emitters 13 are tips. From a top view (not shown), the elongated portion of the wedge would be more apparent.
- FIG. 1 is merely illustrative of the many applications for which the emitter 13 of the present invention can be used.
- the present invention is described herein with respect to field emitter displays, but one having ordinary skill in the art will realize that it is equally applicable to any other device or structure employing a micro-machined point, edge, or blade, such as, but not limited, to a stylus, probe tip, fastener, or fine needle.
- the substrate 11 can be comprised of glass, for example, or any of a variety of other suitable materials, onto which a conductive or semiconductive material layer, such as doped poly crystalline silicon can be deposited.
- a conductive or semiconductive material layer such as doped poly crystalline silicon
- single crystal silicon serves as a substrate 11 , from which the emitters 13 are directly formed.
- Other substrates may also be used including, but not limited to macrograin polysilicon and monocrystalline silicon, the selection of which may depend on cost and availability.
- the micro-machined emitter 13 should be coated with a conductive or semiconductive material prior to doping.
- a micro-cathode 13 (also referred to herein as an emitter) has been constructed in the substrate 11 .
- the micro-cathode 13 is a protuberance that may have a variety of shapes, such as pyramidal, conical, wedge, or other geometry, which has a fine micro-point, edge, or blade for the emission of electrons.
- the micro-tip 13 has an apex and a base.
- the aspect ratio (i.e., height-to-base width ratio) of the emitters 13 is preferably greater than 1:1. Hence, the preferred emitters 13 have a tall, narrow appearance.
- the emitter 13 of the present invention has an impurity concentration gradient, indicated by the shaded area 13 A), in which the concentration is higher at the apex and decreases towards the base.
- an extraction grid or gate structure 15 Surrounding the micro-cathode 13 is an extraction grid or gate structure 15 .
- a voltage differential through source 20
- an electron stream 17 is emitted toward a phosphor-coated screen 16 .
- the screen 16 functions as the anode.
- the electron stream 17 tends to be divergent, becoming wider at greater distances from the tip of cathode 13 .
- the electron emitter 13 is integral with the semiconductor substrate 11 and serves as a cathode conductor.
- Gate 15 serves as a grid structure for its respective cathode 13 .
- a dielectric insulating layer 14 is deposited on the substrate 11 .
- a conductive cathode layer (not shown) may also be disposed between the insulating layer 14 and the substrate 11 , depending upon the material selected for the substrate 11 .
- the insulating layer 14 also has an opening at the field emission site location.
- FIG. 2 shows the substrate or film 11 which is used to fabricate a field emitter 13 .
- the substrate 11 is preferably single crystal silicon.
- An impurity material 13 A is introduced into the substrate or film 11 in such a manner so as to create a concentration gradient from the top of the substrate 11 surface, which decreases with depth down into the film or substrate 11 .
- the impurity 13 A is from the group including, but not limited to, boron, phosphorus, and arsenic.
- the substrate 11 can be doped using a variety of available methods.
- the impurity material 13 A can be obtained from a solid source diffusion disc or gas or vapor feed source, such as POC1, or from spin-on dopant with subsequent heat treatment or implantation or CVD film deposition with increasing dopant component in the feed stream, throughout the time of deposition, either intermittently or continuously.
- an impurity that decreases throughout the deposition and serves as a component for retarding the consumptive process subsequently employed in the process of the present invention.
- An example is the combination of a silicon film or substrate 11 , doped with a boron impurity 13 a , and etched with an ethylene diamine pyrocatechol (EDP) etchant, where the EDP is employed after anisotropically etching pillars or fins from substrate 11 .
- EDP ethylene diamine pyrocatechol
- the substrate 11 is silicon.
- the film or substrate 11 is then patterned, preferably with a resist/silicon nitride/silicon oxide sandwich etch mask 24 and dry etched.
- Other types of materials can be used to form the mask 24 , as long as they provide the necessary selectivity to the substrate 11 .
- the silicon nitride/silicon oxide sandwich has been selected due to its tendency to assist in controlling the lateral consumption of silicon during thermal oxidation, which is well known in semiconductor LOCOS processing.
- the structure of FIG. 2 is then etched, preferably using a reactive ion, crystallographic etch, or other etch method well known in the art.
- the etch is substantially anisotropic, i.e., having undercutting that is reduced and controlled, thereby forming “pillars” 50 extending from a surface etched from the substrate 11 .
- These “pillars” 50 are depicted in FIG. 3 and will be the sites of the emitter tips 13 of the present invention.
- FIG. 4 illustrates the substrate 11 having emitter tips 13 formed therein.
- the resist portion 24 A ( FIG. 2 ) of the mask 24 has been removed.
- An oxidation is then performed, wherein an oxide layer 25 is disposed about the tip 13 and subsequently removed.
- an etch is performed, the rate of which is dependent upon (i.e., a function of) the concentration of the contaminants (impurities exposed to a consumptive process, whereby the rate or degree of consumption is a function of the impurity concentration, such as the thermal oxidation of silicon which has been doped with phosphorus 13 A).
- the etch, or oxidation proceeds at a faster rate in areas having higher concentration of impurities.
- the emitters 13 are etched faster at the apex, where there is an increased concentration of impurities 13 A, and slower at the base, where there is a decrease in the concentration of impurities 13 A.
- the etch is preferably nondirectional in nature, removing material of a selected purity level in both horizontal and vertical directions, thereby creating an undercut.
- the amount of undercut is related to the impurity concentration 13 A.
- FIG. 5 shows the emitters 13 following the removal of the nitride 24 B and oxide 24 C layers (shown in FIG. 2 ); preferably by a selective wet stripping process.
- An example of such a stripping process involves a 1:100 solution of hydrofluoric acid (HF)/water at 20° C., followed by a water rinse. Next is a boiling phosphoric acid (H 3 PO 4 )/water solution at 140° C., followed by a water rinse and a 1:4 hydrofluoric acid (HF)/water solution at 20° C.
- HF hydrofluoric acid
Abstract
Electron emitters and a method of fabricating emitters which have a concentration gradient of impurities, such that the highest concentration of impurities is at the apex of the emitters and decreases toward the base of the emitters. The method comprises the steps of doping, patterning, etching, and oxidizing the substrate, thereby forming the emitters having impurity gradients.
Description
- This application is a continuation of application Ser. No. 08/609,354, filed Mar. 1, 1996, pending, which is a divisional of application Ser. No. 08/089,166, filed Jul. 7, 1993, which is now U.S. Pat. No. 5,532,177, issued Jul. 2, 1996. There is a copending continuation application having Ser. No. 08/555,908, which was filed on Nov. 13, 1995. That copending application is a continuation of application Ser. No. 08/089,166, which was filed on Jul. 7, 1993 and issued as U.S. Pat. No. 5,532,177 on Jul. 2, 1996.
- This invention relates to field emitter technology and, more particularly, to electron emitters and a method for forming them.
- Cathode ray tube (CRT) displays, such as those commonly used in desktop computer screens, function as a result of a scanning electron beam from an electron gun impinging on phosphors on a relatively distant screen. The electrons increase the energy level of the phosphors. The phosphors release energy imparted to them from the bombarding electrons, thereby emitting photons, which photons are transmitted through the glass screen of the display to the viewer.
- Flat panel displays have become increasingly important in appliances requiring lightweight portable screens. Currently, such screens use electroluminescent, liquid crystal, or plasma technology. A promising technology is the use of a matrix-addressable array of cold cathode emission devices to excite phosphor on a screen.
- In U.S. Pat. No. 3,875,442, entitled “Display Panel,” Wasa et. al. disclose a display panel comprising a transparent gas-tight envelope, two main planar electrodes, which are arranged within the gas-tight envelope parallel with each other, and a cathode luminescent panel. One of the two main electrodes is a cold cathode, and the other is a low potential anode, gate, or grid. The cathode luminescent panel may consist of a transparent glass plate, a transparent electrode formed on the transparent glass plate, and a phosphor layer coated on the transparent electrode. The phosphor layer is made of, for example, zinc oxide which can be excited with low-energy electrons.
- Spindt, et. al. discuss field emission cathode structures in U.S. Pat. Nos. 3,665,241, 3,755,704, 3,812,559, and 4,874,981. To produce the desired field emission, a potential source is provided with its positive terminal connected to the gate, or grid, and its negative terminal connected to the emitter electrode (cathode conductor substrate). The potential source may be made variable for the purpose of controlling the electron emission current. Upon application of a potential between the electrodes, an electric field is established between the emitter tips and the grid, thus causing electrons to be emitted from the cathode tips through the holes in the grid electrode.
- An array of points in registry with holes in grids is adaptable to the production of gate emission sources subdivided into areas containing one or more tips from which areas of emission can be drawn separately by the application of the appropriate potentials thereto.
- There are several methods by which to form the electron emission tips. Examples of such methods are presented in U.S. Pat. No. 3,970,887 entitled, “Micro-structure Field Emission Electron Source.”
- The performance of a field emission display is a function of a number of factors, including emitter tip or edge sharpness.
- In the process of the present invention, a dopant material that effects the oxidation rate or the etch rate of silicon is diffused into a silicon substrate or film. “Stalks” or “pillars” are then etched, and the dopant differential is used to produce a sharpened tip. Alternatively, “fins” or “hedges” may be etched, and the dopant differential used to produce a sharpened edge.
- One of the advantages of the present invention is the manufacturing control, and available process window for fabricating emitters, particularly if a high-aspect ratio is desired. Another advantage of the present invention is its scalability to large areas.
- The present invention will be better understood from reading the following description of nonlimitative embodiments, with reference to the attached drawings, wherein:
-
FIG. 1 is a schematic cross-section of a field emission device in which the emitter tips or edges formed from the process of the present invention can be used; -
FIG. 2 is a schematic cross-section of the doped substrate of the present invention superjacent to which is a mask; in this embodiment the mask comprises several layers; -
FIG. 3 is a schematic cross-section of the substrate ofFIG. 2 , after the substrate has been patterned and etched according to the process of the present invention; -
FIG. 4 is a schematic cross-section of the substrate ofFIG. 3 , after the tips or edges have been formed according to the process of the present invention; and -
FIG. 5 is a schematic cross-section of the tips or edges ofFIG. 4 , after the nitride and oxide layers of the mask have been removed. - Referring to
FIG. 1 , a field emission display employing apixel 22 is depicted. In this embodiment the coldcathode emitter tip 13 of the present invention is depicted as part of thepixel 22. In an alternative embodiment, theemitter 13 is in the shape of an elongated wedge, the apex of such a wedge being referred to as a “knife edge” or “blade.” - The schematic cross-sections for the alternative embodiment are substantially similar to those of the preferred embodiment in which the
emitters 13 are tips. From a top view (not shown), the elongated portion of the wedge would be more apparent. -
FIG. 1 is merely illustrative of the many applications for which theemitter 13 of the present invention can be used. The present invention is described herein with respect to field emitter displays, but one having ordinary skill in the art will realize that it is equally applicable to any other device or structure employing a micro-machined point, edge, or blade, such as, but not limited, to a stylus, probe tip, fastener, or fine needle. - The substrate 11 can be comprised of glass, for example, or any of a variety of other suitable materials, onto which a conductive or semiconductive material layer, such as doped poly crystalline silicon can be deposited. In the preferred embodiment, single crystal silicon serves as a substrate 11, from which the
emitters 13 are directly formed. Other substrates may also be used including, but not limited to macrograin polysilicon and monocrystalline silicon, the selection of which may depend on cost and availability. - If an insulative film or substrate is used with the process of the present invention, in lieu of the conductive or semiconductive film or substrate 11, the
micro-machined emitter 13 should be coated with a conductive or semiconductive material prior to doping. - At a field emission site, a micro-cathode 13 (also referred to herein as an emitter) has been constructed in the substrate 11. The micro-cathode 13 is a protuberance that may have a variety of shapes, such as pyramidal, conical, wedge, or other geometry, which has a fine micro-point, edge, or blade for the emission of electrons. The
micro-tip 13 has an apex and a base. The aspect ratio (i.e., height-to-base width ratio) of theemitters 13 is preferably greater than 1:1. Hence, thepreferred emitters 13 have a tall, narrow appearance. - The
emitter 13 of the present invention has an impurity concentration gradient, indicated by the shadedarea 13A), in which the concentration is higher at the apex and decreases towards the base. - Surrounding the micro-cathode 13 is an extraction grid or
gate structure 15. When a voltage differential, throughsource 20, is applied between thecathode 13 and thegate 15, an electron stream 17 is emitted toward a phosphor-coatedscreen 16. Thescreen 16 functions as the anode. The electron stream 17 tends to be divergent, becoming wider at greater distances from the tip ofcathode 13. - The
electron emitter 13 is integral with the semiconductor substrate 11 and serves as a cathode conductor.Gate 15 serves as a grid structure for itsrespective cathode 13. A dielectric insulating layer 14 is deposited on the substrate 11. However, a conductive cathode layer (not shown) may also be disposed between the insulating layer 14 and the substrate 11, depending upon the material selected for the substrate 11. The insulating layer 14 also has an opening at the field emission site location. - The process of the present invention, by which the
emitter 13 having the impurity concentration gradient is fabricated, is described below. Accordingly, the figures relevant to this description could be characterized as illustrating an “in-process” device, which is a device that is in the process of being made. -
FIG. 2 shows the substrate or film 11 which is used to fabricate afield emitter 13. The substrate 11 is preferably single crystal silicon. Animpurity material 13A is introduced into the substrate or film 11 in such a manner so as to create a concentration gradient from the top of the substrate 11 surface, which decreases with depth down into the film or substrate 11. Preferably, theimpurity 13A is from the group including, but not limited to, boron, phosphorus, and arsenic. - The substrate 11 can be doped using a variety of available methods. The
impurity material 13A can be obtained from a solid source diffusion disc or gas or vapor feed source, such as POC1, or from spin-on dopant with subsequent heat treatment or implantation or CVD film deposition with increasing dopant component in the feed stream, throughout the time of deposition, either intermittently or continuously. - In the case of a CVD or epitaxially grown film, it is possible to introduce an impurity that decreases throughout the deposition and serves as a component for retarding the consumptive process subsequently employed in the process of the present invention. An example is the combination of a silicon film or substrate 11, doped with a boron impurity 13 a, and etched with an ethylene diamine pyrocatechol (EDP) etchant, where the EDP is employed after anisotropically etching pillars or fins from substrate 11.
- In the preferred embodiment, the substrate 11 is silicon. After doping, the film or substrate 11 is then patterned, preferably with a resist/silicon nitride/silicon oxide
sandwich etch mask 24 and dry etched. Other types of materials can be used to form themask 24, as long as they provide the necessary selectivity to the substrate 11. The silicon nitride/silicon oxide sandwich has been selected due to its tendency to assist in controlling the lateral consumption of silicon during thermal oxidation, which is well known in semiconductor LOCOS processing. - The structure of
FIG. 2 is then etched, preferably using a reactive ion, crystallographic etch, or other etch method well known in the art. Preferably, the etch is substantially anisotropic, i.e., having undercutting that is reduced and controlled, thereby forming “pillars” 50 extending from a surface etched from the substrate 11. These “pillars” 50, are depicted inFIG. 3 and will be the sites of theemitter tips 13 of the present invention. -
FIG. 4 illustrates the substrate 11 havingemitter tips 13 formed therein. The resistportion 24A (FIG. 2 ) of themask 24 has been removed. An oxidation is then performed, wherein anoxide layer 25 is disposed about thetip 13 and subsequently removed. - Alternatively, an etch is performed, the rate of which is dependent upon (i.e., a function of) the concentration of the contaminants (impurities exposed to a consumptive process, whereby the rate or degree of consumption is a function of the impurity concentration, such as the thermal oxidation of silicon which has been doped with
phosphorus 13A). - The etch, or oxidation, proceeds at a faster rate in areas having higher concentration of impurities. Hence, the
emitters 13 are etched faster at the apex, where there is an increased concentration ofimpurities 13A, and slower at the base, where there is a decrease in the concentration ofimpurities 13A. - The etch is preferably nondirectional in nature, removing material of a selected purity level in both horizontal and vertical directions, thereby creating an undercut. The amount of undercut is related to the
impurity concentration 13A. -
FIG. 5 shows theemitters 13 following the removal of thenitride 24B andoxide 24C layers (shown inFIG. 2 ); preferably by a selective wet stripping process. An example of such a stripping process involves a 1:100 solution of hydrofluoric acid (HF)/water at 20° C., followed by a water rinse. Next is a boiling phosphoric acid (H3PO4)/water solution at 140° C., followed by a water rinse and a 1:4 hydrofluoric acid (HF)/water solution at 20° C. Theemitters 13 of the present invention are thereby exposed. It should be noted that, in the embodiment depicted inFIG. 5 , the impurity concentration 13 a at the base of theemitters 13 is generally zero. - All of the U.S. patents cited herein are hereby incorporated by reference herein as if set forth in their entirety.
- While the particular process as herein shown and disclosed in detail is fully capable of obtaining the objects and advantages herein before stated, it is to be understood that it is merely illustrative of the presently preferred embodiments of the invention and that no limitations are intended to the details of construction or design herein shown other than as described in the appended claims. For example, one having ordinary skill in the art will realize that the emitters can be used in a number of different devices, including but not limited to field emission devices, cold cathode electron emission devices, and micro-tip cold cathode vacuum triodes.
Claims (36)
1. A flat panel display having at least one emitter comprising:
a substrate formed of a substantially uniform material;
at least one tapered protuberance integrally formed from the material of the substrate, said protuberance having an apex and a base;
a first dopant dispersed through said protuberance in a dopant concentration having a gradient, said dopant concentration greater at said apex, decreasing toward said base, and zero at said base; and
a second dopant dispersed through said protuberance in a dopant concentration having a gradient, said dopant concentration greater at said apex, decreasing toward said base, and zero at said base, said second dopant being different than said first dopant.
2. A flat panel display having at least one pixel, comprising:
a single-layered substrate further comprising:
a generally planar surface having an upper surface comprising semiconductive material having an impurity concentration the greatest at the upper surface of the generally planar surface;
at least one protuberance formed from said generally planar surface; and
an impurity offset from said generally planar surface and within said protuberance, said impurity within said protuberance has a concentration decreasing concurrently with a distance from the upper surface of said generally planar surface.
3. The flat panel display of claim 2 , wherein said impurity is located within said protuberance to the exclusion of said substrate.
4. A flat panel field emission display, comprising:
a remaining portion of a single-layered substrate, the remaining portion being an uncontaminated single-layered substrate that is at least semiconductive formed from a single-layered substrate having an upper surface, the single-layered substrate having an impurity concentration greatest at the upper surface while decreasing with a distance from the upper surface; and
a micro-cathode on said substrate formed from the portion of the single-layered substrate having an impurity concentration greatest at the upper surface thereof, further comprising:
a contaminated apex having an impurity concentration substantially the same as portion of the single-layered substrate at the upper surface thereof; and
a decreasingly contaminated body, the concentrate of the impurity decreasing from the contaminated apex.
5. The flat panel field emission display of claim 4 , wherein said micro-cathode is integral with said substrate.
6. A flat display panel, comprising:
a generally uncontaminated substrate comprising semiconductive material formed from a single-layered substrate having an upper surface, the single-layered substrate having an impurity concentration greatest at the upper surface while decreasing with a distance from the upper surface; and
an emitter electrode on said substrate, further comprising an apex having an impurity concentration substantially the same as portion of the single-layered substrate at the upper surface thereof, and further having an etch-resistible quality that increases with depth from said apex.
7. The flat display panel in claim 6 , wherein said emitter electrode further comprises a base and further has an oxidizable quality that increases with elevation from said base.
8. The flat display panel in claim 7 , wherein a portion of said substrate that is under said emitter electrode has an etch-resistible quality generally similar to an etch-resistible quality of said base.
9. The flat display panel in claim 8 , wherein said portion has an oxidizable quality generally similar to an oxidizable quality of said base.
10. A flat panel display having at least one emitter comprising:
a substrate formed of a substantially uniform material;
at least one tapered protuberance having one of a fine micro-point, edge, or blade integrally formed from the material of the substrate for the emission of electrons, said protuberance having an apex and a base;
a first dopant dispersed through said protuberance in a dopant concentration having a gradient, said dopant concentration greater at said apex, decreasing toward said base, and zero at said base; and
a second dopant dispersed through said protuberance in a dopant concentration having a gradient, said dopant concentration greater at said apex, decreasing toward said base, and zero at said base, said second dopant being different than said first dopant.
11. A flat panel display having at least one pixel, comprising:
a single-layered substrate further comprising:
a generally planar surface having an upper surface comprising semiconductive material having an impurity concentration the greatest at the upper surface of the generally planar surface;
at least one protuberance formed from said generally planar surface, the at least one protuberance having a shape comprising one of a fine micro-point, edge, or blade for the emission of electrons; and
an impurity offset from said generally planar surface and within said protuberance, said impurity within said protuberance has a concentration decreasing concurrently with a distance from the upper surface of said generally planar surface.
12. The flat panel display of claim 11 , wherein said impurity is located within said protuberance to the exclusion of said substrate.
13. A flat panel field emission display, comprising:
a remaining portion of a single-layered substrate, the remaining portion being an uncontaminated single-layered substrate that is at least semiconductive formed from a single-layered substrate having an upper surface, the single-layered substrate having an impurity concentration greatest at the upper surface while decreasing with a distance from the upper surface; and
a micro-cathode on said substrate formed from the portion of the single-layered substrate having an impurity concentration greatest at the upper surface thereof, the micro-cathode having a shape of one of a fine micro-point, edge, or blade for the emission of electrons further comprising:
a contaminated apex having an impurity concentration substantially the same as portion of the single-layered substrate at the upper surface thereof; and
a decreasingly contaminated body, the concentrate of the impurity decreasing from the contaminated apex.
14. The flat panel field emission display of claim 13 , wherein said micro-cathode is integral with said substrate.
15. A flat display panel, comprising:
a generally uncontaminated substrate comprising semiconductive material formed from a single-layered substrate having an upper surface, the single-layered substrate having an impurity concentration greatest at the upper surface while decreasing with a distance from the upper surface; and
an emitter electrode on said substrate having a shape of one of a fine micro-point, edge, or blade for the emission of electrons, further comprising an apex having an impurity concentration substantially the same as portion of the single-layered substrate at the upper surface thereof, and further having an etch-resistible quality that increases with depth from said apex.
16. The flat display panel in claim 15 , wherein said emitter electrode further comprises a base and further has an oxidizable quality that increases with elevation from said base.
17. The flat display panel in claim 15 , wherein a portion of said substrate that is under said emitter electrode has an etch-resistible quality generally similar to an etch-resistible quality of said base.
18. The flat display panel in claim 17 , wherein said portion has an oxidizable quality generally similar to an oxidizable quality of said base.
19. A flat panel display having at least one emitter comprising:
a substrate formed of a substantially uniform material;
at least one tapered protuberance having one of a fine micro-point, edge, or blade integrally formed from the material of the substrate for the emission of electrons, said protuberance having an apex and a base, said protuberance having an aspect ratio of greater than 1:1;
a first dopant dispersed through said protuberance in a dopant concentration having a gradient, said dopant concentration greater at said apex, decreasing toward said base, and zero at said base; and
a second dopant dispersed through said protuberance in a dopant concentration having a gradient, said dopant concentration greater at said apex, decreasing toward said base, and zero at said base, said second dopant being different than said first dopant.
20. A flat panel display having at least one pixel, comprising:
a single-layered substrate further comprising:
a generally planar surface having an upper surface comprising semiconductive material having an impurity concentration the greatest at the upper surface of the generally planar surface;
at least one protuberance formed from said generally planar surface, the at least one protuberance having a shape comprising one of a fine micro-point, edge, or blade for the emission of electrons, said at least one protuberance having an aspect ratio of greater than 1:1; and
an impurity offset from said generally planar surface and within said protuberance, said impurity within said protuberance has a concentration decreasing concurrently with a distance from the upper surface of said generally planar surface.
21. The flat panel display of claim 20 , wherein said impurity is located within said protuberance to the exclusion of said substrate.
22. A flat panel field emission display, comprising:
a remaining portion of a single-layered substrate, the remaining portion being an uncontaminated single-layered substrate that is at least semiconductive formed from a single-layered substrate having an upper surface, the single-layered substrate having an impurity concentration greatest at the upper surface while decreasing with a distance from the upper surface; and
a micro-cathode on said substrate formed from the portion of the single-layered substrate having an impurity concentration greatest at the upper surface thereof, the micro-cathode having a shape of one of a fine micro-point, edge, or blade for the emission of electrons,, said micro-cathode having an aspect ratio of greater than 1:1, said micro-cathode further comprising:
a contaminated apex having an impurity concentration substantially the same as portion of the single-layered substrate at the upper surface thereof; and
a decreasingly contaminated body, the concentrate of the impurity decreasing from the contaminated apex.
23. The flat panel field emission display of claim 22 , wherein said micro-cathode is integral with said substrate.
24. A flat display panel, comprising:
a generally uncontaminated substrate comprising semiconductive material formed from a single-layered substrate having an upper surface, the single-layered substrate having an impurity concentration greatest at the upper surface while decreasing with a distance from the upper surface; and
an emitter electrode on said substrate having a shape of one of a fine micro-point, edge, or blade for the emission of electrons, said emitter electrode having an aspect ratio of greater than 1:1, said emitter electrode further comprising an apex having an impurity concentration substantially the same as portion of the single-layered substrate at the upper surface thereof, and further having an etch-resistible quality that increases with depth from said apex.
25. The flat display panel in claim 24 , wherein said emitter electrode further comprises a base and further has an oxidizable quality that increases with elevation from said base.
26. The flat display panel in claim 24 , wherein a portion of said substrate that is under said emitter electrode has an etch-resistible quality generally similar to an etch-resistible quality of said base.
27. The flat display panel in claim 26 , wherein said portion has an oxidizable quality generally similar to an oxidizable quality of said base.
28. An in-process flat panel display having at least one emitter comprising:
a substrate formed of a substantially uniform material;
at least one tapered protuberance having one of a fine micro-point, edge, or blade integrally formed from the material of the substrate for the emission of electrons, said protuberance having an apex and a base;
a first dopant dispersed through said protuberance in a dopant concentration having a gradient, said dopant concentration greater at said apex, decreasing toward said base, and zero at said base; and
a second dopant dispersed through said protuberance in a dopant concentration having a gradient, said dopant concentration greater at said apex, decreasing toward said base, and zero at said base, said second dopant being different than said first dopant.
29. An in-process flat panel display having at least one pixel, comprising:
a single-layered substrate further comprising:
a generally planar surface having an upper surface comprising semiconductive material having an impurity concentration the greatest at the upper surface of the generally planar surface;
at least one protuberance formed from said generally planar surface, the at least one protuberance having a shape comprising one of a fine micro-point, edge, or blade for the emission of electrons; and
an impurity offset from said generally planar surface and within said protuberance, said impurity within said protuberance has a concentration decreasing concurrently with a distance from the upper surface of said generally planar surface.
30. The in-process flat panel display of claim 29 , wherein said impurity is located within said protuberance to the exclusion of said substrate.
31. An in-process flat panel field emission display, comprising:
a remaining portion of a single-layered substrate, the remaining portion being an uncontaminated single-layered substrate that is at least semiconductive formed from a single-layered substrate having an upper surface, the single-layered substrate having an impurity concentration greatest at the upper surface while decreasing with a distance from the upper surface; and
a micro-cathode on said substrate formed from the portion of the single-layered substrate having an impurity concentration greatest at the upper surface thereof, the micro-cathode having a shape of one of a fine micro-point, edge, or blade for the emission of electrons further comprising:
a contaminated apex having an impurity concentration substantially the same as portion of the single-layered substrate at the upper surface thereof, and
a decreasingly contaminated body, the concentrate of the impurity decreasing from the contaminated apex.
32. The in-process flat panel field emission display of claim 31 , wherein said micro-cathode is integral with said substrate.
33. An in-process flat display panel, comprising:
a generally uncontaminated substrate comprising semiconductive material formed from a single-layered substrate having an upper surface, the single-layered substrate having an impurity concentration greatest at the upper surface while decreasing with a distance from the upper surface; and
an emitter electrode on said substrate having a shape of one of a fine micro-point, edge, or blade for the emission of electrons, further comprising an apex having an impurity concentration substantially the same as portion of the single-layered substrate at the upper surface thereof, and further having an etch-resistible quality that increases with depth, from said apex.
34. The in-process flat display panel in claim 33 , wherein said emitter electrode further comprises a base and further has an oxidizable quality that increases with elevation from said base.
35. The in-process flat display panel in claim 33 , wherein a portion of said substrate that is under said emitter electrode has an etch-resistible quality generally similar to an etch-resistible quality of said base.
36. The in-process flat display panel in claim 35 , wherein said portion has an oxidizable quality generally similar to an oxidizable quality of said base.
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US08/089,166 US5532177A (en) | 1993-07-07 | 1993-07-07 | Method for forming electron emitters |
US08/609,354 US6825596B1 (en) | 1993-07-07 | 1996-03-01 | Electron emitters with dopant gradient |
US10/928,566 US20050023951A1 (en) | 1993-07-07 | 2004-08-26 | Electron emitters with dopant gradient |
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US09/161,338 Expired - Fee Related US6049089A (en) | 1993-07-07 | 1998-09-25 | Electron emitters and method for forming them |
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US11/450,039 Abandoned US20060226765A1 (en) | 1993-07-07 | 2006-06-08 | Electronic emitters with dopant gradient |
US11/450,033 Abandoned US20060237812A1 (en) | 1993-07-07 | 2006-06-08 | Electronic emitters with dopant gradient |
US11/591,067 Abandoned US20070052339A1 (en) | 1993-07-07 | 2006-11-01 | Electron emitters with dopant gradient |
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US09/161,338 Expired - Fee Related US6049089A (en) | 1993-07-07 | 1998-09-25 | Electron emitters and method for forming them |
US09/759,746 Expired - Fee Related US7064476B2 (en) | 1993-07-07 | 2001-01-12 | Emitter |
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US11/591,067 Abandoned US20070052339A1 (en) | 1993-07-07 | 2006-11-01 | Electron emitters with dopant gradient |
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US20060226765A1 (en) | 2006-10-12 |
US20060237812A1 (en) | 2006-10-26 |
US6825596B1 (en) | 2004-11-30 |
US20070052339A1 (en) | 2007-03-08 |
US7064476B2 (en) | 2006-06-20 |
US6049089A (en) | 2000-04-11 |
US20020093281A1 (en) | 2002-07-18 |
US5532177A (en) | 1996-07-02 |
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