US20050011612A1

US20050011612A1 - Plasma etching apparatus and plasma etching method

Info

Publication number: US20050011612A1
Application number: US10/787,461
Authority: US
Inventors: Mamoru Yakushiji; Yutaka Ohmoto; Ryooji Fukuyama; Katsuya Watanabe
Original assignee: Hitachi High Technologies Corp
Current assignee: Hitachi High Tech Corp
Priority date: 2003-07-18
Filing date: 2004-02-27
Publication date: 2005-01-20
Also published as: JP2005039004A

Abstract

An apparatus for etching an organic film that is capable of suppressing the amount of contaminants adhered to the etched substrate without deteriorating the etching properties or processing profile of the film, comprising disposing a ring formed of a semiconductor material on the outer circumference of a substrate to be processed, and applying a bias voltage to the ring.

Description

The present application claims priority from Japanese patent application JP2003-199208 filed on Jul. 18, 2003, the content of which is hereby incorporated by reference into this application.

FIELD OF THE INVENTION

The present invention relates to a plasma etching apparatus and a plasma etching method, and more specifically, relates to a plasma processing technique preferably applied to the processing of an insulated film material for a wiring layer having a low dielectric constant.

DESCRIPTION OF THE RELATED ART

Along with the improvement of semiconductor device properties, the transition of wiring material to Cu has progressed not only for miniaturization but also for reduced resistance of the devices. However, when Cu is adopted as the wiring material, since dry etching of Cu is technically tough, a damascene technique is applied in which an interlayer insulating film to be disposed around the Cu wiring is etched first, then Cu is embedded through plating or the like, and thereafter, a CMP (chemical mechanical polishing) treatment is performed to remove the excessive Cu to thereby form a flat wiring pattern.
Incidentally, a plasma processing apparatus is widely used in the process for manufacturing a semiconductor device, such as for microfabrication processes such as film deposition, etching and ashing. Plasma processing comprises generating plasma in a vacuum chamber (reactor) with a process gas introduced to the chamber through use of a plasma generating means, causing reaction on the surface of a semiconductor wafer so as to carry out the desired microfabrication, and evacuating volatile reaction products from the chamber.
According to such plasma processing, the quality of the process is greatly affected by the temperature of the wafer and the inner wall of the reactor, and by the status of reaction products deposited on the inner wall. Moreover, if the reaction products deposited on the interior of the reactor are exfoliated, they become the cause of particles that may lead to deterioration of the properties of the devices or the degradation of the yield factor. Therefore, in a plasma processing device, it is important to control the temperature inside the reactor and the deposition of reaction products on the inner surface of the reactor appropriately and to evacuate the reactor promptly, in order to maintain the process stably and reduce the generation of contaminants.
For example, a parallel plate-type plasma processing apparatus is known, having a heating means provided to at least one of a clamp ring (means for supporting the object to be processed) and a focus ring (means for concentrating plasma) for heating and maintaining the same to such a temperature that prevents the reaction products produced by the plasma process from being adhered thereto (refer to patent document 1). A resistive heating element is utilized as the heating means, and by heating, the reaction products are prevented from being adhered to the interior of the chamber, by which the exfoliation of reaction products and the amount of contaminants on the processed substrate are reduced.
Patent document 1:
Japanese Patent Application Laid-Open No. H5-275385

SUMMARY OF THE INVENTION

As described, in a plasma processing apparatus, it is necessary to evacuate the reaction products generated by the etching, and also to control the deposition of reaction products on the inner wall surface of the chamber.
However, in etching an organic film having a hard mask structure (such as SiO₂), there occurs a problem of generation of contaminants considered to have been caused by the silicon (Si)-based reaction products. It is considered that the generation of silicon-based contaminants is caused by the etching or sputtering of the hard mask and the members constituting the chamber. A certain amount of silicon-based contaminants having been produced is deposited on the members constituting the chamber, and thereafter, exfoliate therefrom and attach to the wafer substrate. Moreover, the very fine contaminants that attach to the film being etched create micromasks, by which residuals occur.
The present invention aims at solving the above-mentioned problems of the prior art. The object of the present invention is to provide a plasma process for etching an organic film, capable of suppressing the attachment of contaminants to the substrate to be processed without deteriorating the etching properties and the processed profile.
In order to achieve the above object, according to one representative aspect of the present invention, a plasma etching apparatus for etching an organic film comprises a semiconductor ring (made for example of silicon material) disposed on an outer circumference of a substrate to be processed, and having a bias voltage applied to the ring. By disposing a ring formed of a semiconductor on the outer circumference of the substrate to be processed and applying a bias voltage to the ring, the reaction between the ring surface and the Si-based reaction products caused by the plasma process can be controlled appropriately, and the Si-based reaction products generated by the plasma process can be deposited stably on the ring made of the same material, by which the amount of contaminants attached to the substrate being processed can be suppressed. Further, by applying bias voltage to the ring, the reaction on the surface can be controlled, and the rate of deposition of the reaction products can be suppressed. The reaction products having been prevented of deposition reenter the gas, by which the chances of being evacuated are increased, so as a result, the amount of contaminants being attached to the substrate is effectively reduced.
Further, a resin layer formed of a carbon material is disposed on an inner wall surface of a processing chamber. According to this arrangement, a portion or a whole surface of the resin is etched or sputtered, and the components thereof are emitted into the plasma. Since the main component of the resin layer is carbon (C), it has a high binding energy with the silicon (Si) generated by the etching or sputtering of the hard mask and the members constituting the chamber, so they react easily and are evacuated from the chamber. Moreover, even when the carbon is deposited on the resin surface, since it has a high binding energy, the deposition on the resin is thicker and more stable then the deposition on other members constituting the chamber.
Moreover, a gas containing carbon components, such as a carbon monoxide gas (CO), a methane gas (CH₄), or Ar+CH₄gas having methane gas diluted by argon gas (Ar) which can be handled easily, is added to an etching gas such as a mixed gas containing nitrogen (N₂) and hydrogen (H₂), or ammonia (NH₃), and supplied to the processing chamber. The silicon components bond easily with carbon and are evacuated from the chamber, by which the amount of contaminants is reduced.
Furthermore, at least either a material or a size of a member disposed between the semiconductor ring and an electrode is adjusted according to an area to be etched on the substrate to be processed. Thus, the bias voltage applied to the ring is controlled appropriately so as to have Si-based reaction products deposit stably on the ring, by which the amount of contaminants being attached to the processed substrate can be suppressed.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view showing a schematic structure of an UHF ECR plasma etching apparatus used in the embodiments of the present invention;
FIG. 2 is a chart showing the etching conditions according to a first embodiment of the present invention;
FIG. 3 is a chart showing the etching conditions according to a second embodiment of the present invention;
FIG. 4 is a chart showing the etching conditions according to the third and fourth embodiments of the present invention;
FIG. 5 is a chart comparing the organic film etching rate, the selective ratio to HM, the number of contaminants and the existence of residuals of the prior art and the present invention; and
FIG. 6 is a graph comparing the number of contaminants and the amount of residuals according to the fourth embodiment of the present invention with the dielectric constant varied.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The preferred embodiments of the present invention will now be explained with reference to the drawings.
FIG. 1 is a cross-sectional view showing the schematic structure of a UHF ECR plasma etching apparatus used in the preferred embodiments of the present invention. In FIG. 1, reference number 100 denotes a processing chamber, 101 denotes an upper antenna, 102 denotes a high-frequency power supply, 103 denotes a matching/filter circuit, 104 denotes coils, 105 denotes plasma, 106 denotes a side wall sleeve which is a resin layer formed of a carbon material, 107 denotes a wafer substrate mounting electrode, 108 denotes a wafer substrate (substrate to be processed), 109 denotes a matching/filter circuit, 110 denotes an RF bias power supply, 111 denotes a substrate holder ring formed of a semiconductor (such as silicon) material, 112 denotes a dielectric serving as a susceptor member, and 113 denotes a turbopump.
In the plasma etching apparatus illustrated in FIG. 1, a mixed gas of nitrogen (N₂) and hydrogen (H₂), or ammonia (NH₃), serving as etching gas are introduced to an evacuated processing chamber 100 from a gas cylinder via a gas pipe, a mass flow controller (which are not shown) and through fine holes formed to the surface of the upper antenna 101 in a shower-like state. Further, if necessary, a small amount of gas containing carbon components, such as carbon monoxide (CO) or methane (CH₄), that will not affect the processing profile or the coating quality is supplied to the processing chamber 100 in a similar manner. At this time, the pressure is controlled to a desirable level through a variable valve.
Furthermore, the high frequency generated from the high-frequency power supply 102 (in this embodiment, for example, a UHF power supply with a frequency of 450 MHz and an RF power supply with a frequency of 13.56 MHz) is introduced through the matching/filter circuit 103 and the upper antenna 101 to the processing chamber 100. Thus, an ECR discharge is caused by the interaction between the UHF power supply and the magnetic field created by the coils 104 disposed around the processing chamber 100, by which the etching gas is dissociated and plasma 105 is generated.
A wafer substrate 108 having a diameter size of 200 mm, for example, is mounted on a wafer substrate mounting electrode 107 disposed at the lower area inside the processing chamber 100, and an RF bias power supply 110 with a frequency of 800 kHz, for example, is connected to the wafer substrate mounting electrode 107 via a matching/filter circuit 109. According to this arrangement, the ions in the plasma are attracted to the surface of the wafer substrate 108, and due to an ion assist reaction in which the ions being attracted to the wafer interact with the radicals attached to the surface of the wafer, the wafer substrate is subjected to anisotropic etching. The reaction products generated during etching are evacuated through the turbopump 113.
According to the preferred embodiments of the present invention, a substrate holder ring 111 formed of a semiconductor material is disposed on the outer circumference portion of the wafer substrate 108 on top of the wafer substrate mounting electrode 107 via a dielectric 112 formed of alumina (in a fourth embodiment described later, the dielectric 112 is formed of zirconia). If the wafer substrate 108 has a diameter of 200 mm and a thickness of 0.6 mm, for example, the substrate holder ring 111 can have an inner diameter of 200 mm or somewhat larger, an outer diameter of around 300 mm to 350 mm, and a thickness of around 3 mm. A portion of the bias voltage (bias power) from the RF bias power supply 110 is leaked through the wafer substrate mounting electrode 107 and the dielectric 112 to the substrate holder ring 111. The amount of RF bias power leakage reaching the substrate holder ring 111 from the wafer mounting electrode 107 is controlled by the material of the dielectric 112 and/or the design thereof, so that in etching organic films having various area ratios to hard masks, the deposition of Si-based reaction products to the substrate holder ring 111 is performed stably so that it substantially corresponds with the target value. Thus, the RF bias leakage is controlled to a preferable value corresponding to the area to be etched on the substrate being processed (wafer substrate 108), so that the amount of contaminants on the wafer substrate 108 can be suppressed to below-a controlled value. In other words, the deposition of Si-based reaction products on the substrate holder ring 111 is controlled, so that the amount of contaminants being generated is suppressed to below a controlled value, and so that the Si-based reaction products adhered to the ring 111 are not separated therefrom before the timing for carrying out a cleaning process arrives, the cleaning performed each time after processing a single lot, for example.
According to the embodiments of the present invention, a side wall sleeve 106 made of polyetherimide serving as a resin layer is disposed to the inner wall of the processing chamber 100, so that the side wall sleeve 106 is etched or sputtered to produce carbon components within the processing chamber 100. The carbon components being produced as described above by plasma etching or sputtering has high binding energy with the Si-based reaction products (silicon) produced by the plasma, so the Si-based reaction products react easily with the carbon components and bind therewith, which can be evacuated efficiently. Furthermore, since the binding energy is high, the Si-based reaction products are also stably deposited on the surface of the resin layer, and the deposition on the resin layer becomes thicker than the deposition on other members constituting the processing chamber.
As described above, since the substrate holder ring 111 disposed around the wafer substrate 108 takes on the deposits of the Si-based reaction products in such a manner as to guard the wafer substrate 108, and since the carbon components produced by etching or sputtering the side wall sleeve 106 are easily bonded with the Si-based reaction products and thus more efficiently evacuated from the chamber, the present invention enables to suppress the creation of residue and the generation of contaminants on the wafer substrate 108 without deteriorating the properties or the processing profile of the organic film.
Furthermore, by adding a gas containing carbon to the etching gas, the Si-based reaction products bond with the carbon components in the supplied gas and are further efficiently evacuated, according to which the amount of contaminants is even further reduced.
[Embodiment 1]
As described, a plasma etching apparatus was prepared having a substrate holder ring 111 formed of a semiconductor material disposed on the outer circumference portion of a wafer substrate 108, a bias voltage applied to the substrate holder ring 111, and a resin film made of a carbon material (a side wall sleeve 106 made of polyetherimide) disposed on the inner wall of the processing chamber 100. Using NH₃as etching gas, three hundred wafers having an organic film of a hard mask structure (50% hard mask area ratio) were continuously etched according to the etching conditions shown in FIG. 2. By inspecting the processed wafers, it was confirmed that there were no residuals, the contaminants were below a criteria of control, and good processing profiles were achieved for all the wafer substrates 108.
[Embodiment 2]
As described, a plasma etching apparatus was prepared having a substrate holder ring 111 formed of a semiconductor material disposed on the outer circumference portion of a wafer substrate 108, a bias voltage applied to the substrate holder ring 111, and a resin film made of a carbon material (a side wall sleeve 106 made of polyetherimide) disposed on the inner wall of the processing chamber 100. An etching gas of NH₃, and a small amount of carbon monoxide (CO) that will not affect the processing profile or the quality of the film added as an additive gas to the etching gas, were supplied to the processing chamber, and three hundred wafers having an organic film of a hard mask structure (50% hard mask area ratio) were continuously etched according to the etching conditions shown in FIG. 3. By inspecting the processed wafers, it was confirmed that there were no residuals, the contaminants were below a criteria of control, and good processing profiles were achieved for all the wafer substrates 108.
[Embodiment 3]
As described, a plasma etching apparatus was prepared having a substrate holder ring 111 formed of a semiconductor material disposed on the outer circumference portion of a wafer substrate 108, a bias voltage applied to the substrate holder ring 111, and a resin film made of a carbon material (a side wall sleeve 106 made of polyetherimide) disposed on the inner wall of the processing chamber 100. An etching gas of NH₃, and a small amount of Ar+CH₄gas formed by diluting a methane gas (CH₄) with an argon gas (Ar) that can be easily handled that will not affect the processing profile or the quality of the film added as an additive gas to the etching gas, were supplied to the processing chamber, and three hundred wafers having an organic film of a hard mask structure (50% hard mask area ratio) were continuously etched according to the etching conditions shown in FIG. 4. By inspecting the processed wafers, it was confirmed that there were no residuals, the contaminants were below a criteria of control, and good processing profiles were achieved for all the wafer substrates 108.
[Embodiment 4]
In the present embodiment, the dielectric 112 made of alumina according to the first, second and third embodiments is replaced with zirconia, for example, having a higher dielectric constant than alumina, and according to etching conditions similar to the third embodiment, three hundred wafers having an organic film of a hard mask structure (70% hard mask area ratio) were continuously etched. By inspecting the processed wafers, it was confirmed that there were no residuals, the contaminants were below a criteria of control, and good processing profiles were achieved for all the wafer substrates 108. Though zirconia was utilized as the susceptor member in the present embodiment, other materials are also applicable according to the present invention.
Further, according to the present embodiment, a wafer substrate having an organic film with a mask area ratio of 70% was subjected to processing, but equivalent effects can be achieved for a wafer substrate having a larger mask area ratio by replacing the dielectric 112 with a conductive material such as aluminum.
FIG. 5 is a chart comparing the organic film etching rate, the selective ratio to HM (hard mask), the number of contaminants per a single wafer (0.20 μm or larger) and the existence of residuals of the prior art and the second embodiment of the present invention. As can be seen clearly from this chart, according to the present invention, the etching rate is somewhat slower than the prior art but still maintains a practically allowable level. As for the other properties according to the present invention, the selective ratio to HM is improved, the number of contaminants is reduced by one order from the prior art example and thus easily clears the criteria of control, and there are no residuals. The present invention enables to suppress the generation of contaminants and the formation of residuals without deteriorating the properties or the processing profile of the organic film.
FIG. 6 is a drawing comparing the number of contaminants and the amount of residuals according to the fourth embodiment of the present invention with the dielectric constant varied. As can be seen clearly in the drawing, within the applicable range of the present invention, the number of contaminants easily clears the criteria of control, and there are no residues. Therefore, the generation of contaminants and the formation of residuals are suppressed according to the present invention without deteriorating the properties or the processing profile of the organic film.
As described above, the present invention enables to suppress the generation of contaminants and the formation of residuals in a plasma etching process for etching an organic film, without deteriorating the properties or the processing profile of the organic film, and therefore, the present invention contributes greatly to the fabrication of highly reliable semiconductor devices.

Claims

1. A plasma etching apparatus for etching an organic film, comprising:

a semiconductor ring disposed on an outer circumference of a substrate to be processed, and having a bias voltage applied to the ring.

2. The plasma etching apparatus according to claim 1, further comprising a resin layer formed of a carbon material disposed on an inner wall surface of a processing chamber.

3. The plasma etching apparatus according to claim 1, wherein a carbon monoxide gas is added to an etching gas.

4. The plasma etching apparatus according to claim 1, wherein a methane gas is added to an etching gas.

5. The plasma etching apparatus according to claim 1, wherein at least either a material or a size of a susceptor member disposed between said ring and an electrode is adjusted according to an area to be etched on said substrate to be processed.

6. A plasma etching method for etching an organic film, comprising:

disposing a semiconductor ring on an outer circumference of a substrate to be processed, applying a bias voltage to the ring, and controlling the bias voltage being applied, thereby controlling the degree of deposition of silicon-based reaction products on the surface of the ring.

7. The plasma etching method according to claim 6, further comprising disposing a resin layer formed of a carbon material on an inner wall surface of a processing chamber.

8. The plasma etching method according to claim 6, further comprising adding a gas containing carbon to an etching gas.