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Publication numberUS20040209453 A1
Publication typeApplication
Application numberUS 10/847,614
Publication date21 Oct 2004
Filing date18 May 2004
Priority date20 Jul 1994
Also published asUS5611481, US5977637, US6608381, US6764938, US20020050404
Publication number10847614, 847614, US 2004/0209453 A1, US 2004/209453 A1, US 20040209453 A1, US 20040209453A1, US 2004209453 A1, US 2004209453A1, US-A1-20040209453, US-A1-2004209453, US2004/0209453A1, US2004/209453A1, US20040209453 A1, US20040209453A1, US2004209453 A1, US2004209453A1
InventorsToshiya Akamatsu, Kazuaki Karasawa, Teru Nakanishi, Kozo Shimizu
Original AssigneeFujitsu Limited
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Integrated electronic device having flip-chip connection with circuit board and fabrication method thereof
US 20040209453 A1
Abstract
An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.
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Claims(9)
What is claimed is:
1. A method for fabricating an integrated electronic device having an electric connection connecting a first electrode of a first substrate with a second electrode of a second substrate, surfaces of the first and second electrodes having repellant and adhesive tendencies to molten metal, respectively, the method comprising the steps of:
forming a first soldering metal bump on the surface of the first electrode, the first soldering metal bump including at least one of components of an eutectic alloy having an eutectic temperature, wherein the first soldering metal bump has a first melting temperature;
forming a second soldering metal bump on the surface of the second electrode, the second soldering metal bump including the rest of the components of the eutectic alloy, wherein the second soldering metal bump has a second melting temperature;
aligning the first and second soldering metal bumps to each other, and then keeping both in contact with each other; and
heating the first and second soldering metal bumps at such a connection temperature that a connection part made of the eutectic alloy is formed between the first and second soldering metal bumps,
wherein the connection temperature is higher than the eutectic temperature and lower than the melting temperatures of the first and second soldering metal bumps.
2. A method for fabricating an integrated electronic device according to claim 1, wherein the eutectic temperature of the eutectic alloy is higher than a highest limit of an operating temperature of the integrated electronic device.
3. A method for fabricating an integrated electronic device according to claim 1, wherein one of the first and second soldering metal bumps is made of at least a component of a binary alloy of In—Bi, a tertiary alloy of Sn—Bi—In or a four-element alloy of Sn—Pb—Bi—In, and the other of the first and second soldering metal bumps is made of the rest of the components of the binary alloy, the tertiary alloy or the four element alloy.
4. A method for fabricating an integrated electronic device according to claim 1, wherein one of the first and second soldering metal bumps is made of at least a component of a binary alloy of Cd—Bi, a tertiary alloy of Sn—Bi—Cd or a four element alloy of Sn—Pb—Bi—Cd, and the other of the first and second soldering metal bumps is made of the rest of the components of the binary alloy, the tertiary alloy or the four element alloy.
5. A method for fabricating an integrated electronic device according to claim 1, wherein the electric connection is composed of Ge as an additional minor component.
6. A method for fabricating an integrated electronic device according to claim 1, wherein the first substrate is a semiconductor chip and the second substrate is a circuit board.
7. A method for fabricating an integrated electronic device according to claim 5, wherein the first substrate is a semiconductor chip and the second substrate is a circuit board.
8. A method for fabricating an integrated electronic device having an electric connection connecting a first electrode of a first substrate with a second electrode of a second substrate, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of:
forming a soldering metal bump on the surface of the first electrode, the soldering metal bump essentially consisting of components of an eutectic alloy having an eutectic temperature, wherein the soldering metal bump has a melting temperature higher than the eutectic temperature;
mounting the first substrate on the second substrate such that the soldering metal bump is aligned to the corresponding second electrode; and
melting the soldering metal bump at the melting temperature, and then solidifying the soldering metal bump into the electric connection connecting the first electrode with the second electrode.
9. A method for fabricating an integrated electronic device according to claim 8, wherein the eutectic temperature of the eutectic alloy is in the operating temperature range of the integrated electronic device.
Description
  • [0001]
    This application is a continuation of application Ser. No. 09/392,722, filed Sep. 9, 1999, which is a division of application Ser. No. 08/769,529, filed Dec. 19, 1996, U.S. Pat. No. 5,977,637, which is a division of application Ser. No. 08/504,080, filed Jul. 19, 1995, U.S. Pat. No. 5,611,481.
  • FIELD OF INVENTION
  • [0002]
    The present invention relates to an integrated electronic device and a fabrication method thereof, more particularly to the integrated electronic device having an electric connection for connecting a semiconductor chip with a circuit board and fabrication method thereof.
  • DESCRIPTION OF THE PRIOR ART
  • [0003]
    For higher integration of semiconductor chips on a circuit board, a flip-chip method has been developed which enables bare semiconductor chips to be mounted directly on a circuit board by connecting each of electrodes between the semiconductor chips and the circuit board using soldering metal. However, a drawback on a soldering metal connection is a fact that a surface of an aluminium interconnection layer, widely used in LSI circuit, has repellency against melt of soldering metal, which is often called wettability problem. It could be avoided by coating the aluminium surface by a metal having a adhesive tendency to soldering metal, but it eventually makes the fabricating steps more complex. Another unfavorable effect of a soldering metal connection is that as shown in FIG. 7, a rigid connection between electrodes 32, 34 by soldering metal 33 often results in a crack 36 due to a repetitive local stress concentration caused by discrepancy in thermal expansion coefficient between a semiconductor chip and a circuit board. To avoid these foregoing problems, as shown in FIG. 8A, a bump 55 containing dispersed liquid metal particles 53 of indium-gallium in flux vehicle 54 for a liquid connection on a gold electrode 52 has been proposed, however, surface tension of the liquid metal 53 against gold surface is still so high that the liquid metal often makes itself droplets 53 on the gold electrode 52 after heating process as shown in FIG. 8B.
  • SUMMARY OF INVENTION
  • [0004]
    It is an object of the present invention to provide a method for fabricating an integrated electronic device having a soldering metal connection between a semiconductor chip and a circuit board free from the wettability problem on the soldering metal connection to an electrode of the semiconductor chip.
  • [0005]
    It is another object of the present invention to provide a method for fabricating an integrated electronic device having a soldering metal connection between a semiconductor chip and a circuit board free from disconnection failures caused by thermal stress.
  • [0006]
    It is a further object of the present invention to provide an integrated electronic device having a soldering metal connection between a semiconductor chip and a circuit board free from the wettability problem on the soldering metal connection to an electrode of the semiconductor chip.
  • [0007]
    It is a still further object of the present invention to provide an integrated electronic device having a soldering metal connection between a semiconductor chip and a circuit board free from disconnection failures caused by thermal stress.
  • [0008]
    One aspect of the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board comprising the steps of:
  • [0009]
    forming a first bump made of a first metal component on the first electrode, a surface of the first electrode having repellency against melt of the first metal component;
  • [0010]
    forming a second bump made of a second metal component on the second electrode opposite to the first bump in a position; and
  • [0011]
    forming a connection part made of an eutectic alloy consisting of the first metal component and the second metal component between the first bump and the second bump so as to make an electric connection between the first electrode and the second electrode.
  • [0012]
    Another aspect of the present invention is a method for fabricating an integrated electronic device having an electric connection connecting a first electrode of a first substrate with a second electrode of a second substrate, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of:
  • [0013]
    forming a metal bump on the surface of the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and
  • [0014]
    forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.
  • [0015]
    Still another aspect of the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a first substrate and a second electrode of a second substrate comprising the steps of:
  • [0016]
    forming a first metal layer on a surface of a first electrode on a first substrate, the first metal layer capable of composing an eutectic alloy with gallium (Ga);
  • [0017]
    forming a bump of Ga-rosin mixture on the first metal layer selectively; and
  • [0018]
    forming the electric connection between the first electrode and the second electrode by heating the bump of Ga-rosin mixture maintaining the bump of the Ga-rosin mixture in contact with the second electrode to react gallium in the Ga-rosin mixture with the first metal layer into the alloy capable to adhere to the first and second electrodes.
  • [0019]
    The technique according to the present invention can be applied to an electro-mechanical device such as a saw-tooth device or an optoelectronic device as well as a multi-chip semiconductor module having a multi-layered circuit board.
  • BRIEF DESCRIPTION OF DRAWINGS
  • [0020]
    Preferred embodiments of the invention are described with reference to the accompanying drawings, in which:
  • [0021]
    [0021]FIG. 1A is a diagrammatic section view of a pair of soldering metal bumps on a chip and a circuit board before connecting to each other related to the first embodiment.
  • [0022]
    [0022]FIG. 1B is a diagrammatic section view of a pair of soldering metal bumps on a chip and a circuit board after connecting to each other related to the first embodiment.
  • [0023]
    [0023]FIG. 2A is a diagrammatic section view of a pair of soldering metal bumps on a chip and a circuit board before connecting to each other related to the second embodiment.
  • [0024]
    [0024]FIG. 2B is a diagrammatic section view of a pair of soldering metal bumps on a chip and a circuit board after connecting to each other related to the second embodiment.
  • [0025]
    [0025]FIG. 3 is a diagrammatic section view of a solid-liquid soldering metal connection between a chip and a circuit board related to the third embodiment.
  • [0026]
    [0026]FIGS. 4A-4E are diagrammatic section views of an eutectic alloy connection between a chip and a circuit board in various processing steps related to the first embodiment.
  • [0027]
    [0027]FIGS. 5A-5E are diagrammatic section views of a solid-liquid soldering metal connection between a chip and a circuit board in various processing steps related to the third embodiment.
  • [0028]
    [0028]FIGS. 6A-6F are diagrammatic section views of a liquid metal connection between a chip and a circuit board in various processing steps related to the fourth embodiment.
  • [0029]
    [0029]FIG. 7 is a diagrammatic section view of a rigid soldering metal connection having a crack between a chip and a circuit board in the prior art.
  • [0030]
    [0030]FIG. 8A is a diagrammatic section view of a bump containing dispersed liquid metal particles of gallium-indium in a flux vehicle for a liquid metal connection on a gold electrode in the prior art.
  • [0031]
    [0031]FIG. 8B is a diagrammatic section view of liquid metal droplets left on the gold electrode after heating process in the prior art.
  • [0032]
    TABLE 1 is examples setting forth combination of the first and second bump metals and their connection temperatures.
  • DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • [0033]
    Referring to FIG. 1A, a semiconductor chip 1 has an electrode pad 2 of aluminium which has repellency against molten metal. The first soldering metal bump 3 made of the first metal component is formed on the electrode pad 2, while a circuit board 6 has an electrode pad 5 of copper which has adhesive tendency to molten metal. The second soldering metal bump 4 made of the second metal component is formed on the electrode pad 5. These metal components are capable to compose an eutectic alloy having a specific compound ratio, and that a melting temperature of the first metal component is higher than a contact temperature of the second metal component. The contact temperature is a process temperature to form an alloy between two metal components.
  • [0034]
    Referring to FIG. 1B, a connection part made of an eutectic alloy consisting of the first metal component and the second metal component is formed between the first soldering metal bump and the second soldering metal bump by heating the both soldering metal bumps at a temperature lower than the melting temperature of the first metal component to maintain the first soldering metal bump in a solid phase at an interface with the aluminium electrode and then cooling down to solidify both of the bumps before the eutectic reaction reaches the aluminium electrode pad 2, in order to prevent the aluminium electrode pad from repelling the first soldering metal bump.
  • [0035]
    Referring to FIG. 2A, a semiconductor chip 1 has an electrode pad 2 of aluminium has repellency against molten metal. The first soldering metal bump 3A is formed on the electrode pad 2 in a trapezoidal shape by deposition technique using a mask having an opening with the same pattern as the first electrode pad, while a circuit board 6 has an electrode pad 5 of copper has adhesive tendency to molten metal. The second soldering metal bump 4A is formed on the electrode pad 5. A melting temperature of the first soldering metal bump is higher than that of the second soldering metal bump.
  • [0036]
    Referring to FIG. 2B, electric connection between the electrode pad 2 and the electrode pad 5 is made by heating the both soldering metal bumps in contact to each other at a temperature lower than the melting temperature of the first metal bump to melt the second soldering metal bump 4A without melting the first soldering metal bump 3A and then cooling down to solidify the second soldering metal bump. The soldering metal is not limited to an eutectic alloy in this embodiment. Preferred mixing ratios for the first and second soldering metal bumps are Pb-5%(wt) Sn and Pb-65%(wt) Sn in weight, respectively. The melting temperatures of the first and second metal bumps are 315 C. for Pb-5%(wt) Sn and 185 C. for Pb-65%(wt) Sn, respectively. In this particular example, a preferred processing temperature to melt the second soldering metal bump is 200-230 C. Since the first soldering metal bump is not melted in this process, the trapezoidal shape on the electrode pad 2 is maintained after the electric connection is accomplished.
  • [0037]
    The electric connection implemented in the first and second embodiments described above does not have disconnection failure due to repellency of molten soldering metal by the electrode surface in fabrication process. That reduces electric resistance and increases mechanical strength of the connection.
  • [0038]
    Referring to FIG. 3, an electrode 2A on a semiconductor chip 1 and an electrode 5 on a circuit board 6 are connected to each other by solid-liquid soldering metal 8. The surfaces of both electrodes have adhesive tendency to molten soldering metal. The solid-liquid soldering metal 8 consists of a solid phase component 10 and a liquid phase component 9 at an operating temperature. The operating temperature is a temperature of an integrated electronic device when the device is active in a normal condition. The eutectic reaction will take place in the solid-liquid soldering metal, where the solid and liquid phases are in thermal equilibrium to each other at a solid-liquid interface. For instance, at a sufficiently low temperature when the integrated circuit device is not operated, the solid-liquid soldering metal is solely composed of a solid phase matrix, and as temperature elevates by device operation, a liquid phase component grows in the solid phase matrix. At further higher temperature, a solid phase component 10 is dispersed in a liquid phase matrix 9 as illustrated in FIG. 3. This mechanism releases the soldering metal from a thermal stress, which prevents from disconnection between the electrodes.
  • [0039]
    Such a process is more particularly described with reference to FIGS. 4A-4E, where a semiconductor chip 11 has an array of electrodes 12A-12F on the surface. FIG. 4A shows that a metal mask 31 having windows was aligned to the semiconductor chip 11 so as to expose each of aluminium electrodes 12A-12F on the semiconductor chip within each of the windows. As shown in FIG. 4B, the first bumps of 100 μm thick indium (In) layer 13A-13F were deposited on the aluminium electrodes through the windows pressing the mask 31 against the surface of the semiconductor chip 11. As shown in FIG. 4C, the In-bumps 13A-13F were exposed by removing the metal mask 31 on which In layer 13 was deposited. FIG. 4D shows that the second bumps of 100 μm thick tin (Sn) layer 14A-14F were formed on copper electrodes 15A-15F of a circuit board 16 by depositing tin through a metal mask. The first and second bumps were aligned to each other as shown in FIG. 4D, then kept contact to each other and heated at a connection temperature which was lower than a melting temperature of indium 156.6 C. and higher than an eutectic temperature of In—Sn alloy 117 C., such as 130 C., the connection temperature is a processing temperature at which the first and second metal components make an alloy at an interface which provides an electric and mechanical connection, so that a connection part made of an eutectic alloy 17 was formed between the first and second bumps as in FIG. 4E. Since the connection temperature was sufficiently lower than the melting temperature of indium in this process, an molten metal was so localized to the connection part 17 that the aluminium electrode maintained a wide contact area with the first bump, which resulted in low contact resistance free from the repellency problem. Some of preferred combinations of metals for the first and second bumps, and the connection temperature are shown in Table 1.
  • [0040]
    Referring to FIGS. 5A-5E, both first electrode pads 19A-19F on a semiconductor chip 11 and the second electrode pads 15A-15F on a ceramic circuit board 16 have an adhesive tendency to molten metal. Each of the first electrode pads 19A-19F was coated by about 0.3 μm thick film of gold, silver, or nickel. Subsequently, about 30 μm high soldering metal bumps 18A-18F consisting of indium (In) and 20%(wt) bismuth (Bi), namely In-20%(wt) Bi, were formed on the first electrode pads 19A-19F by depositing the soldering metals through a mask 31 as shown in FIGS. 5A-5C, similarly to FIGS. 4A-4C. As shown in FIGS. 5D-5E, the semiconductor chip 11 was firmly mounted on the ceramic circuit board 16 by melting at a temperature of about 300 C. and then solidifying the soldering metal bumps into each connection part 18 which connected each of the first electrode pads 19A-19F with each of the second electrode pads 15A-15F.
  • [0041]
    The connection part 18 shown in FIG. 5E made of In-20%(wt)Bi soldering metal which was deviated in composition ratio by 14%(wt) on Indium side from the In—Bi eutectic alloy having a composition ratio of In:Bi=66:34 in weight. Since the eutectic temperature was 72 C., the In-20%(wt)Bi soldering metal consisted of a solid phase component and a liquid phase component above the eutectic temperature. Therefore, a liquid phase component coexsisted with a solid phase component in the connection part 18 between 75 C.-85 C. in the overall operating temperature range from 5 C. to 85 C. of the semiconductor chip. The mechanism that a liquid phase component increases with temperature releases a thermal stress in the connection part 18 caused by difference in thermal coefficient between the semiconductor chip and the circuit board, and furthermore prevents from metal fatigue that would be accumulated in the connection part 18 due to thermal hysteresis. Comparative study of experiments shows that no crack failure was observed in an integrated electronic device according to this embodiment after more than 100 cycles of thermal hysteresis in the operating temperature range from 5 C. to 85 C., while a crack was observed in a solid soldering metal of a prior art after 50 cycles of the same thermal hysteresis in avarage.
  • [0042]
    The foregoing connection part having solid-liquid phase coexistence in an operating temperature range can be implemented by a soldering metal alloy of various mixing ratios. A soldering metal alloy of the first type is essentially made of an eutectic alloy but has an additional minor component that is harmless for the soldering metal alloy to have the liquid phase component at an operating temperature of the integrated electronic device. The additional minor component gives the eutectic alloy phase separation in an upper part of the operating temperature range, such as an In—Bi eutectic alloy with a minor component of 2-3%(wt) Pb or Ge. A soldering metal of the second type is a soldering metal alloy which consists of the same metal components as those of an eutectic alloy and that the mixing ratio is slightly deviated from that of the eutectic alloy. Some of the eutectic alloys are a tertiary or four-element alloy such as Sn—Bi—In soldering metal based on an eutectic alloy of Sn:Bi:In=16.5:32.5:51 (wt %) with an eutectic temperature of 60 C., Sn—Pb—Bi—In soldering metal based on an eutectic alloy of Sn:Pb:Bi:In=19:17:53.5:10.5 (wt %) with an eutectic temperature of 60 C., and Sn—Pb—Bi—In soldering metal based on an eutectic alloy of Sn:Pb:Bi:Cd=13.3:26.7:50:10 (wt %) with an eutectic temperature of 50 C.
  • [0043]
    Referring to FIGS. 6A-6F, processing steps for fabrication of an integrated electronic device having electric connection made of In—Ga liquid metal between a semiconductor chip and a circuit board are described. Ga-rosin mixture was prepared before fabrication of the liquid In—Ga electric connection, for which Ga was mixed with a flux vehicle at mixing ratio of 9 to 1 in weight. After the Ga mixed flux vehicle was heated at 40 C. to melt Ga in it, it was stirred until fine Ga droplets of about 20-30 μm diameter were dispersed homogeneously in the flux vehicle. The flux vehicle was monobutylcarbithol including 60% rosin, 2% thichener, 0.5% activator (hydrochloric diethylamine). The semiconductor chip 21 shown up-side down in FIG. 6A, has an array of electrodes 22A-22F on a surface of the semiconductor chip. The first metal mask 31 made of covar was pressed tightly to the surface of the semiconductor chip so that an exposed area of the surface was masked. A 10 μm thick indium (In) film 23 was deposited on the entire surface of the semiconductor chip by evaporation technique. As shown in FIG. 6B, an array of In-coated electrodes was obtained by removing the first metal mask 31. As shown in FIG. 6C, a 200-300 μm thick Ga-rosin mixture 24 was selectively squeezed into each of windows of the second metal mask 32 having a thickness of 200-300 μm by a squeezer just as used in a printing technique. After removing the second metal mask 32 left a bump of Ga-rosin mixture 24 on the In-film 23, the semiconductor chip was heated at 200 C. so that Ga in the Ga-rosin mixture 24 and the underlayered In-film 23 were united to each other by eutectic reaction and vaporizing organic components as shown in FIG. 6D. 100 μm high In—Ga liquid connections 27A-27F made of an eutectic alloy between Ga and In were formed on each of the array of the electrodes 22A-22F shown in FIG. 6E. The eutectic reaction proceeded at the interface indicated by a dotted line 23 between In and Ga, which prevented the electrodes from repelling the liquid connection. As shown in FIG. 6F, the semiconductor chip 21 having an array of the liquid connections 27A-27F was mounted on a circuit board 26 having an array of electrodes 25A-25F by flipping the semiconductor chip 21 so that the liquid connection of the semiconductor chip and the electrode on the circuit board was aligned to each other with a certain height by maintaining a certain distance between the semicondictor chip and the circuit board by a spacer 28. The appropriate height of the liquid connection was 100 μm. In the foregoing embodiment, the surface of the electrode has such a goof adhesive tendency to a liquid connection that the entire surface of the electrode is covered with the liquid metal, which eventually reduces the electric resistance of the connection. Indium of the eutectic alloy is replaceable by tin (Sn), or zinc (Zn).
Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US3235637 *9 Mar 196415 Feb 1966Haveg Industries IncProcess for molding polymers of halohydrocarbons
US3271638 *4 Nov 19636 Sep 1966Emil M MuradEncased semiconductor with heat conductive and protective insulative encapsulation
US3479983 *24 Oct 196725 Nov 1969Olin MathiesonTemperature sensor
US3497951 *1 Nov 19673 Mar 1970Ite Imperial CorpBus-bar joints and methods for producing them
US4076637 *29 Sep 197628 Feb 1978Tyler CorporationMetal dispersions and method for producing same
US4663096 *22 Oct 19855 May 1987Toa Nenryo Kogyo, K.K.Apparatus and method of heating melt spinning head structure
US4754912 *16 Nov 19875 Jul 1988National Semiconductor CorporationControlled collapse thermocompression gang bonding
US4896410 *24 May 198930 Jan 1990Doty Scientific Inc.Method of assembling tube arrays
US4961154 *2 Jun 19872 Oct 1990Scitex Corporation Ltd.Three dimensional modelling apparatus
US4997791 *13 Apr 19905 Mar 1991Kabushiki Kaisha ToshibaIC card and method of manufacturing the same
US5007163 *18 Apr 199016 Apr 1991International Business Machines CorporationNon-destructure method of performing electrical burn-in testing of semiconductor chips
US5056706 *20 Nov 198915 Oct 1991Microelectronics And Computer Technology CorporationLiquid metal paste for thermal and electrical connections
US5072520 *23 Oct 199017 Dec 1991Rogers CorporationMethod of manufacturing an interconnect device having coplanar contact bumps
US5091288 *27 Oct 198925 Feb 1992Rockwell International CorporationMethod of forming detector array contact bumps for improved lift off of excess metal
US5130779 *19 Jun 199014 Jul 1992International Business Machines CorporationSolder mass having conductive encapsulating arrangement
US5143864 *29 Jul 19911 Sep 1992Misubishi Denki Kabushiki KaishaMethod of producing a semiconductor laser
US5147084 *9 Aug 199115 Sep 1992International Business Machines CorporationInterconnection structure and test method
US5154341 *6 Dec 199013 Oct 1992Motorola Inc.Noncollapsing multisolder interconnection
US5159146 *4 Sep 199127 Oct 1992James V. CarisellaMethods and apparatus for selectively arming well bore explosive tools
US5160409 *5 Aug 19913 Nov 1992Motorola, Inc.Solder plate reflow method for forming a solder bump on a circuit trace intersection
US5170930 *14 Nov 199115 Dec 1992Microelectronics And Computer Technology CorporationLiquid metal paste for thermal and electrical connections
US5176530 *25 Sep 19915 Jan 1993Minnesota Mining And Manufacturing CompanyMiniature multiple conductor electrical connector
US5186383 *2 Oct 199116 Feb 1993Motorola, Inc.Method for forming solder bump interconnections to a solder-plated circuit trace
US5269453 *8 Oct 199214 Dec 1993Motorola, Inc.Low temperature method for forming solder bump interconnections to a plated circuit trace
US5307983 *27 Apr 19933 May 1994At&T Bell LaboratoriesMethod of making an article comprising solder bump bonding
US5328087 *29 Mar 199312 Jul 1994Microelectronics And Computer Technology CorporationThermally and electrically conductive adhesive material and method of bonding with same
US5346118 *28 Sep 199313 Sep 1994At&T Bell LaboratoriesSurface mount solder assembly of leadless integrated circuit packages to substrates
US5376584 *31 Dec 199227 Dec 1994International Business Machines CorporationProcess of making pad structure for solder ball limiting metallurgy having reduced edge stress
US5391514 *19 Apr 199421 Feb 1995International Business Machines CorporationLow temperature ternary C4 flip chip bonding method
US5394011 *11 Jun 199228 Feb 1995Iwaki Electronics Co. Ltd.Package structure for semiconductor devices and method of manufacturing the same
US5406701 *13 Sep 199318 Apr 1995Irvine Sensors CorporationFabrication of dense parallel solder bump connections
US5411602 *17 Feb 19942 May 1995Microfab Technologies, Inc.Solder compositions and methods of making same
US5419806 *25 Jan 199430 May 1995Siemens AktiengesellschaftMethod for manufacturing a three-dimensional circuit apparatus
US5445308 *22 Jun 199429 Aug 1995Nelson; Richard D.Thermally conductive connection with matrix material and randomly dispersed filler containing liquid metal
US5470787 *2 May 199428 Nov 1995Motorola, Inc.Semiconductor device solder bump having intrinsic potential for forming an extended eutectic region and method for making and using the same
US5473197 *20 May 19945 Dec 1995Kabushiki Kaisha ToshibaSemiconductor device having bump electrodes with a trapezoidal cross-section along one axis
US5473814 *7 Jan 199412 Dec 1995International Business Machines CorporationProcess for surface mounting flip chip carrier modules
US5527734 *24 Sep 199118 Jun 1996U.S. Philips CorporationMethod of manufacturing a semiconductor device by forming pyramid shaped bumps using a stabilizer
US5554940 *5 Jul 199410 Sep 1996Motorola, Inc.Bumped semiconductor device and method for probing the same
US5591941 *28 Oct 19937 Jan 1997International Business Machines CorporationSolder ball interconnected assembly
US5859470 *12 Nov 199212 Jan 1999International Business Machines CorporationInterconnection of a carrier substrate and a semiconductor device
US5877833 *10 Sep 19912 Mar 1999U.S. Philips CorporationInterconnection structure with raised perimeter portions
US5914026 *6 Jan 199722 Jun 1999Implanted Biosystems Inc.Implantable sensor employing an auxiliary electrode
US6077725 *3 Sep 199220 Jun 2000Lucent Technologies IncMethod for assembling multichip modules
US6366794 *19 Nov 19992 Apr 2002The University Of ConnecticutGeneric integrated implantable potentiostat telemetry unit for electrochemical sensors
US6559620 *21 Mar 20016 May 2003Digital Angel CorporationSystem and method for remote monitoring utilizing a rechargeable battery
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7585615 *27 Jul 20068 Sep 2009Intel CorporationComposite photoresist for modifying die-side bumps
US8556157 *23 May 201115 Oct 2013Fujitsu LimitedMethod of manufacturing electronic apparatus, electronic component-mounting board, and method of manufacturing the same
US874004711 Sep 20133 Jun 2014Fujitsu LimitedMethod of manufacturing electronic apparatus, electronic component-mounting board, and method of manufacturing the same
US20080003715 *30 Jun 20063 Jan 2008Lee Kevin JTapered die-side bumps
US20080026318 *27 Jul 200631 Jan 2008Kurt SchultzComposite photoresist for modifying die-side bumps
US20110220398 *23 May 201115 Sep 2011Fujitsu LimitedMethod of manufacturing electronic apparatus, electronic component-mounting board, and method of manufacturing the same
WO2017091989A1 *2 Dec 20158 Jun 2017Shenzhen Xpectvision Technology Co., Ltd.Packaging methods of semiconductor x-ray detectors