US20040079389A1 - Post-chemical mechanical polishing (CMP) cleaning method - Google Patents

Post-chemical mechanical polishing (CMP) cleaning method Download PDF

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Publication number
US20040079389A1
US20040079389A1 US10/610,249 US61024903A US2004079389A1 US 20040079389 A1 US20040079389 A1 US 20040079389A1 US 61024903 A US61024903 A US 61024903A US 2004079389 A1 US2004079389 A1 US 2004079389A1
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nitride
particles
cmp
oxide film
substrate surface
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US10/610,249
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Il Yoon
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SK Hynix Inc
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Hynix Semiconductor Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only

Definitions

  • the present invention relates to a method for forming an isolation region in a silicon substrate using Shallow Trench Isolation (STI), and more particularly, to a post-chemical mechanical polishing (CMP) cleaning method for effectively removing nitride particles produced in a STI-CMP process.
  • STI Shallow Trench Isolation
  • CMP post-chemical mechanical polishing
  • the isolation region has been formed by a LOCOS (local oxidation of silicon) process.
  • LOCOS local oxidation of silicon
  • the isolation region formed by the LOCOS process is disadvantageous in that a bird's beak is formed at its edge portion such that the area of the active region is reduced.
  • a pad oxide film and a pad nitride film are successively formed on a semiconductor substrate, and patterned to expose portions of the substrate, which correspond to an isolation region. Then, the exposed region of the substrate is etched to form a trench.
  • the substrate is subjected to a sacrificial oxidation process to remove damages caused by the substrate etching, and then, a wall oxide film is formed on the surface of the trench.
  • a trench-buried oxide film for example, an oxide film formed by high density plasma chemical vapor deposition (hereinafter, referred to as HDP-oxide film), is deposited on the surface of the substrate in such a manner as to be buried in the trench. Then, the surface of the HDP-oxide film is subjected to chemical mechanical polishing (hereinafter, referred to as CMP) until the pad nitride film is exposed.
  • CMP chemical mechanical polishing
  • the resulting substrate is cleaned, after which the pad nitride film which was used as an etch barrier during the trench etch is removed, thereby completing the formation of an isolation region.
  • CMP of the interlayer insulating film made of an oxide film serves to polish only the oxide film, and thus, upon the subsequent cleaning, has no great connection with the pH of a cleaning solution. In other words, even when a cleaning solution of any pH is used, oxide particles having the same electric polarity as the interlayer insulating film is produced and cannot be stuck again to the interlayer insulating film.
  • materials polished in the STI-CMP process are two materials of the oxide film buried in the trench and the nitride film used as the etch barrier, i.e., the oxide film and the nitride film.
  • these two materials are cleaned with a cleaning solution having a pH of 3-9, they have opposite electric charges, so that there is a great probability that the oxide particles or the nitride particles, produced in CMP, are stuck to the oxide film or the nitride film, respectively. For this reason, badness in the CMP process and also deterioration in device characteristics can occur.
  • DI de-ionized
  • an object of the present invention is to provide a post-CMP cleaning method, which allows the effective removal of the nitride and oxide particles produced in the CMP process.
  • the present invention provides a post-CMP cleaning method for removing residues including nitride particles and oxide particles produced in the chemical mechanical polishing (CMP) of a trench-buried oxide film and a pad oxide film as an etch barrier, which is carried out during a process of forming an isolation region in a silicon substrate using shallow trench isolation (STI), the post-CMP cleaning method comprising cleaning the silicon substrate with a cleaning solution having a pH below 3 or above 9, so that the substrate surface, including the oxide film and the nitride film, has the same electric polarity as that of the nitride and oxide particles such that a repulsive force acts between the substrate surface and the nitride particles and between the substrate surface and the oxide particles, thereby effectively removing the nitride particles and the oxide particles.
  • CMP chemical mechanical polishing
  • the cleaning solution used in the method according to the present invention is maintained at a pH below 3 by the addition of a strong acid solution, such as a HF or HCl solution, or maintained at a pH above 9 by the addition of a basic solution, such as a KOH or NaOH solution.
  • a strong acid solution such as a HF or HCl solution
  • a basic solution such as a KOH or NaOH solution.
  • FIG. 1 is a graph showing the Zeta potential of an oxide film and a nitride film versus pH
  • FIGS. 2A and 2B are cross-sectional views for illustrating a post-CMP cleaning method according to a preferred embodiment of the present invention.
  • FIG. 1 is a graph showing the Zeta potential of an oxide film and a nitride film versus pH.
  • the oxide film such as SiO 2 and TiO 2
  • the nitride film such as Si 3 N 4
  • the oxide film and the nitride film have the same electric polarity in the pH range between 3 and 9.
  • the trench-buried oxide film and the pad nitride film i.e., the oxide film and the nitride film
  • the substrate surface is maintained at the same electric polarity as that of the nitride particles, and at the same time, the substrate surface and the oxide particles are maintained at the same electric polarity. This prevents the nitride particles and the oxide particles from being stuck again to the substrate surface.
  • a cleaning process for removing residues, including the nitride particles and the oxide particles produced by the CMP process is carried out using a cleaning solution maintained at a pH below 3 or above 9.
  • the cleaning solution used in the method according to the present invention is maintained at a pH below 3 by the addition of a strong acid solution, such as a HF or HCl solution, or maintained at a pH above 9 by the addition of a basic solution, such as a KOH or NaOH solution.
  • a cleaning solution having a pH below 3 or above 9 is used in the post-CMP cleaning of a substrate after subjecting a trench-buried oxide film 4 and a nitride film 3 to a CMP process.
  • this cleaning solution the nitride and oxide particles 5 become electrically positive, and at the same time, the substrate surface, including the trench-buried oxide film 4 and the nitride film 3 , becomes electrically positive.
  • the nitride and oxide particles 5 become electrically negative, and at the same time, the substrate surface becomes electrically negative.
  • the substrate surface has the same electric polarity as that of the oxide and nitride particles 5 , so that the re-sticking of the particles 5 to the substrate surface can be prevented because of the repulsive force between the substrate surface and the particles 5 . Accordingly, the nitride particles 5 can be effectively removed to improve STI process reliability and also device characteristics.
  • the reference numerals 1 and 2 designate a silicon substrate and a pad oxide film, respectively.
  • the post-CMP cleaning of the substrate is carried out using the cleaning solution having a pH below 3 or above 9.
  • the substrate surface, including the oxide film and the nitride film has the same electric polarity as that of the nitride and oxide particles.
  • a repulsive force acts between the substrate surface and the particles such that the particles can be effectively removed.

Abstract

Disclosed herein is a post-CMP cleaning method for effectively removing residues, including nitride particles and oxide particles produced in the chemical mechanical polishing (CMP) of a trench-buried oxide film and a pad oxide film as an etch barrier, which is carried out during a process of forming an isolation region in a semiconductor substrate using shallow trench isolation (STI). The post-CMP cleaning method comprises cleaning the substrate with a cleaning solution having a pH below 3 or above 9, so that the substrate surface, including the oxide film and the nitride film, has the same electric polarity as that of the nitride and oxide particles such that a repulsive force acts between the substrate surface and the nitride particles and between the substrate surface and the oxide particles, thereby effectively removing the nitride particles and the oxide particles.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention relates to a method for forming an isolation region in a silicon substrate using Shallow Trench Isolation (STI), and more particularly, to a post-chemical mechanical polishing (CMP) cleaning method for effectively removing nitride particles produced in a STI-CMP process. [0002]
  • 2. Description of the Prior Art [0003]
  • With the advancement of semiconductor technology, the high speed and high integration level of semiconductor devices are rapidly increased, and at the same time, requirements for a fine and precise pattern are gradually increased. These requirements are applied to a pattern formed at an active region in a semiconductor substrate and also to an isolation region, which occupies a relatively large area. [0004]
  • In the prior art, the isolation region has been formed by a LOCOS (local oxidation of silicon) process. However, the isolation region formed by the LOCOS process is disadvantageous in that a bird's beak is formed at its edge portion such that the area of the active region is reduced. [0005]
  • Thus, a method of forming an isolation region using a shallow trench isolation (STI) process as substitute for the LOCOS process was proposed, and the STI process is currently applied to form the isolation region in most of semiconductor devices. [0006]
  • Hereinafter, the method for forming the isolation region in the silicon substrate using the STI process will now be described. [0007]
  • First, a pad oxide film and a pad nitride film are successively formed on a semiconductor substrate, and patterned to expose portions of the substrate, which correspond to an isolation region. Then, the exposed region of the substrate is etched to form a trench. [0008]
  • Thereafter, the substrate is subjected to a sacrificial oxidation process to remove damages caused by the substrate etching, and then, a wall oxide film is formed on the surface of the trench. [0009]
  • Next, a trench-buried oxide film, for example, an oxide film formed by high density plasma chemical vapor deposition (hereinafter, referred to as HDP-oxide film), is deposited on the surface of the substrate in such a manner as to be buried in the trench. Then, the surface of the HDP-oxide film is subjected to chemical mechanical polishing (hereinafter, referred to as CMP) until the pad nitride film is exposed. [0010]
  • Then, the resulting substrate is cleaned, after which the pad nitride film which was used as an etch barrier during the trench etch is removed, thereby completing the formation of an isolation region. [0011]
  • However, the prior method for forming the isolation region using the STI process as described above has the following problems. [0012]
  • Generally, CMP of the interlayer insulating film made of an oxide film serves to polish only the oxide film, and thus, upon the subsequent cleaning, has no great connection with the pH of a cleaning solution. In other words, even when a cleaning solution of any pH is used, oxide particles having the same electric polarity as the interlayer insulating film is produced and cannot be stuck again to the interlayer insulating film. [0013]
  • However, materials polished in the STI-CMP process are two materials of the oxide film buried in the trench and the nitride film used as the etch barrier, i.e., the oxide film and the nitride film. When these two materials are cleaned with a cleaning solution having a pH of 3-9, they have opposite electric charges, so that there is a great probability that the oxide particles or the nitride particles, produced in CMP, are stuck to the oxide film or the nitride film, respectively. For this reason, badness in the CMP process and also deterioration in device characteristics can occur. Particularly, when the polished substrate is cleaned only with highly pure de-ionized (DI) water having a pH below 7, the sticking of the nitride particles to the oxide film can become a serious problem. [0014]
    • SUMMARY OF THE INVENTION
  • Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and an object of the present invention is to provide a post-CMP cleaning method, which allows the effective removal of the nitride and oxide particles produced in the CMP process. [0015]
  • To achieve the above object, the present invention provides a post-CMP cleaning method for removing residues including nitride particles and oxide particles produced in the chemical mechanical polishing (CMP) of a trench-buried oxide film and a pad oxide film as an etch barrier, which is carried out during a process of forming an isolation region in a silicon substrate using shallow trench isolation (STI), the post-CMP cleaning method comprising cleaning the silicon substrate with a cleaning solution having a pH below 3 or above 9, so that the substrate surface, including the oxide film and the nitride film, has the same electric polarity as that of the nitride and oxide particles such that a repulsive force acts between the substrate surface and the nitride particles and between the substrate surface and the oxide particles, thereby effectively removing the nitride particles and the oxide particles. [0016]
  • Preferably, the cleaning solution used in the method according to the present invention is maintained at a pH below 3 by the addition of a strong acid solution, such as a HF or HCl solution, or maintained at a pH above 9 by the addition of a basic solution, such as a KOH or NaOH solution.[0017]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: [0018]
  • FIG. 1 is a graph showing the Zeta potential of an oxide film and a nitride film versus pH; and [0019]
  • FIGS. 2A and 2B are cross-sectional views for illustrating a post-CMP cleaning method according to a preferred embodiment of the present invention.[0020]
    • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • FIG. 1 is a graph showing the Zeta potential of an oxide film and a nitride film versus pH. As shown in FIG. 1, the oxide film, such as SiO[0021] 2 and TiO2, is electrically negative at a pH above 3, and electrically positive at a pH below 3. The nitride film, such as Si3N4, is electrically positive at a pH below 9, and electrically negative at a pH above 9. On the other hand, the oxide film and the nitride film have the same electric polarity in the pH range between 3 and 9.
  • Thus, according to the present invention, the trench-buried oxide film and the pad nitride film, i.e., the oxide film and the nitride film, is maintained at a pH between 3 and 9. More concretely, according to the present invention, the substrate surface, including the oxide film and the nitride film, is maintained at the same electric polarity as that of the nitride particles, and at the same time, the substrate surface and the oxide particles are maintained at the same electric polarity. This prevents the nitride particles and the oxide particles from being stuck again to the substrate surface. [0022]
  • For this purpose, according to the present invention, after CMP of the trench-buried oxide film and the pad nitride film, a cleaning process for removing residues, including the nitride particles and the oxide particles produced by the CMP process, is carried out using a cleaning solution maintained at a pH below 3 or above 9. In this case, the cleaning solution used in the method according to the present invention is maintained at a pH below 3 by the addition of a strong acid solution, such as a HF or HCl solution, or maintained at a pH above 9 by the addition of a basic solution, such as a KOH or NaOH solution. [0023]
  • As shown in FIGS. 2A and 2B, according to the present invention, a cleaning solution having a pH below 3 or above 9 is used in the post-CMP cleaning of a substrate after subjecting a trench-buried [0024] oxide film 4 and a nitride film 3 to a CMP process. By the use of this cleaning solution, the nitride and oxide particles 5 become electrically positive, and at the same time, the substrate surface, including the trench-buried oxide film 4 and the nitride film 3, becomes electrically positive. Alternatively, the nitride and oxide particles 5 become electrically negative, and at the same time, the substrate surface becomes electrically negative.
  • Thus, the substrate surface has the same electric polarity as that of the oxide and [0025] nitride particles 5, so that the re-sticking of the particles 5 to the substrate surface can be prevented because of the repulsive force between the substrate surface and the particles 5. Accordingly, the nitride particles 5 can be effectively removed to improve STI process reliability and also device characteristics.
  • In FIGS. 2A and 2B, the [0026] reference numerals 1 and 2 designate a silicon substrate and a pad oxide film, respectively.
  • As described above, according to the present invention, in order to remove residues, including the nitride and oxide particles produced in the CMP process, the post-CMP cleaning of the substrate is carried out using the cleaning solution having a pH below 3 or above 9. For this reason, the substrate surface, including the oxide film and the nitride film, has the same electric polarity as that of the nitride and oxide particles. Thus, a repulsive force acts between the substrate surface and the particles such that the particles can be effectively removed. [0027]
  • As a result, the reliability of the STI process including the CMP process can be ensured, and device characteristics can be improved. [0028]
  • Although a preferred embodiment of the present invention has been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims. [0029]

Claims (3)

What is claimed is:
1. A post-CMP cleaning method for removing residues, including nitride particles and oxide particles produced in the chemical mechanical polishing (CMP) of a trench-buried oxide film and a pad oxide film as an etch barrier, which is carried out during a process of forming an isolation region in a semiconductor substrate using shallow trench isolation (STI),
the post-CMP cleaning method comprising cleaning the substrate with a cleaning solution having a pH below 3 or above 9, so that the substrate surface, including the oxide film and the nitride film, has the same electric polarity as that of the nitride and oxide particles such that a repulsive force acts between the substrate surface and the nitride particles and between the substrate surface and the oxide particles, thereby effectively removing the nitride particles and the oxide particles.
2. The method of claim 1, wherein the cleaning solution is maintained at a pH below 3 by the addition of a HF or HCl solution.
3. The method of claim 1, wherein the cleaning solution is maintained at a pH above 9 by the addition of a KOH or NaOH solution.
US10/610,249 2002-10-24 2003-06-30 Post-chemical mechanical polishing (CMP) cleaning method Abandoned US20040079389A1 (en)

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KR1020020065080A KR20040036754A (en) 2002-10-24 2002-10-24 Cleaning step in chemical mechanical polishing process
KR2002-65080 2002-10-24

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5950645A (en) * 1993-10-20 1999-09-14 Verteq, Inc. Semiconductor wafer cleaning system
US6098638A (en) * 1995-12-27 2000-08-08 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device and an apparatus for manufacturing the same
US20020022372A1 (en) * 2000-08-17 2002-02-21 Ching-Yu Chang Method for reducing micro-particle adsorption effects

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0684866A (en) * 1992-09-04 1994-03-25 Hitachi Ltd Prevention of adhesion of foreign matters
US6593282B1 (en) * 1997-10-21 2003-07-15 Lam Research Corporation Cleaning solutions for semiconductor substrates after polishing of copper film
JPH11162907A (en) * 1997-11-27 1999-06-18 Hitachi Ltd Cleaning method
KR19990048785A (en) * 1997-12-10 1999-07-05 김영환 Method of Cleaning Semiconductor Devices
KR20030005777A (en) * 2001-07-10 2003-01-23 삼성전자 주식회사 Semiconductor cleaning process using electrolytic ionized water and diluted HF solution at the same time

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5950645A (en) * 1993-10-20 1999-09-14 Verteq, Inc. Semiconductor wafer cleaning system
US6158445A (en) * 1993-10-20 2000-12-12 Olesen; Michael B. Semiconductor wafer cleaning method
US6378534B1 (en) * 1993-10-20 2002-04-30 Verteq, Inc. Semiconductor wafer cleaning system
US6098638A (en) * 1995-12-27 2000-08-08 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device and an apparatus for manufacturing the same
US20020022372A1 (en) * 2000-08-17 2002-02-21 Ching-Yu Chang Method for reducing micro-particle adsorption effects

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