US20040040856A1 - Method for making plastic packages - Google Patents

Method for making plastic packages Download PDF

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Publication number
US20040040856A1
US20040040856A1 US10/421,225 US42122503A US2004040856A1 US 20040040856 A1 US20040040856 A1 US 20040040856A1 US 42122503 A US42122503 A US 42122503A US 2004040856 A1 US2004040856 A1 US 2004040856A1
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United States
Prior art keywords
plating film
plating
film
electroless
connection pad
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US10/421,225
Inventor
Akihiro Hamano
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Sumitomo Metal SMI Electronics Device Inc
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Sumitomo Metal SMI Electronics Device Inc
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Assigned to SUMITOMO METAL ELECTRONICS DEVICES INC. reassignment SUMITOMO METAL ELECTRONICS DEVICES INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HAMANO, AKIHIRO
Publication of US20040040856A1 publication Critical patent/US20040040856A1/en
Assigned to SUMITOMO METAL (SMI) ELECTRONICS DEVICES INC. reassignment SUMITOMO METAL (SMI) ELECTRONICS DEVICES INC. CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: HAMANO, AKIHIRO
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/243Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • C25D17/10Electrodes, e.g. composition, counter electrode
    • C25D17/12Shape or form
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • C25D5/022Electroplating of selected surface areas using masking means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/099Coating over pads, e.g. solder resist partly over pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist
    • H05K2203/0574Stacked resist layers used for different processes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1152Replicating the surface structure of a sacrificial layer, e.g. for roughening
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal

Definitions

  • the present invention relates to a method for making plastic packages used to mount semiconductor elements. More specifically, the present invention relates to a method for making plastic packages including a circuit pattern formed by etching on one or both sides of a resin substrate, an external terminal connection pad, and a semiconductor element connection pad.
  • plastic packages such as BGA (Ball Grid Array) packages, flip-chip packages, and the like are often being used due to considerations such as the greater number of terminals used for external connections, the ease of mounting semiconductor elements, the need to reduce costs, heat release properties, and the need to lower impedance.
  • BGA Ball Grid Array
  • plastic packages examples include: cavity-down type packages with a heat slug, in which a Cu foil is bonded on one or both surfaces of the substrate to form conductor surfaces, with the substrate being a single- or multi-layer, heat-resistant copper-clad resin substrate formed from a BT resin (resin having bismaleimide-triazine as its main component) or polyimide resin or the like; direct molding type packages; packages in which semiconductor elements are directly connected, and the like. Then, the plastic package is plated using electrolytic plating, thus making a plating tie bar unnecessary and improving electrical properties and facilitating higher circuit densities.
  • FIGS. 6 (A)-(C) and FIGS. 7 (A),(B) a method for making a conventional plastic package 50 that does not require a plating tie bar will be described.
  • a resin substrate 51 to which a Cu foil 52 is bonded is formed with a through-hole 53 that provides continuity between the front and back surfaces.
  • An electroless Cu plating film is formed on the front and back surfaces and the wall of the through-hole 53 .
  • an electrolytic Cu plating film continuous with this electroless Cu plating film is formed, resulting in a Cu plating film 54 .
  • a dry film is applied to this Cu plating film 54 , a pattern mask is placed, and this is then exposed and developed to perform photolithography, resulting in a resist pattern 55 .
  • electricity is passed through the Cu plating film 54 exposed from the openings in the plating resist pattern 55 in order to form an Ni and Au plating film 56 through electrolytic plating on the sections forming the semiconductor element connection pad 59 , the external terminal connection pad 58 , and the circuit pattern 57 , including the walls of the through-hole 53 .
  • the plating resist pattern 55 formed from a dry film on the Cu plating film 54 is peeled away by swelling the dry film through the application of a stripping reagent.
  • the Cu plating film 54 and the Cu foil 52 exposed from the Ni and Au plating film 56 is dissolved and removed through etching, with the Ni and Au plating film 56 serving as the etching resist pattern. This results in the circuit pattern 57 , the external terminal connection pad 58 , and the semiconductor element connection pad 59 .
  • a solder resist film 60 formed with openings that expose the external terminal connection pad 58 and the semiconductor element connection pad 59 , is bonded to the surface of the resin substrate 51 .
  • the circuit pattern 57 , the external terminal connection pad 58 , and the semiconductor element connection pad 59 are formed by using the Ni and Au plating film 56 as an etching resist pattern and dissolving and etching away the Cu plating film 54 and Cu foil 52 exposed from the etching resist pattern. Since the Cu plating film 54 and the Cu foil 52 are thick, the etching takes time, leading to undercutting of the lower sections of the Ni and Au plating film 56 . This results in reduced reliability.
  • the object of the present invention is to overcome these problems and to provide a method for making plastic packages that uses electrolytic plating while not requiring a plating tie bar, that provides improved bonding strength with a solder resist film, that minimizes undercutting during etching, and that improves circuit density, reliability, and yield.
  • the present invention provides a method for making plastic packages wherein a resin substrate to which a Cu foil is bonded on one and/or both sides is used and on the one and/or both sides is disposed a circuit pattern, an external terminal connection pad, and a semiconductor element connection pad.
  • the method for making plastic packages of the present invention comprises: etching away the Cu foil formed on a side of the resin substrate and then forming an electroless Cu plating film on the surface of the resin substrate on which the Cu foil is formed; forming a first plating resist pattern on a surface of the electroless Cu plating film and passing electricity through the electroless Cu plating film and forming an electrolytic Cu plating film on a surface of the electroless Cu plating film not covered by the first plating resist pattern; forming a second plating resist pattern on a surface of the electrolytic Cu plating film to serve as the circuit pattern, passing electricity through the electroless Cu plating film, and using electrolytic plating to form on a surface of the electrolytic Cu plating film not covered by the second plating resist pattern, the external terminal connection pad, and the semiconductor element connection pad upon which an Ni and Au plating film is disposed; removing the first and the second resist patterns and etching away the electroless Cu plating film not covered by the Ni and Au plating film or the electrolytic Cu plating film; and
  • the surface of the resin substrate has an appropriate surface roughness after the Cu foil has been removed.
  • the electroless Cu plating film is formed with a high bonding strength.
  • the electroless Cu plating film is formed thin so that it can be easily etched without the forming of overhangs as a result of undercutting. This allows high-density, fine pattern circuits to be easily formed with good yields.
  • the solder resist film is not bonded on the Ni and Au plating film. This allows the solder resist film to be firmly bonded to the resin substrate and the circuit pattern, which is formed from the Cu plating film having an appropriate surface roughness.
  • solder resist film on the circuit pattern and also to form the solder resist film on the periphery of the external terminal connection pad.
  • the bonding area can be restricted when a solder ball is bonded to the external terminal connection pad.
  • the external terminal connection pad can be prevented from peeling away from the resin substrate even if thermal stress is generated when a solder ball is being connected.
  • solder resist film on the circuit pattern and also to form the solder resist film on the periphery of the external terminal connection pad and the semiconductor element connection pad.
  • This allows the bonding area to be restricted, e.g., when a semiconductor element is to be connected using the flip-chip method to the semiconductor element connection pad.
  • the bonding area can be restricted when a solder ball is connected to the external terminal connection pad.
  • the external terminal connection pad can be prevented from peeling away from the resin substrate even if thermal stress is generated when a solder ball is being connected.
  • FIGS. 1 (A)-(C) are cross-section drawings showing steps of a method for making plastic packages according to an embodiment of the present invention
  • FIGS. 2 (A),(B) are cross-section drawings showing steps of a method for making plastic packages according to an embodiment of the present invention
  • FIGS. 3 (A),(B) are cross-section drawings showing steps of a method for making plastic packages according to an embodiment of the present invention
  • FIGS. 4 (A)-(C) are cross-section drawings showing steps of a method for making plastic packages according to an embodiment of the present invention.
  • FIGS. 5 (A),(B) are drawings showing a step of the method for making plastic packages according to an embodiment of the present invention.
  • FIGS. 6 (A)-(C) are drawings showing steps of a conventional method for making plastic packages.
  • FIGS. 7 (A),(B) are drawings showing steps of a conventional method for making plastic packages.
  • FIGS. 1 (A)-(C) are cross-section drawings showing portions of the method for making plastic packages according to an embodiment of the present invention.
  • FIGS. 2 (A),(B) are cross-section drawings showing portions of the same method for making plastic packages.
  • FIGS. 3 (A),(B) are cross-section drawings showing portions of the same method for making plastic packages.
  • FIGS. 4 (A)-(C) are cross-section drawings showing portions of the same method for making plastic packages.
  • FIGS. 5 (A),(B) are drawings for the purpose of describing a portion of the same method for making plastic packages.
  • a resin substrate 11 is formed, for example, from a single- or multi-layer resin base material having good heat resistance, dielectric characteristics, insulative characteristics, and processing characteristics, e.g., BT resin (resin having bismaleimide-triazine as its main component) or polyimide resin or the like.
  • a Cu foil 12 is bonded on one or both sides of the base material. If a conductor pattern is to be formed on both sides of the resin substrate 11 , a drill machine, punching machine, or the like is used to form a plurality of through-holes 13 for allowing continuity between the top and bottom sides.
  • the Cu foil 12 formed on the resin substrate 11 is etched, e.g., using an FeCl 3 solution.
  • a catalyst such as palladium is applied to the entire top and bottom sides of the resin substrate 11 as well as the side walls of the through holes 13 .
  • a caustic alkali bath with formalin as a reducing agent is used to form an electroless Cu plating film 14 having a thickness of approximately one-tenth that of the Cu foil 12 .
  • the electroless Cu plating films 14 formed on the top side and bottom side of the resin substrate 11 are electrically connected by the electroless Cu plating film 14 formed on the through-holes 13 .
  • a dry film having an acrylic resin as its main component is adhesed to the surface of the electroless Cu plating film 14 in order to photolithographically form a first plating resist pattern 15 on the surface of the electroless Cu plating film 14 .
  • a pattern mask formed as an inverse pattern of the conductor pattern i.e., a circuit pattern 16 , external terminal connection pads 17 , and semiconductor element connection pads 18 , is applied to the dry film and exposed and developed, leaving behind a dry film in the shape of the inverse pattern. Curing is then performed to form the first plating resist pattern 15 .
  • the resin substrate 11 is, e.g., immersed in a plating solution, e.g, a copper sulfate bath or a pyrophosphate bath, and electricity is passed through the electroless Cu plating film 14 .
  • This electroplating operation forms the electrolytic Cu plating film 19 .
  • a second plating resist pattern 20 is formed using photolithography on the surface of the electrolytic Cu plating film 19 and the surface of the first plating resist pattern 15 .
  • a dry film having acrylic resin as its main component is applied.
  • a pattern mask is applied so that the surface of the electrolytic Cu plating film 19 is covered for the circuit pattern 16 while the surface of the electrolytic Cu plating film 19 for the external terminal connection pads 17 and the semiconductor element connection pads 18 are exposed from the openings. This is then exposed and developed so that the dry film forms a pattern. Curing is then performed to form the second plating resist pattern 20 .
  • an electrolytic Ni plating film can first be formed by immersing the resin substrate in a plating solution, e.g., a sulfamic acid bath, and electricity can be passed through the electroless Cu plating 14 . Then, electrolytic plating is performed to form an electrolytic Au plating film on the electrolytic Ni plating film.
  • a plating solution e.g., a sulfamic acid bath
  • the resin substrate 11 on which the electrolytic Ni plating film has been formed is immersed in a plating solution in a hard gold plating bath and electricity is passed through the electroless Cu plating film 14 .
  • an Ni and Au plating film 21 is formed on the external terminal connection pads 17 and the semiconductor element connection pads 18 .
  • the dry film used in the first and the second plating resist patterns 15 , 20 is, for example, an alkali-soluble type
  • the dry film is made to swell and stripped from the resin substrate 11 by spraying the resin substrate 11 with an aqueous solution of 3% NaOH at a temperature of 50° C. or by immersing the resin substrate 11 in an aqueous NaOH solution.
  • the resin substrate 11 is then washed and dried.
  • the resin substrate 11 is formed with a circuit pattern 16 , in which the electrolytic Cu plating film 19 is formed on sections of the electroless Cu plating film 14 .
  • the external terminal connection pads 17 and the semiconductor element connection pads 18 are formed from electrolytic Cu plating film 19 disposed on sections of the electroless Cu plating film 14 , with Ni and Au plating film 21 being formed on the electrolytic Cu plating film 19 .
  • etching is performed to remove sections of the electroless Cu plating film 14 that are not covered by the electrolytic Cu plating film 19 forming the circuit pattern 16 and the Ni and Au plating film 21 forming the external terminal connection pad 17 and the semiconductor element connection pad 18 .
  • the etching solution it would be preferable for the etching solution to be a type that etches only the electroless Cu plating film 14 without etching the electrolytic Cu plating film 19 and the Ni and Au plating film 21 .
  • the electroless Cu plating film 14 is formed much thinner than the electrolytic Cu plating film 19 and the Ni and Au plating film 21 , it would also be possible to use a soft etchant such as a mixture of hydrogen peroxide and sulfuric acid or the like or sodium persulfate. With this etching operation, there is almost no etching that takes place of the surface of the Ni and Au plating film 21 , with slight etching of the surface of the electrolytic Cu plating film 19 . However, since these are thicker than the thickness of the electroless Cu plating film 14 , the pattern shape can be maintained.
  • a soft etchant such as a mixture of hydrogen peroxide and sulfuric acid or the like or sodium persulfate.
  • This etching operation results in the separately formed patterns of the circuit pattern 16 , formed from the electroless Cu plating film 14 and the electrolytic Cu plating film 19 , and the external terminal connection pads 17 and the semiconductor element connection pads 18 , formed from the electroless plating film 14 and the electrolytic Cu plating film 19 and the Ni and Au plating film 21 .
  • a solder resist film 22 serves to cover the circuit pattern 16 while exposing the external terminal connection pads 17 and the semiconductor element connection pads 18 .
  • a solder resist paste is used to screen-print the entire surface of the resin substrate 11 , and a pattern mask is mounted so that openings are formed at the external terminal connection pads 17 and the semiconductor element connection pads 18 .
  • Photolithography is then performed to expose and develop the pattern. This results in the plastic package 10 formed with the solder resist film 22 , which covers the circuit pattern 16 with a high strength of adhesive bonding while forming openings at the external terminal connection pads 17 and the semiconductor element connection pads 18 .
  • the plastic package 10 is a BGA of an advanced heat dissipation package formed by disposing the external terminal connection pads 17 and the semiconductor element connection pads 18 on one side of the resin substrate 11 and bonding a heat spreader plate formed from a Cu plate or the like on the opposite side. Then, after the solder resist film 22 is formed on the resin substrate 11 , an essentially central section of the resin substrate 11 is cut out. The heat spreader plate is then bonded to the resin substrate 11 so that a cavity for mounting a semiconductor element is formed.
  • solder resist film 22 As shown in FIGS. 5 (A),(B), in the above method for making the plastic package 10 according to an embodiment of the present invention, in addition to forming the solder resist film 22 on the surface of the circuit pattern 16 , it would be preferable to also form the solder resist film 22 on the periphery of the external terminal connection pads 17 , which are formed from the electroless Cu plating film 14 , the electrolytic Cu plating film 19 , and the Ni and Au plating film 21 . As a result, the external terminal connection pad 17 is prevented from peeling away from the resin substrate 11 even if thermal stress is generated when a solder ball is bonded to the external terminal connection pad 17 . Also, since the bonding area for bonding a solder ball can be restricted, it is possible to provide control melting to a predetermined extent and essentially identical heights for solder balls, thus allowing reliable mounting to the board.
  • solder resist film 22 in addition to forming the solder resist film 22 on the surface of the circuit pattern 16 , it would be preferable to also form the solder resist film 22 on the periphery of the external terminal connection pads 17 and the semiconductor element connection pads 18 , which are formed from the electroless Cu plating film 14 , the electrolytic Cu plating film 19 , and the Ni and Au plating film 21 .
  • the bonding strength of the semiconductor element connection pads 18 to the resin substrate 11 can be increased.
  • the positions of the bonding pads of the semiconductor element can be accurately aligned with the bonding positions.
  • the electroless Cu plating film 14 serves as a plating tie bar. This allows the Ni and Au plating film 21 to be easily formed on the external terminal connection pads 17 and the semiconductor connection pads 18 without requiring a special plating tie bar. Also, the electroless Cu plating film 14 is much thinner than the Cu foil 12 or the electrolytic Cu plating film 19 , easing significantly the etching of the electroless Cu plating film 14 for pattern formation. Also, undercutting can be almost completely eliminated. This makes it easy to provide higher densities and pattern precision for the circuit pattern 16 , the external terminal connection pads 17 , and the semiconductor element connection pads 18 .
  • plating tie bars are not needed, electrical reflections caused by a plating tie bar are eliminated, and electrical characteristics can be improved.
  • the Ni and Au plating film 21 is formed from electrolytic plating, a high degree of adhesion strength is provided that is adequate for wire bonding, flip-chip bonding, and solder ball bonding. Furthermore, the Ni and Au plating film 21 is not present on the circuit pattern 16 , a high bonding strength with the solder resist film 22 can be provided.
  • the amount of etching performed on the electrolytic Cu plating film 19 can be low, and the electroless Cu plating film 14 can be etched efficiently without dissolving the Au plating film. Also, these soft etchants can be easily handled and disposed.
  • the method for making plastic packages according to the present invention comprises: etching away the Cu foil formed on a side of the resin substrate and then forming an electroless Cu plating film on the surface of the resin substrate on which the Cu foil is formed; forming a first plating resist pattern on a surface of the electroless Cu plating film and passing electricity through the electroless Cu plating film and forming an electrolytic Cu plating film on a surface of the electroless Cu plating film not covered by the first plating resist pattern; forming a second plating resist pattern on a surface of the electrolytic Cu plating film to serve as the circuit pattern, passing electricity through the electroless Cu plating film, and using electrolytic plating to form on a surface of the electrolytic Cu plating film not covered by the second plating resist pattern, the external terminal connection pad, and the semiconductor element connection pad upon which an Ni and Au plating film is disposed; removing the first and the second resist patterns and etching away the electroless Cu plating film not covered by the Ni and Au plating film or the electrolytic Cu plating
  • the resin substrate surface has an appropriate surface roughness.
  • the electroless Cu plating film can be formed thin with high bonding strength.
  • the Ni and Au plating film and the electrolytic Cu plating film can be easily etched with an etching resist pattern, allowing removal without the formation of overhangs as a result of undercutting.
  • a circuit with a high-density, fine pattern can be easily formed with a good yield.
  • the solder resist film is not bonded on the Ni and Au plating film. This makes it possible to firmly bond the solder resist film to the resin substrate and the circuit pattern, which is formed from the Cu plating film having appropriate surface roughness.
  • the solder resist film is formed on a surface of the circuit pattern and the solder resist film extends over the periphery of either the external terminal connection pad or the external terminal connection pad and the semiconductor element connection pad.
  • the bonding area of the semiconductor element connection pad and the external terminal connection pad can be restricted, and semiconductor elements and solder balls can be accurately bonded.
  • peeling away of the external connection pad from the resin substrate is prevented even if thermal stress is generated when a solder ball is being connected to the external terminal connection pad.

Abstract

The method for making plastic packages of the present invention includes: forming an electroless Cu plating film on a resin substrate after removing a Cu foil; disposing a first plating resist pattern thereupon, passing electricity through the electroless Cu plating film, and disposing an electrolytic Cu plating film where the pattern is absent; disposing a second plating resist pattern to form a circuit pattern, and disposing a Ni and Au plating film; removing the plating resist pattern and etching away the Ni and Au plating film and the electroless Cu plating film not covered by the electrolytic Cu plating film; and disposing a solder resist film with openings to expose an external terminal connection pad and a semiconductor element connection pad. This method provides superior bonding properties with a solder resist, reduces undercutting during etching, allows use of high-density circuits, provides high reliability, and improves yield.

Description

    FIELD OF THE INVENTION
  • The present invention relates to a method for making plastic packages used to mount semiconductor elements. More specifically, the present invention relates to a method for making plastic packages including a circuit pattern formed by etching on one or both sides of a resin substrate, an external terminal connection pad, and a semiconductor element connection pad. [0001]
  • BACKGROUND OF THE INVENTION
  • With the performance improvements and greater compactness in semiconductor elements in recent years, plastic packages such as BGA (Ball Grid Array) packages, flip-chip packages, and the like are often being used due to considerations such as the greater number of terminals used for external connections, the ease of mounting semiconductor elements, the need to reduce costs, heat release properties, and the need to lower impedance. Examples of these plastic packages include: cavity-down type packages with a heat slug, in which a Cu foil is bonded on one or both surfaces of the substrate to form conductor surfaces, with the substrate being a single- or multi-layer, heat-resistant copper-clad resin substrate formed from a BT resin (resin having bismaleimide-triazine as its main component) or polyimide resin or the like; direct molding type packages; packages in which semiconductor elements are directly connected, and the like. Then, the plastic package is plated using electrolytic plating, thus making a plating tie bar unnecessary and improving electrical properties and facilitating higher circuit densities. [0002]
  • Referring to FIGS. [0003] 6(A)-(C) and FIGS. 7(A),(B), a method for making a conventional plastic package 50 that does not require a plating tie bar will be described. As shown in FIG. 6(A), a resin substrate 51 to which a Cu foil 52 is bonded is formed with a through-hole 53 that provides continuity between the front and back surfaces. An electroless Cu plating film is formed on the front and back surfaces and the wall of the through-hole 53. Then, an electrolytic Cu plating film continuous with this electroless Cu plating film is formed, resulting in a Cu plating film 54. A dry film is applied to this Cu plating film 54, a pattern mask is placed, and this is then exposed and developed to perform photolithography, resulting in a resist pattern 55. Next, as shown in FIG. 6(B), electricity is passed through the Cu plating film 54 exposed from the openings in the plating resist pattern 55 in order to form an Ni and Au plating film 56 through electrolytic plating on the sections forming the semiconductor element connection pad 59, the external terminal connection pad 58, and the circuit pattern 57, including the walls of the through-hole 53. Next, as shown in FIG. 6(C), the plating resist pattern 55 formed from a dry film on the Cu plating film 54 is peeled away by swelling the dry film through the application of a stripping reagent.
  • Next, as shown in FIG. 7(A), the [0004] Cu plating film 54 and the Cu foil 52 exposed from the Ni and Au plating film 56 is dissolved and removed through etching, with the Ni and Au plating film 56 serving as the etching resist pattern. This results in the circuit pattern 57, the external terminal connection pad 58, and the semiconductor element connection pad 59. Next, as shown in FIG. 7(B), a solder resist film 60, formed with openings that expose the external terminal connection pad 58 and the semiconductor element connection pad 59, is bonded to the surface of the resin substrate 51.
  • However, in the conventional method for making plastic packages described above, the following problems are left unsolved. [0005]
  • (1) Because of low bonding strength on the bonding surface, the bonding between the solder resist [0006] film 60 and the circuit pattern 57 on which the Ni and Au plating film 56 is formed tends to lead to delamination at the boundary between the Au plating surface and the solder resist film 60, thus lowering reliability.
  • (2) The [0007] circuit pattern 57, the external terminal connection pad 58, and the semiconductor element connection pad 59 are formed by using the Ni and Au plating film 56 as an etching resist pattern and dissolving and etching away the Cu plating film 54 and Cu foil 52 exposed from the etching resist pattern. Since the Cu plating film 54 and the Cu foil 52 are thick, the etching takes time, leading to undercutting of the lower sections of the Ni and Au plating film 56. This results in reduced reliability.
  • (3) As etching proceeds, projecting overhangs (when considered from a cross-section view) of the etching resist pattern of the Ni and Au plating film [0008] 56 are formed. This obstructs the flow of etching solution between adjacent etching resist patterns, making fine patterns difficult.
  • (4) If the Ni and Au plating film [0009] 56 etching resist pattern forms an overhang, the bonding area between the Ni and Au plating film 56 and the Cu plating film 54 and the Cu foil 52 is reduced, allowing the Ni and Au plating film 56 to disengage from the Cu plating film 54 and Cu foil 52. This leads to a reduction in yield for the plastic package 50.
  • OBJECTS AND SUMMARY OF THE INVENTION
  • The object of the present invention is to overcome these problems and to provide a method for making plastic packages that uses electrolytic plating while not requiring a plating tie bar, that provides improved bonding strength with a solder resist film, that minimizes undercutting during etching, and that improves circuit density, reliability, and yield. [0010]
  • In order to achieve the object described above, the present invention provides a method for making plastic packages wherein a resin substrate to which a Cu foil is bonded on one and/or both sides is used and on the one and/or both sides is disposed a circuit pattern, an external terminal connection pad, and a semiconductor element connection pad. The method for making plastic packages of the present invention comprises: etching away the Cu foil formed on a side of the resin substrate and then forming an electroless Cu plating film on the surface of the resin substrate on which the Cu foil is formed; forming a first plating resist pattern on a surface of the electroless Cu plating film and passing electricity through the electroless Cu plating film and forming an electrolytic Cu plating film on a surface of the electroless Cu plating film not covered by the first plating resist pattern; forming a second plating resist pattern on a surface of the electrolytic Cu plating film to serve as the circuit pattern, passing electricity through the electroless Cu plating film, and using electrolytic plating to form on a surface of the electrolytic Cu plating film not covered by the second plating resist pattern, the external terminal connection pad, and the semiconductor element connection pad upon which an Ni and Au plating film is disposed; removing the first and the second resist patterns and etching away the electroless Cu plating film not covered by the Ni and Au plating film or the electrolytic Cu plating film; and forming a solder resist film covering the circuit pattern while exposing the external terminal connection pad and the semiconductor element connection pad. As a result, the surface of the resin substrate has an appropriate surface roughness after the Cu foil has been removed. This allows the electroless Cu plating film to be formed with a high bonding strength. Also, the electroless Cu plating film is formed thin so that it can be easily etched without the forming of overhangs as a result of undercutting. This allows high-density, fine pattern circuits to be easily formed with good yields. Furthermore, the solder resist film is not bonded on the Ni and Au plating film. This allows the solder resist film to be firmly bonded to the resin substrate and the circuit pattern, which is formed from the Cu plating film having an appropriate surface roughness. [0011]
  • It would be preferable to form the solder resist film on the circuit pattern and also to form the solder resist film on the periphery of the external terminal connection pad. As a result, the bonding area can be restricted when a solder ball is bonded to the external terminal connection pad. Also, the external terminal connection pad can be prevented from peeling away from the resin substrate even if thermal stress is generated when a solder ball is being connected. [0012]
  • It would also be preferable to form the solder resist film on the circuit pattern and also to form the solder resist film on the periphery of the external terminal connection pad and the semiconductor element connection pad. This allows the bonding area to be restricted, e.g., when a semiconductor element is to be connected using the flip-chip method to the semiconductor element connection pad. Also, the bonding area can be restricted when a solder ball is connected to the external terminal connection pad. Furthermore, the external terminal connection pad can be prevented from peeling away from the resin substrate even if thermal stress is generated when a solder ball is being connected. [0013]
  • The above, and other objects, features and advantages of the present invention will become apparent from the following description read in conjunction with the accompanying drawings, in which like reference numerals designate the same elements.[0014]
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIGS. [0015] 1(A)-(C) are cross-section drawings showing steps of a method for making plastic packages according to an embodiment of the present invention;
  • FIGS. [0016] 2(A),(B) are cross-section drawings showing steps of a method for making plastic packages according to an embodiment of the present invention;
  • FIGS. [0017] 3(A),(B) are cross-section drawings showing steps of a method for making plastic packages according to an embodiment of the present invention;
  • FIGS. [0018] 4(A)-(C) are cross-section drawings showing steps of a method for making plastic packages according to an embodiment of the present invention;
  • FIGS. [0019] 5(A),(B) are drawings showing a step of the method for making plastic packages according to an embodiment of the present invention;
  • FIGS. [0020] 6(A)-(C) are drawings showing steps of a conventional method for making plastic packages; and
  • FIGS. [0021] 7(A),(B) are drawings showing steps of a conventional method for making plastic packages.
  • LIST OF DESIGNATORS
  • [0022] 10: plastic package; 11: resin substrate; 12: Cu foil; 13: through-hole; 14: electroless Cu plating film; 15: first plating resist pattern; 16: circuit pattern; 17: external terminal connection pad; 18: semiconductor element connection pad; 19: electrolytic Cu plating film; 20: second plating resist pattern; 21: Ni and Au plating film; 22: solder resist film
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Next, the embodiments of the present invention will be described with references to the drawings to contribute to an understanding of the present invention. [0023]
  • FIGS. [0024] 1(A)-(C) are cross-section drawings showing portions of the method for making plastic packages according to an embodiment of the present invention. FIGS. 2(A),(B) are cross-section drawings showing portions of the same method for making plastic packages. FIGS. 3(A),(B) are cross-section drawings showing portions of the same method for making plastic packages. FIGS. 4(A)-(C) are cross-section drawings showing portions of the same method for making plastic packages. FIGS. 5(A),(B) are drawings for the purpose of describing a portion of the same method for making plastic packages.
  • A method for making a [0025] plastic package 10 according to an embodiment of the present invention will be described, with references to FIG. 1 through FIG. 5.
  • Referring to FIG. 1(A), a resin substrate [0026] 11 is formed, for example, from a single- or multi-layer resin base material having good heat resistance, dielectric characteristics, insulative characteristics, and processing characteristics, e.g., BT resin (resin having bismaleimide-triazine as its main component) or polyimide resin or the like. A Cu foil 12 is bonded on one or both sides of the base material. If a conductor pattern is to be formed on both sides of the resin substrate 11, a drill machine, punching machine, or the like is used to form a plurality of through-holes 13 for allowing continuity between the top and bottom sides.
  • Next, as shown in FIG. 1(B), the Cu foil [0027] 12 formed on the resin substrate 11 is etched, e.g., using an FeCl3 solution. Next, as shown in FIG. 1(C), a catalyst such as palladium is applied to the entire top and bottom sides of the resin substrate 11 as well as the side walls of the through holes 13. Then, a caustic alkali bath with formalin as a reducing agent is used to form an electroless Cu plating film 14 having a thickness of approximately one-tenth that of the Cu foil 12. The electroless Cu plating films 14 formed on the top side and bottom side of the resin substrate 11 are electrically connected by the electroless Cu plating film 14 formed on the through-holes 13.
  • Next, as shown in FIG. 2(A), a dry film having an acrylic resin as its main component is adhesed to the surface of the electroless [0028] Cu plating film 14 in order to photolithographically form a first plating resist pattern 15 on the surface of the electroless Cu plating film 14. A pattern mask formed as an inverse pattern of the conductor pattern, i.e., a circuit pattern 16, external terminal connection pads 17, and semiconductor element connection pads 18, is applied to the dry film and exposed and developed, leaving behind a dry film in the shape of the inverse pattern. Curing is then performed to form the first plating resist pattern 15.
  • Next, as shown in FIG. 2(B), in order to form the electrolytic [0029] Cu plating film 19 at the surface sections of the electroless Cu plating film 14 that are not covered by the first plating resist pattern 15 formed by the dry film, the resin substrate 11 is, e.g., immersed in a plating solution, e.g, a copper sulfate bath or a pyrophosphate bath, and electricity is passed through the electroless Cu plating film 14. This electroplating operation forms the electrolytic Cu plating film 19.
  • Next, as shown in FIG. 3(A), a second plating resist [0030] pattern 20 is formed using photolithography on the surface of the electrolytic Cu plating film 19 and the surface of the first plating resist pattern 15. A dry film having acrylic resin as its main component is applied. Then, a pattern mask is applied so that the surface of the electrolytic Cu plating film 19 is covered for the circuit pattern 16 while the surface of the electrolytic Cu plating film 19 for the external terminal connection pads 17 and the semiconductor element connection pads 18 are exposed from the openings. This is then exposed and developed so that the dry film forms a pattern. Curing is then performed to form the second plating resist pattern 20.
  • Next, as shown in FIG. 3(B), the following operations are performed to form a Ni and Au plating film [0031] 21 on the surface sections of the electrolytic Cu plating film 19 for the external terminal connection pads 17 and the semiconductor element connection pads 18, which are not covered by the second plating resist pattern 20. For example, an electrolytic Ni plating film can first be formed by immersing the resin substrate in a plating solution, e.g., a sulfamic acid bath, and electricity can be passed through the electroless Cu plating 14. Then, electrolytic plating is performed to form an electrolytic Au plating film on the electrolytic Ni plating film. For example, the resin substrate 11 on which the electrolytic Ni plating film has been formed is immersed in a plating solution in a hard gold plating bath and electricity is passed through the electroless Cu plating film 14. As a result, an Ni and Au plating film 21 is formed on the external terminal connection pads 17 and the semiconductor element connection pads 18.
  • Next, as shown in FIG. 4(A), if the dry film used in the first and the second plating resist [0032] patterns 15, 20 is, for example, an alkali-soluble type, the dry film is made to swell and stripped from the resin substrate 11 by spraying the resin substrate 11 with an aqueous solution of 3% NaOH at a temperature of 50° C. or by immersing the resin substrate 11 in an aqueous NaOH solution. The resin substrate 11 is then washed and dried. As a result, the resin substrate 11 is formed with a circuit pattern 16, in which the electrolytic Cu plating film 19 is formed on sections of the electroless Cu plating film 14. The external terminal connection pads 17 and the semiconductor element connection pads 18 are formed from electrolytic Cu plating film 19 disposed on sections of the electroless Cu plating film 14, with Ni and Au plating film 21 being formed on the electrolytic Cu plating film 19.
  • Next, as shown in FIG. 4(B), etching is performed to remove sections of the electroless [0033] Cu plating film 14 that are not covered by the electrolytic Cu plating film 19 forming the circuit pattern 16 and the Ni and Au plating film 21 forming the external terminal connection pad 17 and the semiconductor element connection pad 18. It would be preferable for the etching solution to be a type that etches only the electroless Cu plating film 14 without etching the electrolytic Cu plating film 19 and the Ni and Au plating film 21. However, since the electroless Cu plating film 14 is formed much thinner than the electrolytic Cu plating film 19 and the Ni and Au plating film 21, it would also be possible to use a soft etchant such as a mixture of hydrogen peroxide and sulfuric acid or the like or sodium persulfate. With this etching operation, there is almost no etching that takes place of the surface of the Ni and Au plating film 21, with slight etching of the surface of the electrolytic Cu plating film 19. However, since these are thicker than the thickness of the electroless Cu plating film 14, the pattern shape can be maintained. This etching operation results in the separately formed patterns of the circuit pattern 16, formed from the electroless Cu plating film 14 and the electrolytic Cu plating film 19, and the external terminal connection pads 17 and the semiconductor element connection pads 18, formed from the electroless plating film 14 and the electrolytic Cu plating film 19 and the Ni and Au plating film 21.
  • Next, as shown in FIG. 4(C), a solder resist [0034] film 22 serves to cover the circuit pattern 16 while exposing the external terminal connection pads 17 and the semiconductor element connection pads 18. A solder resist paste is used to screen-print the entire surface of the resin substrate 11, and a pattern mask is mounted so that openings are formed at the external terminal connection pads 17 and the semiconductor element connection pads 18. Photolithography is then performed to expose and develop the pattern. This results in the plastic package 10 formed with the solder resist film 22, which covers the circuit pattern 16 with a high strength of adhesive bonding while forming openings at the external terminal connection pads 17 and the semiconductor element connection pads 18.
  • If the [0035] plastic package 10 is a BGA of an advanced heat dissipation package formed by disposing the external terminal connection pads 17 and the semiconductor element connection pads 18 on one side of the resin substrate 11 and bonding a heat spreader plate formed from a Cu plate or the like on the opposite side. Then, after the solder resist film 22 is formed on the resin substrate 11, an essentially central section of the resin substrate 11 is cut out. The heat spreader plate is then bonded to the resin substrate 11 so that a cavity for mounting a semiconductor element is formed.
  • As shown in FIGS. [0036] 5(A),(B), in the above method for making the plastic package 10 according to an embodiment of the present invention, in addition to forming the solder resist film 22 on the surface of the circuit pattern 16, it would be preferable to also form the solder resist film 22 on the periphery of the external terminal connection pads 17, which are formed from the electroless Cu plating film 14, the electrolytic Cu plating film 19, and the Ni and Au plating film 21. As a result, the external terminal connection pad 17 is prevented from peeling away from the resin substrate 11 even if thermal stress is generated when a solder ball is bonded to the external terminal connection pad 17. Also, since the bonding area for bonding a solder ball can be restricted, it is possible to provide control melting to a predetermined extent and essentially identical heights for solder balls, thus allowing reliable mounting to the board.
  • Also, in the above method for making the [0037] plastic package 10 according to an embodiment of the present invention, in addition to forming the solder resist film 22 on the surface of the circuit pattern 16, it would be preferable to also form the solder resist film 22 on the periphery of the external terminal connection pads 17 and the semiconductor element connection pads 18, which are formed from the electroless Cu plating film 14, the electrolytic Cu plating film 19, and the Ni and Au plating film 21. As in the case of the external terminal connection pads 17, the bonding strength of the semiconductor element connection pads 18 to the resin substrate 11 can be increased. Also, if a semiconductor element is to be directly bonded to the plastic package 10 via the flip-chip method, the positions of the bonding pads of the semiconductor element can be accurately aligned with the bonding positions.
  • With the above method for making the [0038] plastic package 10 according to an embodiment of the present invention, the electroless Cu plating film 14 serves as a plating tie bar. This allows the Ni and Au plating film 21 to be easily formed on the external terminal connection pads 17 and the semiconductor connection pads 18 without requiring a special plating tie bar. Also, the electroless Cu plating film 14 is much thinner than the Cu foil 12 or the electrolytic Cu plating film 19, easing significantly the etching of the electroless Cu plating film 14 for pattern formation. Also, undercutting can be almost completely eliminated. This makes it easy to provide higher densities and pattern precision for the circuit pattern 16, the external terminal connection pads 17, and the semiconductor element connection pads 18. Also, since plating tie bars are not needed, electrical reflections caused by a plating tie bar are eliminated, and electrical characteristics can be improved. Also, since the Ni and Au plating film 21 is formed from electrolytic plating, a high degree of adhesion strength is provided that is adequate for wire bonding, flip-chip bonding, and solder ball bonding. Furthermore, the Ni and Au plating film 21 is not present on the circuit pattern 16, a high bonding strength with the solder resist film 22 can be provided.
  • Also, since a soft etchant having as its main component a mixture of hydrogen peroxide and sulfuric acid or sodium persulfate is used as the etching solution, the amount of etching performed on the electrolytic [0039] Cu plating film 19 can be low, and the electroless Cu plating film 14 can be etched efficiently without dissolving the Au plating film. Also, these soft etchants can be easily handled and disposed.
  • The method for making plastic packages according to the present invention comprises: etching away the Cu foil formed on a side of the resin substrate and then forming an electroless Cu plating film on the surface of the resin substrate on which the Cu foil is formed; forming a first plating resist pattern on a surface of the electroless Cu plating film and passing electricity through the electroless Cu plating film and forming an electrolytic Cu plating film on a surface of the electroless Cu plating film not covered by the first plating resist pattern; forming a second plating resist pattern on a surface of the electrolytic Cu plating film to serve as the circuit pattern, passing electricity through the electroless Cu plating film, and using electrolytic plating to form on a surface of the electrolytic Cu plating film not covered by the second plating resist pattern, the external terminal connection pad, and the semiconductor element connection pad upon which an Ni and Au plating film is disposed; removing the first and the second resist patterns and etching away the electroless Cu plating film not covered by the Ni and Au plating film or the electrolytic Cu plating film; and forming a solder resist film covering the circuit pattern while exposing the external terminal connection pad and the semiconductor element connection pad. As a result, after the Cu foil is removed, the resin substrate surface has an appropriate surface roughness. The electroless Cu plating film can be formed thin with high bonding strength. The Ni and Au plating film and the electrolytic Cu plating film can be easily etched with an etching resist pattern, allowing removal without the formation of overhangs as a result of undercutting. Thus, a circuit with a high-density, fine pattern can be easily formed with a good yield. Also, the solder resist film is not bonded on the Ni and Au plating film. This makes it possible to firmly bond the solder resist film to the resin substrate and the circuit pattern, which is formed from the Cu plating film having appropriate surface roughness. [0040]
  • In the method of making plastic packages according to an embodiment of the present invention, the solder resist film is formed on a surface of the circuit pattern and the solder resist film extends over the periphery of either the external terminal connection pad or the external terminal connection pad and the semiconductor element connection pad. As a result, the bonding area of the semiconductor element connection pad and the external terminal connection pad can be restricted, and semiconductor elements and solder balls can be accurately bonded. Also, peeling away of the external connection pad from the resin substrate is prevented even if thermal stress is generated when a solder ball is being connected to the external terminal connection pad. [0041]
  • Having described preferred embodiments of the invention with reference to the accompanying drawings, it is to be understood that the invention is not limited to those precise embodiments, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope or spirit of the invention as defined in the appended claims. [0042]

Claims (3)

What is claimed is:
1. A method for making a plastic package comprising a resin substrate to which a Cu foil is bonded on at least one side and, on said at least one side of said resin substrate, there is disposed a circuit pattern, an external terminal connection pad, and a semiconductor element connection pad, the method comprising:
etching away said Cu foil formed on a side of said resin substrate and then forming an electroless Cu plating film on said side of said resin substrate on which said Cu foil was formed;
forming a first plating resist pattern on a surface of said electroless Cu plating film; passing electricity through said electroless Cu plating film to form an electrolytic Cu plating film on a surface of said electroless Cu plating film not covered by said first plating resist pattern;
forming a second plating resist pattern on a surface of said electrolytic Cu plating film to serve as said circuit pattern; passing electricity through said electroless Cu plating film; electrolytic plating, on a surface of said electrolytic Cu plating film not covered by said second plating resist pattern, said external terminal connection pad and said semiconductor element connection pad upon which an Ni and Au plating film is disposed;
removing said first and said second resist patterns; etching away said electroless Cu plating film not covered by said Ni and Au plating film or said electrolytic Cu plating film; and
forming a solder resist film covering said circuit pattern while exposing said external terminal connection pad and said semiconductor element connection pad.
2. A method of making a plastic package as described in claim 1 wherein said solder resist film is formed on a surface of said circuit pattern and said solder resist film extends over a periphery of said external terminal connection pad.
3. A method of making a plastic package as described in claim 1 wherein said solder resist film is formed on a surface of said circuit pattern and said solder resist film extends over the periphery of said external terminal connection pad and said semiconductor element connection pad.
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