US20040022428A1

US20040022428A1 - Automatic system-level test apparatus and method

Info

Publication number: US20040022428A1
Application number: US10/248,829
Authority: US
Inventors: Ming-Ren Chi; Peng-Chia Kuo
Original assignee: Via Technologies Inc
Current assignee: Via Technologies Inc
Priority date: 2002-07-30
Filing date: 2003-02-24
Publication date: 2004-02-05
Also published as: US6873927B2; TW567329B; TW569022B; GB2392251B; US20040024557A1; DE10318394B4; US20040078676A1; TW577998B; GB2392251A; DE10318394A1

Abstract

An automatic system-level test apparatus that includes a testing computer and at least one image sensor. The testing computer is used to carry and test an integrated circuit. The testing computer together with the integrated circuit incorporated therein forms a system-completed computer capable of conducting a system-level test. The testing computer includes at least one output device for outputting test images while running a pre-determined test program. An image sensor captures the images produced by the output device. The captured image is compared with an original image stored inside an image database to determine if a difference between the captured image and the stored image.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the priority benefit of Taiwan application serial no. 96116952, filed on Jul. 30, 2002.

BACKGROUND OF INVENTION

1. Field of Invention

The present invention relates to an automatic system-level test apparatus and method. More particularly, the present invention relates to an automatic system-level test apparatus and testing method capable of simulating end-user states and carrying out a dynamic testing of an integrated circuit.

2. Description of Related Art

The rapid progress in computer technologies has brought major changes in our daily life. Various computer-related products such as servers, workstations, desktop computers, portable computers, personal digital assistants, palm-top PCs, pocket PCs or industrial computers are out in the market to serve us in many ways. These computer products are all assembled from integrated circuits (ICs). Before sending these products to the customers, the integrated circuits within these products must go through sophisticated testing to ensure their quality.

FIG. 1 is a block diagram showing the schematic layout of a conventional personal computer (PC). As shown in FIG. 1, major components of a conventional

personal computer

100 include a central processing unit (CPU) 110, a system bus controller 112 and an input/output bus controller 114. A memory unit 116 and an advanced graphic port 118 are electrically connected to the system bus controller 112. A monitor 120 is electrically connected to the advanced graphic port 118 for outputting images. A peripheral component interface (PCI) 122 is connected to the system bus controller 112 and the input/output bus controller 114. An integrated drive electronics (IDE) interface 130, a floppy disk 132, a parallel port 134, a serial port 136 and a universal serial bus (USB) 138 are all electrically connected to the input/output bus controller 114. In addition, an audio unit 140 and an Ethernet interface 142 may also be electrically connected to the input/output bus controller 114.

Each of the aforementioned component units is built by connecting many integrated circuits together. For example, the

central processing unit

110, the system bus controller 112, the input/output bus controller 114, the memory unit 116, the graphic accelerator attached to the advanced graphic port 118, the audio chip as well as the Ethernet chip are all integrated circuits that can be found in the computer systems. Since all these integrated circuits are important electronic elements inside the computer, the performance, functionality and inter-circuit compatibility of these integrated circuit are all critical to the smooth operation and ultimate performance of the entire computer system.

FIG. 2 is a flow chart showing the steps for testing an integrated circuit in a conventional method. A conventional

integrated circuit

202 such as a logic integrated circuit (logic IC) produced from wafer fabrication must undergo an initial test. After packaging the chip, a final test 204 is carried out before shipment 206. To test an integrated circuit, the integrated circuit is placed inside an automatic test equipment (ATE) and the contacts on the integrated circuit are electrically connected to the ATE through a test socket. Thereafter, a pre-determined sequence of simulation testing steps are carried out. At the end of the simulation, quality level of the integrated circuit is assessed. However, in a high-temperature or low-temperature test of the integrated circuit, the circuit to be tested is connected to the test socket of an ATE and the ATE is used to condition the integrated circuit into a high temperature state before carrying out the electrical test. After the test, the integrated circuit is removed from the test socket so that another integrated circuit may be plugged into the test socket for high-temperature testing. After completing the high-temperature testing of, the integrated circuit is plugged onto the test socket of other ATE to conduct low-temperature testing. Functional simulation in the high-temperature or the low-temperature testing is carried out using special programs. At the completion of the testing, the states of the element are used to judge the quality of the integrated circuit. According to the test results, the integrated circuits are sorted out in a binning system before shipment. Note that in the aforementioned testing method, the integrated circuit must be removed from one ATE and then reconnected to another ATE for low-temperature testing after a high-temperature testing. Hence, this testing method is highly inefficient.

As for a memory IC, after conducting a first stage

final test

208, a burn-in test 210 and a second stage final test 212 should be performed before shipment. Both the first stage final test 208 and the second stage final test 212 are carried out using the ATE. Yet, the burn-in test 210 is often operated manually or semi-automatically. The memory IC is plugged into the socket of a test circuit board and then the entire test circuit board with the memory IC is transferred into a heating test station. Inside the heating test station, the memory IC is thermally stressed, voltage-stressed or currentstressed to burn the chip. However, this type of testing only tests the functionality of an integrated circuit using simulation programs, which can not simulate the actual operating environment of a computer used by an end user. Hence, there still could be an instable or incompatible problem occurred when the integrated circuit is assembled inside a computer after it passes the ATE tests.

FIG. 3 is a flow chart showing the steps in a conventional method of testing an integrated circuit through simulation. Since a conventional testing method does not provide end-user system environment simulation, a.modular test of the integrated circuit may be conducted after the final test and before shipment. In a conventional modular test, a module such as an interface or a test computer is provided. An integrated

circuit

302 is manually inserted into the module or the test computer in step 304. The module or the test computer is capable of simulating the operating environment of an end user. Thereafter, the integrated circuit 302 is tested in step 306 and the qualified circuits are shipped in step 308. Because this portion of the testing is carried out manually and quality assessment is also carried out visually, productivity is low and testing time is long. Moreover, quality problems always occur due to human errors, which lead to an increase in production cost and a decrease in testing reliability.

In brief, some of the deficiencies and drawbacks of a conventional testing method at least include 1) Since test simulating a system environment used by an end-user is not provided, problems such as being compatible to software may still occur even though an integrated circuit has passed the conventional test. 2). The electronic devices are fixedly mounted on the test circuit board for testing an integrated circuit. Hence, compatibility of the same integrated circuit between different devices is untested. 3). The conventional method relies heavily on manual operations and hence severely limits overall throughput and increases the probability of human errors. 4). The conventional modular test method is incapable of providing temperature control for the integrated circuit once the integrated circuit is incorporated into the module. Hence, some of the actual working conditions are not simulated and tested. 5). After conducting a high-temperature testing on one ATE, the integrated circuit must be manually transferred to another ATE for low-temperature testing. This lowers the operating efficiency of the testing method. 6). The integrated circuit is assessed according to the final states and hence incapable of detecting any dynamic errors such as video shaking, discoloring display, ghost shadow or white block produced by a graphic accelerator. When the integrated circuit executes a particular software, possible incompatibility to a program of the integrated circuit also remains undetected by the conventional testing method.

SUMMARY OF INVENTION

Accordingly, one object of the present invention is to provide an automatic system-level test apparatus and a method of performing the apparatus for testing an integrated circuit, which apparatus and method can simulate end-user computer hardware and software environment so that the quality of integrated circuit can be ensured after the test.

A second object of this invention is to provide an automatic system-level test apparatus having a plurality of integrated circuit connectors all linked to a testing computer so that compatibility between different integrated circuits can be tested and any error between the integrated circuits can be discovered.

A third object of this invention is to provide an automatic system-level test apparatus and a method of performing the apparatus such that all testing is conducted automatically rather than manually, thereby increasing productivity and accuracy and lowering production cost.

A fourth object of this invention is to provide an automatic system-level test apparatus and a method of performing the apparatus such that operating temperature of an integrated circuit connected to a testing computer can be controlled so that testing under temperature varying conditions can be provided.

A fifth object of this invention is to provide an automatic system-level test apparatus and a method of performing the apparatus that provides full automatic monitoring of the dynamic states of a test integrated circuit so that a more accurate assessment of the integrated circuit is obtained.

A sixth object of this invention is to provide an automatic system-level test apparatus and a method of performing the apparatus capable of conducting hightemperature and low-temperature tests without having to move the test integrated circuits during switching of the two kinds of temperature tests, thereby saving time and increasing testing efficiency.

A seventh object of this invention is to provide an automatic system-level test apparatus and a method of performing the apparatus having the capacity to record the failure temperature of a test integrated circuit.

An eighth object of this invention is to provide an automatic system-level test apparatus and a method of performing the apparatus capable of detecting and showing whether a test integrated circuit operates normally according the images shown on an cathode ray tube display or a liquid crystal display.

To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides an automatic system-level test apparatus for testing an integrated circuit. The automatic system-level test apparatus includes a testing computer, at least one automatic plug/unplug apparatus, at least one image sensor and at least one control unit. The testing computer is suitable for carrying and testing at least one integrated circuit. The testing computer further includes at least one output device for outputting the results of testing. The automatic plug/unplug apparatus is suitable for plugging a test integrated circuit to a special receptacle in the testing computer and removing the test integrated circuit from the special receptacle in the testing computer after testing. The image sensor captures an image from the outputting device. The control unit is electrically connected to the testing computer, the automatic plug/unplug apparatus and the image sensor. The control unit controls the plugging/unplugging action of the automatic plug/unplug apparatus and the system-level testing by the testing computer. The testing computer and the test integrated circuit it carries constitute a computer system. After capturing from the outputting device, the image sensor transmits image data to the control unit and compares the image data with original image data stored inside a database so that any difference between the two can be recognized.

According to one embodiment of this invention, the automatic system-level test apparatus further includes a connector for connecting the test integrated circuit to the testing computer. The image sensor can be a charge-coupled device. The automatic system-level test apparatus may also include an audio detector connected to the control unit for monitoring audio output from the system-completed computer. In addition, the automatic plug/unplug apparatus may include a robotic arm. The integrated circuit to be tested may include a central processing unit, a system bus controller, an input/output bus controller or a graphic accelerator. The control unit may be a computer.

The automatic system-level test apparatus may further include a temperature control device. Through the temperature control device, system-level testing of the integrated circuit may be carried out at a fixed or a variable temperature. Moreover, the temperature control device also permits the conduction of a low-temperature system-level test of the integrated circuit before a high-temperature system-level test. Conversely, a high-temperature system-level test may be conducted before a low-temperature system-level test. When conducting a high-temperature test, the integrated circuit is set to a temperature between 65° C. to 120° C. On the other hand, when conducting a low-temperature test, the integrated circuit is set to a temperature between 10° C. to 10° C. In addition, the temperature of an integrated circuit gripped by the plug/unplug apparatus may be set through the temperature control device. Furthermore, the temperature control device may be incorporated into the testing computer so that temperature of the integrated circuit can be adjusted after plugging into the receptacle on the testing computer.

The automatic system-level test apparatus may further include an integrated circuit supply apparatus, an integrated circuit binning apparatus and an automatic transport apparatus. The integrated circuit supply apparatus is a device for holding a plurality of untested integrated circuits. The integrated circuit binning apparatus is a device for holding a plurality of integrated circuits that has been tested. The automatic transport apparatus is a device for transferring untested integrated circuits and tested integrated circuits. Using the automatic transport apparatus and the automatic plug/unplug apparatus, untested integrated circuits are transported from the integrated circuit supply apparatus and plugged into the receptacle on the testing computer in sequence for system-level testing. After testing, the automatic transport apparatus and the automatic plug/unplug apparatus are again used to remove the tested integrated circuit from the testing computer and transfer it to the integrated circuit binning apparatus. Furthermore, temperature of the untested integrated circuits sitting on the integrated circuit supply apparatus may be set through the temperature control apparatus.

This invention also provides a method of performing the automatic system-level test apparatus. First, an integrated circuit to be tested is transferred from the integrated circuit supply apparatus and plugged into the receptacle on the testing computer using the automatic transport apparatus and the automatic plug/unplug apparatus, thereby forming a system-completed computer. The testing computer includes an CRT display and a liquid crystal display. Thereafter, the system-completed computer is driven to conduct a series of preset testing programs so that the integrated circuit is tested at the system level. The results of testing are transferred to the CRT display and the liquid crystal display. A first image sensor captures a first image from the CRT display while a second image sensor captures a second image from the liquid crystal display. Data of the first image captured by the first image sensor and data of the second image captured by the second image sensor are next compared with the original image data stored in a database file and any difference between the two are noted. Finally, the tested integrated circuit is transferred from the testing computer to the integrated circuit binning apparatus through the automatic transport apparatus and the automatic plug/unplug apparatus according to the test results.

Because the testing method according to this invention is carried out at the system level, general-purpose or specific programs can be executed. Hence, the method not only permits a simulation of end-uses states, but also permits the execution of an actual application software program such as a window operating system so that quality of the integrated circuit can be assessed. The method also checks for any abnormality in the integrated circuit through an CRT display and a liquid crystal display.

This invention also provides a connector for connecting a plurality of integrated circuits with a testing computer. Thus, devices such as central processing unit, system bus controller, input/output bus controller and graphic accelerator may be plugged into a corresponding connector and linked to the testing computer. With this arrangement, compatibility between different types of integrated circuits can be assessed and any error states between them can be found with ease.

Through the automatic transport apparatus, the integrated circuit supply apparatus, the integrated circuit binning apparatus and the image sensor, systemlevel testing becomes fully automatic. Since manual labor is excluded, productivity and testing precision is increased while production cost is lowered.

Moreover, the automatic system-level test apparatus is capable of conducting a high-temperature and low-temperature system-level test without moving the test integrated circuit. Therefore, testing time is reduced and testing efficiency is increased.

This invention also provides a temperature control device for adjusting the temperature of the integrated circuit to be tested when carrying out a system-level test.

In addition, the temperature control device may trigger a change in the temperature of the integrated circuit being tested while conducting the system-level test so that the point of failure of the integrated circuit is accurately determined.

It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.

BRIEF DESCRIPTION OF DRAWINGS

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings, [0032]
FIG. 1 is a block diagram showing the schematic layout of a conventional personal computer; [0033]
FIG. 2 is a flow chart showing the steps for testing an integrated circuit in a conventional method; [0034]
FIG. 3 is a flow chart showing the steps in a conventional method for testing a circuit module; [0035]
FIG. 4 is a schematic diagram showing one type of test interface module for testing according to one preferred embodiment of this invention; [0036]
FIG. 5 is a schematic diagram showing one type of main board for testing according to one preferred embodiment of this invention; [0037]
FIG. 6 is a schematic diagram showing the system structure of an automatic system-level test apparatus according to a first preferred embodiment of this invention; and [0038]
FIG. 7 is a schematic diagram showing the system structure of an automatic system-level test apparatus having the capacity of mass test according to a second preferred embodiment of this invention.[0039]

DETAILED DESCRIPTION

Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts. [0040]
The automatic system-level test apparatus and performing method relies on a known good testing computer to test any integrated circuit connected to the testing computer. For a personal computer, the integrated circuit to be tested includes, for example, central processing units, system bus controller, input/output bus controller or the integrated circuit inside an interface module such as a graphic accelerator. In general, the integrated circuits such as central processing unit, system bus controller and input/output bus controller mount on a printed circuit board. Usually, the central processing unit is electrically connected to a main board through a connector such as socket [0041] 478, socket 423, socket 370 or socket 7. Memory integrated circuits are mounted on a modular circuit board and the modular circuit board is then attached to the main board through a connector such as DIMM or RIMM. System bus controllers and input/output bus controllers are electrically connected to the main board through surface mount technology (SMT). Graphic accelerators may be connected to the main board using either the surface mount technology or mounted on a modular circuit board and then attached to the main board through an advanced graphic port (AGP port). Some integrated circuits are first mounted on a modular circuit board and then attached to the peripheral component interface (PCI) through PCI slots and thus in electrically connected to the main board. In addition, other devices such as an audio chip and Ethernet chip may be directly attached to the main board or indirectly the main board through a modular circuit board and the PCI slot. Obviously, the automatic system-level test apparatus is not limited to the testing of a personal computer. The automatic system-level test apparatus is applicable to testing of other computer equipments such as servers, workstations, desktop computers, notebook computers, portable computer, personal digital assistants, palm-top computers, pocket computers or even the integrated circuits inside an industrial computer.
In the present invention, to simulate the computer system environment of end users, all the specifications of the system-completed computer are identical in every aspect with an actual circuit board (main board or modular circuit board) except for one thing. In the conventional computer, in an actual assembly, some integrated circuits are permanently fixed to the circuit board by soldering while other circuits are plugged to connectors on the circuit board. However, in this invention, since the purpose of electrically connecting the integrated circuits to be tested to the system-completed computer is just for testing, and hence, a connector is always provided for an integrated circuit to be tested. The connector may be a specially designed connector for connecting with an integrated circuit, which is normally fixed onto a circuit board by soldering. Even for those integrated circuits which are originally connected to the computer through a connector, a specially designed connector may still be provided to facilitate testing. Obviously, the original connector may be used if the connector fits the testing requirements for a connector. These integrated circuit connectors may be positioned on the main board or on the circuit board of an interface module. Moreover, the same circuit board may accommodate a plurality of integrated circuit connectors for testing various types of integrated circuits. For example, a system-completed computer may include two types of connectors for engaging with two different types of integrated circuits A and B. In a first case scenario, the integrated circuit inserted into the connector A is the one to be tested. In this case, one of the known good integrated circuits B[0042] 1, B2, B3 are plugged into the connector B by selection so that compatibility between the integrated circuit in the connector A and one of the integrated circuits B1, B2, B3 in the connector B can be checked. In a second case scenario, the integrated circuit plugged into the connector B is the one to be tested. In this case, a known good integrated circuit is plugged into the connector A so that the connector B becomes a connector for engaging testing circuits.
FIG. 4 is a schematic diagram showing one type of test interface module according to one preferred embodiment of this invention. Using an advanced graphic interface module [0043] 400 (AGP module) as an example, if the graphic accelerator chips of the AGP module 400 need to be tested, a socket or connector 404 is set up on the modular circuit board 402 where the graphic accelerator chip is originally located. Other components on the modular circuit board 402 such as video RAM 406, gold fingers 408 for plugging into an AGP slot or monitor socket 410 are all set up according to the standard specification.
FIG. 5 is a schematic diagram showing one type of main board for testing according to one preferred embodiment of this invention. As shown in FIG. 5, a typical [0044] main board 500 has a number of integrated circuits. Major integrated circuits include the central processing unit (CPU), system bus controller and input/output bus controller so that integrated circuit testing may be designed around these units. Hence, the main board 500 may include sockets such as a central processing unit (CPU) socket 502, a system bus controller socket 504 and an input/output bus controller socket 506. Other connectors on the main board 500 such as a DRAM slot 508, advanced graphic port (AGP) slot 510, expansion slot 512 (including peripheral component interface (PCI) slot, CNR slot and so on), and an integrated drive electronics (IDE) port and input/output (I/O) port 516 (including parallel port and serial port) are designed according to standard specification.
The aforementioned sockets or connectors may be designed to fit a particular integrated circuit package design. Hence, packages such as ball grid array packages (including BGA, PBGA, EBGA and so on), pin grid array packages (including PGA, CPGA, PPGA and so on) and small outline packages (SOJ) may be plugged into the [0045] main board 500 to carry out a system-level test.
FIG. 6 is a schematic diagram showing the system structure of an automatic system-level test apparatus according to a first preferred embodiment of this invention. The automatic system level test apparatus according to this invention is built on a [0046] structural frame 650 with a known good testing computer 600. The testing computer 600 includes at least a main host section 602, an input/output device 604 and an output device 606. The main host section 602 includes at least one integrated circuit connector 608 for accommodating an integrated circuit to be tested. The main host section 602 may just include a main board capable of accommodating a selection of interface modules. The integrated circuit connector 608 is either positioned on the interface module as shown in FIG. 4 or positioned on the main board as shown in FIG. 5. A plurality of integrated circuit connectors may be installed on the main host section 602. The input/output device 604 includes a data storage device such as magnetic disk drive for holding various software programs including the ones that subsequently drive the testing computer 600. The software programs may include specially designed testing programs or command and important application programs. The output device 606 is a monitor or other device for displaying output such as a cathode ray tube (CRT) or a liquid crystal display (LCD). Obviously, other types of output display devices such as a printer may also be used. In addition, the output device 606 may even be a loudspeaker. If necessary, testing can be designed for such an audio output device so that compatibility between it and other different integrated circuits is assessed. The testing computer 600 may further include many peripheral devices 610 such as keyboard, mouse, drafting machine, scanner, magnetic disk drive, compact disk drive and digital camera. The peripheral devices 610 may be selected according to the list of items that needs to be tested. The selection may also be made so as to assess the compatibility between a particular integrated circuit and a selection of peripheral devices.
The [0047] testing computer 600 carries at least one integrated circuit that requires testing. The testing computer 600 can be any one of the aforementioned types of computer system. In an ideal arrangement, the assembling method of all the integrated circuits inside the testing computer 600 is identical to an end user”s hardware environment so that any testing performed is equivalent to an actual operation in the physical environment. In another preferred embodiment, aside from the connector for engaging with a test integrated circuit, all the other major integrated circuits on the main host section 602 are installed identically to the system used by the end user. Hence, the setup is capable of simulating actual operations in end-user”s environment so that the test results are more accurate. In yet another embodiment, some of the known good non-testing integrated circuits are engaged to the circuit board through connectors so that individual integrated circuits may be plugged or unplugged. With this arrangement, identical test integrated circuits may be tested together with a variety of non-testing known good integrated circuits so that compatibility of the test integrated circuit with other types of integrated circuits may be discovered through the same circuit board. In another embodiment, the same main host section 602 may include a plurality of connectors for testing. If one of the connectors is used for testing, the other connectors are connected to known good integrated circuits. Since when a test integrated circuit is plugged into the testing computer, a system-completed computer is formed this type of computer is referred to as a system-completed computer in this invention. A system level test can thus be preformed on a system-completed testing computer. Obviously, all the components in the system-completed computer including other electronic devices on the circuit board or peripheral devices connected to the testing computer may be identical to the one used by an actual user. Because the system-completed computer is a complete computer that includes all hardware necessary to run as a common computer, various types of testing programs can be executed through the system-completed computer to simulate all possible end-user states. This includes general application programs such as window system, video, game and special programs such as the computer numerical control code of an industrial computer or CAD/CAM software in a workstation. Furthermore, the system-completed computer may also serve as a workstation and execute a special program to test a computer numerical control machine in carrying out some mechanical processes.
The test integrated circuit is plugged into the [0048] integrated circuit connector 608 using an automatic plug/unplug apparatus 612 such as a robotic arm so that the integrated circuit and the testing computer 600 are electrically connected to form a system-completed computer. The testing computer 600 is driven by a pretesting program such as a window operating system or a stereo image broadcast stored inside the input/output device 604 (a driving device). The output device 606 such as an cathode ray tube (CRT) display 606 a or a liquid crystal display (LCD display) 606 a is capable of outputting the execution states of the testing computer 600. However, both the CRT display 606 a and the liquid crystal display 606 a may be connected at the same time so that playback on both the CRT display 606 a and the liquid crystal display 606 a are monitored simultaneously. In addition, a digital/analogue converter (DAC) 605 is installed at the electrical connection between the main host section 602 and the liquid crystal display 606 a. Through the digital/analogue converter 605, the liquid crystal display 606 a is able to receive digital signals and re-transmit the signals in low voltage differential signaling (LVDS) format.
The system-level test apparatus further includes [0049] image sensors 616 a and 616 b and a database 690 for holding images. The image database 690 holds a set of archived image data. The image sensor 616 a senses the output images on the CRT display 606 a. After sensing the output image, the output image captured by the image sensor 616 a is compared with a correct pre-stored image data inside the image database 690 through the control unit 640 to determine if the output image is normal or not, and thus to further determine if the integrated circuit 630 under test operates normally inside the testing computer 600 or not. When the output image captured by the image sensor 616 a is identical to the correct image data stored inside the image database 690, the output of the integrated circuit 630 on the CRT display 606 a is determined normal. On the other hand, if the output image captured by the image sensor 616 a is different from the one stored inside the image database 690, the output of the integrated circuit 630 on the CRT display 606 a is determined abnormal. Similarly, the image sensor 616 b senses the output images on the liquid crystal display 606 a. After sensing the output image, the output image captured by the image sensor 616 b is compared with a correct pre-stored image data inside the image database 690 through the control unit 640 to determine if the integrated circuit 630 under test is normal or not, and thus to further determine if the integrated circuit 630 under test operates normally inside the testing computer 600. When the output image captured by the image sensor 616 b is identical to the archived image data stored inside the image database 690, the output of the integrated circuit 630 on the liquid crystal display 606 a is determined normal. On the contrary, if the output image captured by the image sensor 616 b is different from the one stored inside the image database 690, the output of the integrated circuit 630 on the liquid crystal display 606 a is determined abnormal. The image sensors 616 a and 616 b can be charge-coupled devices or CMOS image sensors both capable of instant dynamic monitoring of the testing computer 600. The control unit 640 controls the operations of the CRT display 606 a, the liquid crystal display 606 a, the image sensors 616 a and 616 b as well as the image database 690.
The automatic system-level test apparatus further includes an [0050] automatic transport apparatus 620, an integrated circuit supply apparatus 622 and an integrated circuit binning apparatus 624. The automatic transport apparatus 620 can be, for example, a robotic arm capable of transporting integrated circuits 630. The integrated circuit supply apparatus 622 is a tray for containing a plurality of untested integrated circuits 630. The integrated circuit binning apparatus 624 has a number of temporary holders 624 a and 624 b for accommodating and sorting tested integrated circuits 630. For example, the temporary holder 624 a is an area for holding integrated circuits 630 that pass the system-level test and the temporary holder 624 b is an area for holding integrated circuits 630 that fail the system-level test. Using the automatic transport apparatus 620 and the automatic plug/unplug apparatus 612, untested integrated circuits 630 are transferred from the integrated circuit supply apparatus 622 one by one and engaged with the testing computer 600 to conduct a system-level test. Thereafter, the automatic transport apparatus 620 and the automatic plug/unplug apparatus 612 are again used to transfer the tested integrated circuit 630 from the testing computer 600 to the integrated circuit binning apparatus 624 according to the test results. If the integrated circuit passes the system-level test, the integrated circuit 630 is transferred to the temporary holder 624 a for storage. Conversely, if the integrated circuit 630 fails the system-level test, the integrated circuit is transferred to the temporary holder 624 b for storage.
The automatic system-level test apparatus also includes an integrated [0051] circuit supply apparatus 622 and an integrated circuit binning apparatus 624. The integrated circuit supply apparatus 622 is a place for containing a plurality of untested integrated circuits 630. The integrated circuit binning apparatus 624 is a place for holding a plurality of tested integrated circuits 630. The integrated circuit binning apparatus 624 has a number of temporary holders 624 a and 624 b for sorting out the tested integrated circuits 630. For example, the temporary holder 624 a stores integrated circuits 630 that pass the system-level test while the temporary holder 624 b stores integrated circuits 630 that fail the system-level test. Using the automatic transport apparatus 620 and the automatic plug/unplug apparatus 612, untested integrated circuits 630 are transferred from the integrated circuit supply apparatus 622 sequentially and engaged with the testing computer 600 to conduct a systemlevel test. Thereafter, the automatic transport apparatus 620 and the automatic plug/unplug apparatus 612 are again used to transfer the tested integrated circuit 630 from the testing computer 600 to the integrated circuit binning apparatus 624 according to the test results. If the integrated circuit passes the system-level test, the integrated circuit 630 is transferred to the temporary holder 624 a for storage. Conversely, if the integrated circuit 630 fails the system-level test, the integrated circuit is transferred to the temporary holder 624 b for storage.
The automatic system-level test apparatus further includes [0052] temperature control device 613, 614 and 615. Through the temperature control devices 613, 614 and 615, temperature of the test integrated circuits 630 is set. The temperature control device 614 is installed on the automatic plug/unplug apparatus 612. When an integrated circuit is fetched by the automatic plug/unplug apparatus 612, the fetched integrated circuit 630 may be heated or cooled by the temperature control device 614 until the integrated circuit is plugged into the testing computer 600. The temperature control device 613 is installed on the testing computer 600 so that the temperature of any integrated circuit 630 on the testing computer 600 may be set. The temperature control device 615 is installed in a temperature-presetting device 623. After an integrated circuit 630 is moved from the integrated circuit supply apparatus 622 to the temperature-presetting device 623 using the automatic transport apparatus 620, the integrated circuit sitting in the temperature-presetting device 623 may be preheated or pre-cooled by the temperature control device 615. The temperature control devices 613, 614 and 614 may be constructed using electrical resistors. A voltage is applied to the resistor to generate heat. The heat is transferred to the testing computer 600, the automatic plug/unplug apparatus 612 and/or the temperature-presetting device 623 and then to the respective integrated circuits 630. The temperature control devices 613, 614 and 615 may be constructed using a series of pipelines in which a liquid medium for heat transfer is provided therein. Through the pipeline, liquid may flow into the testing computer 600, the automatic plug/unplug apparatus 612 and the temperature-presetting device 623. By controlling the temperature of the liquid, temperature of the integrated circuits 630 carried by the testing computer 600, the automatic plug/unplug apparatus 612 and/or the temperature-presetting device 623 are adjusted. The temperature control devices 613, 614, 615 may be provided to the automatic system-level test apparatus altogether. Alternatively, according to another arrangement of the present invention, the automatic system-level test apparatus can comprises only some of the temperature control devices 613, 614, 615.
The [0053] control unit 640 connects with the testing computer 600, the image sensors 616 a and 616 b, the temperature control devices 613, 614, 615, the automatic plug/unplug apparatus 612 and the automatic transport apparatus 620. Through the control unit 640, current state of the testing computer 600 and the image sensors 616 a and 616 b are monitored so that any abnormality of the integrated circuit 630 operating within the testing computer 600 can be determined. Moreover, any abnormality shown on the CRT display 606 a and/or the liquid crystal display 606 a can be monitored by the control unit 640 so as to determine the functionality of the tested integrated circuit. In addition, the control unit 640 also controls the operation of the automatic transport apparatus 620 and the automatic plug/unplug apparatus 612 and thus controls the testing procedure. In other words, the control unit 640 monitors and controls the entire testing flow of the integrated circuits. Note that the functions of the automatic transport apparatus 620 and the automatic plug/unplug apparatus 612 may be combined together into a single device of both functions, for example, a robotic arm that can perform the function of both the functions of the automatic transport apparatus 620 and the automatic plug/unplug apparatus 612. In this case, the temperature control device 614 is installed on the robotic arm.
This invention also provides a method of performing the automatic system-level test apparatus. First, an [0054] integrated circuit 630 in the integrated circuit supply apparatus 622 is moved to the testing computer 600 by the automatic transport apparatus 620 and then plugged into the electrical connector 608 in the testing computer 600 by the automatic plug/unplug apparatus 612 so that the testing computer with the integrated circuit 630 incorporated therein forms a system-completed computer. Alternatively, the test integrated circuit 630 is moved from the integrated circuit supply apparatus 622 to the temperature-presetting device 623 by the automatic transport apparatus 620. After pre-heating or pre-cooling, the integrated circuit 630 is then moved from the temperature-presetting device 623 to the testing computer 600 by the automatic transport apparatus 620. Thereafter, the automatic plug/unplug apparatus 612 is used to plug the integrated circuit 630 into the electrical connector 608 on the testing computer 600 so that the testing computer 600 with the integrated circuit 630 incorporated therein together forms a system-completed computer.
After plugging the [0055] integrated circuit 630 into the testing computer 600 to form a system-completed computer, the testing computer 600 is driven by the input/output device 604 to execute a preset testing program to perform a test for the integrated circuit 630, for example, a high-temperature or a low-temperature system-level test, which will be further explained in the next paragraph. When the testing computer 600 executes a testing program, image sensors 616 a and 616 b instantly monitor the testing computer 600 through the CRT display 606 a and the liquid crystal display 606 a. Hence, the control unit 640 is able to determine if the integrated circuit 630 appears normal in the CRT display 606 a or the liquid crystal display 606 a and decides if the integrated circuit 630 operates normally with the testing computer 600. Finally, the automatic plug/unplug apparatus 612 and the automatic transport apparatus 620 are used to transfer the integrated circuit 630 to a corresponding temporary holder (624 a or 624 b) in the integrated circuit binning apparatus 624 according to the test results.
The to the present inventive method, the automatic system-level apparatus may be used to conduct a high-temperature testing and/or a low-temperature testing of an [0056] integrated circuit 630. The temperature control devices 613, 614 and 615 control the temperature of a test integrated circuit 630. Through the temperature control devices 613, 614 and 615, the integrated circuit 630 is set to a constant temperature such as 0° C. or 85° C. for a period of time. In general, in a high-temperature system-level test, the integrated circuit 630 is set to a temperature between 65° C. to 120° C. and the integrated circuit 630 is maintained at this temperature for a few seconds to a few minutes to carry out a system-level test. In a low-temperature system-level test, the integrated circuit 630 is set to a temperature between 10° C. to −10° C. and the integrated circuit 630 is maintained at this temperature for a few seconds to a few minutes to carry out a system-level test. Alternatively, the temperature control devices 613, 614, 615 are used to vary the temperature of the test integrated circuit 630 so that the temperature at which the integrated circuit 630 fails in a system-level test can be found, if the integrated circuit does not meet the test requirements. For example, as the temperature of the integrated circuit 630 is increased, the image sensors 616 a and 616 b may suddenly detect failure signals from the integrated circuit 630 at a particular temperature. This is the failure temperature for that type of integrated circuit 630. In addition, the temperature control devices 613, 614, 615 may also be used to adjust the temperature of the integrated circuit 630 for conducting a system-level test. To heat up a graphic chip, for example, the untested graphic chip sitting in the integrated circuit supply apparatus 622 is first transferred to the temperature-presetting device 623. Through the temperature control device 615 on the temperature-presetting device 623, the graphic chip is pre-heated to a desired temperature. In the process of moving the pre-heated graphic chip to the testing computer 600, a temperature control device on the automatic transport apparatus 620 may provide a small amount of heat to the graphic chip so that the pre-heat temperature is maintained. As for a central processing unit (CPU) during the testing, the heating control is different. The CPU is not pre-heated when it sits in the integrated circuit supply apparatus 622. When the CPU is fetched by the automatic plug/unplug apparatus 612, it is direct heated by the temperature control device 614 on the automatic plug/unplug apparatus 612. After the insertion of the CPU into testing computer 600, the automatic plug/unplug apparatus 612 still keeps in contact with the CPU to control temperature thereof by the temperature control device 614 until the test is completed and the CPU is removed from the testing computer 600.
In addition, temperature of the [0057] integrated circuit 630 may vary according a preset temperature curve by controlling the temperature control device 613, 614 and 615. For example, after engaging the integrated circuit 630 with the testing computer 600, temperature of the integrated circuit 630 is set to a temperature between 65° C. to 120° C. and maintained at this temperature for a few seconds to a few minutes to carry out a high-temperature system-level test. Thereafter, the integrated circuit 630 is cooled to a temperature between 10° C. to 10° C. and maintained at this temperature for a few seconds to a few minutes to carry out a low-temperature system-level test. With this arrangement, there is no need to move the integrated circuit 630 after finishing the high-temperature system level test. The low-temperature system-level test can be conducted immediately after the high-temperature system-level test and hence considerable time is saved. However, the applications of this invention are not limited as such. For example, after engaging the test integrated circuit 630 onto the testing computer 600, the integrated circuit 630 is adjusted to a temperature between 10° C. to 10° C. and maintained at this temperature for a few seconds to a few minutes to carry out a low-temperature system-level test. Thereafter, the integrated circuit is heated to a temperature between 65° C. to 120° C. and maintained at this temperature for a few seconds to a few minutes to carry out a high-temperature system-level test. Since there is no need to move the integrated circuits from a high-temperature system-level test to a low-temperature system-level test and vice versa, considerable time is saved and testing efficiency of the system-completed computer is improved. When the integrated circuit 630 switches from a high-temperature test to a low-temperature test, the temperature control device 614 on the automatic plug/unplug apparatus 612 or the temperature control device 613 inside the testing computer 600 may be deployed to decrease temperature of the integrated circuit 630 linearly. In other words, temperature of the integrated circuit 630 is made to fall by the same degrees at each time interval. A system-level test may also be conducted while the temperature of the integrated circuit 630 is dropping too. If abnormal signals from the system-completed testing computer due to the integrated circuit 630 are suddenly detected by the image sensors 616 a and 616 b at a particular temperature, the temperature is recorded as the failure temperature of the integrated circuit 630. Similarly, when the integrated circuit 630 switches from a low-temperature test to a high-temperature test, the temperature control device 614 on the automatic plug/unplug apparatus 612 or the temperature control device 613 inside the testing computer 600 may be deployed to increase temperature of the integrated circuit 630 linearly. In other words, temperature of the integrated circuit 630 is made to rise by the same degrees at each time interval. A system-level test may also be conducted while the temperature of the integrated circuit 630 is rising too. If abnormal signals from the system-completed testing computer due to the integrated circuit 630 are suddenly detected by the image sensors 616 a and 616 b at a particular temperature, the temperature is recorded as the failure temperature of the integrated circuit 630.
However, the applications of this invention are not limited to the aforementioned embodiments. It is possible to control the tested integrated circuit at a number of temperature states when the system-level test is conducted. For example, the integrated circuit may be set to different temperatures including 0° C., 65° C. and 120 ° C. and maintained at that temperature for a few seconds to a few minutes in order to carry out a system-level test. [0058]
To determine if the system-completed computer with the [0059] integrated circuit 630 incorporated therein displays normally on the CRT display 606 a and/or the liquid crystal display 606 a in the system-level test, the following testing method may be employed. When the integrated circuit is undergoing a system-level test, output signals are fed to the CRT display 606 a and the liquid crystal display 606 a. Meanwhile, the image sensors 616 a and 616 b capture images on the CRT display 606 a and the liquid crystal display 606 a, respectively. Thereafter, the captured test output image and the original correct image stored inside the image database 690 are compared to determine if the integrated circuit 630 works normal on the CRT display 616 a or the liquid crystal display 616 b. In general, the types of abnormality that can be detected using the aforementioned testing method include, for example, abnormal vertical lines on the screen, abnormal horizontal lines, abnormal white patches, blurred image or color abnormality. The system-level test can be carried out under a DOS operating system or a Windows operating system. For example, if abnormal white patches appear on the liquid crystal display 606 a, the image sensor 616 b will capture the abnormal white patch on the screen of the liquid crystal display 606 a. When the captured image is compared with a standard image, the control unit 640 is able to determine such abnormality in the integrated circuit 630 on the liquid crystal display 606 a.
According to the test results of the [0060] integrated circuit 630 obtained by the control unit 640, the tested integrated circuit 630 is transferred to the integrated circuit binning apparatus 624 using the automatic plug/unplug apparatus 612 and the automatic transport apparatus 620. The integrated circuit binning apparatus 624 may have a number of temporary holders rather than only two, such as four. One of the temporary holders may be used to hold completely normal integrated circuits 630. A second temporary holder may be used to hold the integrated circuits 630 appearing normal on the CRT display 606 a but abnormal in the liquid crystal display 606 a. A third temporary holder may be used to hold the integrated circuits 630 appearing normal on the liquid crystal display 606 a but abnormal in the CRT display 606 a. A fourth temporary holder may be used to hold the integrated circuits 630 that appear abnormal in both the CRT display 606 a and the liquid crystal display 606 a. In addition, the integrated circuits 630 that fail in the system-level test may be further classified according to the type of abnormality into the ones with abnormal vertical lines, abnormal horizontal lines, abnormal white patches, fuzzy image or abnormal coloration and put them into respective temporary holders. Alternatively, the integrated circuits 630 may be classified according to the results of tests conducted under the DOS operating system, the Windows operating system or some other software systems and hence placed inside a corresponding temporary holder.
FIG. 7 is a schematic diagram showing the system structure of an automatic system-level test apparatus having the capacity of mass testing according to a second preferred embodiment of this invention. The testing apparatus and performing method according to this invention can be applied to mass testing of integrated circuits. To increase productivity, a group of testing [0061] computers 600 may be deployed to test a plurality of integrated circuits 630 at the same time. Since the structural setup of the testing computer 600 is very similar to the ones described in the aforementioned embodiments, detailed description of the setup is not repeated here. First, the integrated circuits 630 are transported by the automatic transport apparatus 620 from the integrated circuit supply apparatus 622 to the testing computer 600. The automatic transport apparatus 620 may comprise a plurality of robotic arms to fulfill this. Thereafter, the integrated circuits 630 are inserted into the corresponding connectors 608 of various testing computers 600 by the automatic plug/unplug apparatus 612. The testing computers 600 each with the integrated circuits 630 plugged therein form a system-completed testing computer 600. Alternatively, the integrated circuits 630 can be transported by the automatic transport apparatus 620 from the integrated circuit supply apparatus 622 to the temperature-presetting devices 623. Hence, integrated circuits 630 can be pre-heated or pre-cooled. After the temperature adjustment, the integrated circuits 630 can be transported by the automatic transport apparatus 620 from the temperature-presetting devices 623 to the corresponding testing computers 600. The integrated circuits 630 are then plugged into corresponding connectors 608 in the testing computers 600 by the automatic plug/unplug apparatus 612. The testing computers each with the corresponding integrated circuits 630 inserted therein form a system-completed testing computer 600. In the present invention, the testing computers 600 can each be provided with one automatic plug/unplug apparatus 612. Or, only one automatic plug/unplug apparatus 612 is provided for all the testing computers 600.
After the [0062] integrated circuits 630 are mounted onto the respective testing computers 600, the input/output device 640 drives the testing computers 600 to carry out a pre-defined testing program including the high-temperature and low-temperature system-level testing mentioned earlier. When a multiple of testing computers 600 undergoes testing operations simultaneously, the image sensors 616 a and 616 b corresponding to each testing computer 600 sense the images on the CRT display 606 a and the liquid crystal display 606 a to determine if the images showing on the CRT display 606 a and the liquid crystal display 606 a are normal. Meanwhile, the operating conditions of each integrated circuit 630 inside the testing computer 600 can be ascertained. Finally, according to the test results, the automatic transport apparatus 620 transports the tested integrated circuits 630 to corresponding temporary holders 624 a, 624 b and 624 c within the integrated circuit binning apparatus 624. Here, the temporary holder 624 a is used for holding integrated circuits 630 that pass the system-level test. The temporary holder 624 b is used for holding integrated circuits 630 that fail some specified functional tests and the temporary holder 624 c is used for holding integrated circuits 630 that fail the system-level test. In this embodiment, three temporary holders are used in the integrated circuit binning apparatus 624, but the number of temporary holders in the integrated circuit binning apparatus 624 is actually unrestricted. The control unit 640 is electrically connected to various testing computers 600, image sensors 616 a and 616 b, the automatic transport apparatus 620 and the automatic plug/unplug apparatus 612. The control unit 640 monitors the testing computers 600 and the states of the image sensors 616 a and 616 b to determine if the integrated circuits 630 operate normally with their corresponding testing computers 600. In addition, the control unit 640 also controls the operation of the automatic transport apparatus 620 and the automatic plug/unplug apparatus 612 so as to control the entire flow of the system-level test.
Note that the main host section may include a plurality of connectors. Hence, the testing method and apparatus according to this invention is capable of testing a plurality of integrated circuits at the same time and determine their mutual compatibility. For example, to assess the compatibility between a system bus controller and different brands of memory as shown in FIG. 7, a memory unit provided by manufacturer A is inserted into a first group of testing computers. Similarly, a memory unit provided by manufacturer B is inserted into a second group of testing computers and so on. In this way, compatibility between different integrated circuits can be assessed. The image sensors may target a particular type of output device or peripheral device to monitor. For example, to monitor a printer, images of printout by the printer are sensed and compared. On the other hand, to monitor an industrial computer, operations of a linked station are sensed and compared. [0063]
In conclusion, the automatic system-level test apparatus and performing method according to this invention includes at least the following major aspects and advantages: 1. The testing method according to this invention is carried out by combining a testing computer (having a main host section and major related peripheral devices) with an integrated circuit to form a system-completed testing computer. Hence, the method not only permits a simulation of end-uses states, but also permits the execution of an actual application software program such as a window operating system or a 3-D image displaying so that quality of the integrated circuit can be assessed. [0064]
2. The automatic system-level test apparatus may include a plurality of integrated circuit connectors such as the connectors for a central processing unit, system bus controller, input/output bus controller or graphic accelerator on a testing computer. Hence, a single testing apparatus is capable of testing a number of integrated circuits. Furthermore, compatibility between different types of integrated circuit can also be assessed. [0065]
3. Through the automatic transport apparatus, the integrated circuit supply apparatus, the integrated circuit binning apparatus and the image sensors, the testing flow is fully automatic. Thus, productivity and testing accuracy is improved while production cost is lowered. [0066]
4. The automatic system-level test apparatus permits high-temperature and low-temperature tests to be carried out without detaching and re-attaching the integrated circuits. Hence, testing time is saved and testing efficiency is increased. [0067]
5. Through a set of temperature control devices, temperature of the test integrated circuits are raised or lowered before conducting the system-level test. [0068]
6. Temperature of the integrated circuits may vary continuously or in steps in the system-level test to discover the temperature at which the circuits fail. [0069]
7. Through the image sensors, this invention is able to monitor the dynamic states of the integrated circuits automatically. Since dynamic errors such as video shaking, discoloring display, ghost shadow, white block or errors in industrial computers are monitored, functionality of the integrated circuit is accurately assessed. [0070]
8. The automatic system-level test apparatus is also capable of detecting any abnormality on a CRT display and a liquid crystal display due to the tested integrated circuit. [0071]
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents. [0072]

Claims

1. An automatic system-level test apparatus for testing integrated circuits, comprising:

at least one testing computer for carrying and testing at least one integrated circuit, wherein the testing computer includes at least one output device for outputting the test results of the integrated circuit;

at least one automatic plug/unplug apparatus for plugging the integrated circuit to the testing computer and unplugging the integrated circuit from the testing computer;

at least one image sensor for capturing an image from the output device; and

at least one control unit electrically connected to the testing computer, the automatic plug/unplug apparatus and the image sensor for controlling the movement of the automatic plug/unplug apparatus and execution of a system-level testing with the testing computer,

wherein the testing computer with the integrated circuit incorporated therein forms a system-completed computer, and the image captured by the image sensor from the output device is compared with an original image stored inside an image database so as to detect a difference between the two images.

2. The test apparatus of claim 1, wherein the test apparatus further comprises a connector through which the integrated circuit is electrically connected to the testing computer.

3. The test apparatus of claim 1, wherein the test apparatus further comprises an audio sensor connected to the control unit for monitoring any audio output from the testing computer.

4. The test apparatus of claim 1, wherein the test apparatus further comprises a temperature control device for controlling the temperature of the integrated circuit.

5. The test apparatus of claim 1, wherein the automatic plug/unplug apparatus includes a robotic arm.

6. The test apparatus of claim 1, wherein the control unit is a computer.

7. The test apparatus of claim 1, wherein the test apparatus further comprises:

an integrated circuit supply apparatus for containing the integrated circuits before testing;

an integrated circuit binning apparatus for containing integrated circuits after testing; and

an automatic transport apparatus for transporting the integrated circuits.

8. The test apparatus of claim 1, wherein the test apparatus further comprises a temperature-presetting device for adjusting the temperature of the integrated circuit before engaging with the testing computer.

9. The test apparatus of claim 1, wherein the test apparatus includes two image sensors and the testing computer includes two output devices, the two output devices are an CRT display and liquid crystal display, and one of the image sensors captures images on the CRT display and the other image sensor captures images on the liquid crystal display.

10. A method of performing a system-level test for an integrated circuit, comprising the steps of:

engaging said integrated circuit with a testing computer so that the testing computer with said integrated circuit engaged therein forms a system-completed computer;

executing a pre-defined testing program in the testing computer to perform the system-level test on the integrated circuit;

capturing an image from an output device coupled to the testing computer by at least one image sensor; and

comparing the image captured by the image sensor with an original image stored inside an image database to determine if a difference exists between the captured image and the stored image.

11. The method of claim 10, wherein the step of engaging the integrated circuit with the testing computer includes transferring the integrated circuit from an integrated circuit supply apparatus to the testing computer and connecting the integrated circuit with the testing computer by using an automatic transport apparatus and an automatic plug/unplug apparatus.

12. The method of claim 10, wherein after the step of comparing the database image with the captured image, further comprises transporting the tested integrated circuit from the testing computer to an integrated circuit binning apparatus by using an automatic transport apparatus and an automatic plug/unplug apparatus.

13. The method of claim 10, wherein said at least one image sensor comprises a first image sensor to capture a first image shown on a CRT display and a second image sensor to capture a second image shown on a LCD display, and said comparing step comprising the following steps: comparing the first image captured by the first image sensor with a first image stored in the testing computer and comparing the second image captured by the second image sensor with a second image stored in the testing computer.

14. The method of claim 13, wherein the image sensors include a charge-coupled device.

15. The method of claim 13, wherein the image sensors include a CMOS image sensor.

16. An image-sensing system inside an integrated circuit test apparatus, comprising:

an image output device for outputting images of a testing computer incorporating said integrated circuit and running a preset testing program; and

an image sensor for capturing the output image.

17. The image-sensing system of claim 16, wherein the system further comprises an image database containing a standard image data for comparing with said output image captured by the image sensor.

18. The image-sensing system of claim 17, wherein the system further comprises a control unit for controlling the operation of the image output device, the image sensor and the image database.

19. The image-sensing system of claim 16, wherein the integrated circuit test apparatus is an automatic system-level test apparatus.

20. The image-sensing system of claim 18, wherein said control unit is a computer.