US20030208732A1

US20030208732A1 - Verification system using symbolic variable reduction

Info

Publication number: US20030208732A1
Application number: US10/422,267
Authority: US
Inventors: Jin Yang
Original assignee: Individual
Current assignee: Individual
Priority date: 2000-09-29
Filing date: 2003-04-23
Publication date: 2003-11-06
Also published as: US6591400B1

Abstract

Methods for formal verification of circuits and other finite-state systems are disclosed herein, providing for improved efficiency and capacity of popular binary decision diagram (BDD) based algorithms. A lazy pre-image computation method is disclosed that builds new transition relation partitions on-demand only for relevant next internal variables of a state predicate. A symbolic variable reduction method is disclosed to eliminate variables in a state predicate under “don't care” conditions. Symbolic variable reduction improves the efficiency for symbolic model checking computations especially lazy pre-image based computations providing means to handle very large-scale integrated circuits and other finite state systems of problematic complexity for prior methods. The teachings of these disclosed methods provide for automated symbolic model checking of circuits and other finite state systems previously too large to be completed successfully using BDD based algorithms.

Description

RELATED APPLICATIONS

This is a divisional of application Ser. No. 09/675,539, filed Sep. 29, 2000, currently pending.[0001]

FIELD OF THE INVENTION

This invention relates generally to automated design verification, and in particular to more efficient use of binary decision diagrams to perform automated symbolic model checking for very large scale integrated circuit designs and other finite state systems.

BACKGROUND OF THE INVENTION

Modern design of very large-scale integrated circuits often involves years of research and the efforts of hundreds of engineers. Automated formal verification methods are an essential part of the design effort, reducing errors, lost time and risk to financial investment.

As the size and complexity of designs increase, much effort is expended to improve the efficiency of automated formal verification methods. One technique used in symbolic model checking to improve efficiency is to employ binary decision diagrams (BDDs). A BDD is a directed acyclic graph that represents a Boolean expression. For each Boolean variable, there are two outgoing edges representing true or false assignments to the variable. The use of BDDs permits computation times, which are, for many practical cases, some polynomial function of the number of expression variables. Alternative representations such as clauses or truth tables require execution times, which are some exponential function of the number of expression variables. Therefore, use of BDDs has been popular in the formal verification community since the late 1980's.

BDDs, however, are not without drawbacks. The ordering of variables is critical to an efficient use of BDDs. Poor variable ordering can increase a BDDs size and cause exponential execution times. One method for symbolic model checking using BDDs comes from Carnegie Mellon University and is known as Symbolic Model Verifier (SMV).

Alternatively SMV uses a well known heuristic based procedure named simplify ₁₃assuming that is aimed at reducing BDD representations by simplifying a predicate but may frequently leave variables in the representation that are unnecessary.

Over the years, techniques have been developed to improve performance and capacity of BDD-based algorithms. One technique is called Cone of Influence (COI) reduction. In COI reduction, an abstraction is built for a circuit model consisting of next state functions only for variables in the dependency closure of variables of interest in the circuit specification. One drawback is that all variables in the dependency closure do not necessarily influence the variables of interest in the circuit specification. A second drawback is that the abstraction that is built and used for each model-checking step may include portions that are useful in only a few of the model checking steps. Therefore needless extra computations are potentially performed, resulting in little benefit to the circuit verification.

Some methods have attempted to improve upon COI reduction by starting from a small portion of the dependency closure and extending the portion only when model checking fails to produce a satisfactory result. But these techniques also perform unnecessary computations on portions that are not relevant to the particular model-checking step being performed.

One method called the bounded cone of influence (BCOI) was proposed by A. Biere et al for symbolic model checking without BDDs [A. Biere, E. Clark, R. Raimi, and Y. Zhu; Verifying safety properties of a PowerPC™ microprocessor using symbolic model checking without BDDs; CAV'99; 1999]. However, even the BCOI method potentially includes irrelevant variables in the abstraction it builds, and the technique is not applicable to improve the widely used BDD-based approaches.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings. [0010]
FIG. 1 illustrates an example of a circuit. FIG. 2[0011] a graphically illustrates a transition relation for a circuit.
FIG. 2[0012] b shows another transition relation built as part of a lazy pre-image computation.
FIG. 3[0013] a illustrates one embodiment of a method for performing lazy pre-image computations.
FIG. 3[0014] b illustrates one embodiment of a more detailed method for performing lazy pre-image computations.
FIG. 4[0015] a illustrates one embodiment of a method for computing a fixpoint using lazy pre-image computations.
FIG. 4[0016] b shows an example of a lazy fixpoint computation for a circuit.
FIG. 5[0017] a illustrates another embodiment of a method for computing a fixpoint using both lazy pre-image computations and symbolic variable reduction.
FIG. 5[0018] b shows another example of a lazy fixpoint computation for a circuit using both lazy pre-image computations and symbolic variable reduction.
FIG. 6[0019] a illustrates one embodiment of a detailed method for performing symbolic variable reduction.
FIG. 6[0020] b shows one embodiment of a more detailed method for performing symbolic variable reduction.
FIG. 7 depicts a computing system for automated lazy symbolic model checking of finite state systems using symbolic variable reduction. [0021]

DETAILED DESCRIPTION

These and other embodiments of the present invention may be realized in accordance with the following teachings and it should be evident that various modifications and changes may be made in the following teachings without departing from the broader spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than restrictive sense and the invention measured only in terms of the claims. [0022]
Methods for formal verification of circuits and other finite-state systems are disclosed herein, providing for improved efficiency and capacity of popular binary decision diagram (BDD) based algorithms. For one embodiment of a lazy pre-image computation, a method is disclosed that builds new transition relation partitions on-demand only for relevant next internal variables of a state predicate, and conjoins only next state relations for relevant next internal variables to a pre-image including the state predicate. For one embodiment of a symbolic variable reduction technique, a method is disclosed that improves the efficiency for symbolic model checking computations especially lazy pre-image based computations providing means to handle very large scale integrated circuits and other finite state systems of problematic complexity for prior methods. For one embodiment of a lazy fixpoint computation, a method is disclosed that makes iterative use of lazy pre-image computation and symbolic variable reduction to compute conditions that necessarily must be satisfied to produce a given set of states. The teachings of these disclosed methods provide for symbolic model checking of circuits and other finite state systems previously too large to be completed successfully using BDD based algorithms. [0023]
FIG. 1 illustrates an example of a circuit [0024] 101 having internal state variables c, d, e and f; and input variables a and b. According to the logical combination of inputs to memory element 102, the value of internal state variable c at its next transition can be determined to be the value of the Boolean expression a AND c. From the logical combination of inputs to memory element 103, the value of internal state variable d at its next transition can be determined to be the value of the input variable b. From the logical combination of inputs to memory element 104, the value of internal state variable e at its next transition can be determined to be the value of the Boolean expression c OR e. Finally, from the logical combination of inputs to memory element 105, the value of internal state variable f at its next transition can be determined to be the value of the Boolean expression c NAND d.
A model of a circuit or other finite state system can be formally defined as: a nonempty finite set of Boolean variables, V=V[0025] _S∪V_Iconsisting of a union V of internal state variables V_Swith input variables V_I; and a next state function N(v) for each v in V_S, which is an assignment mapping of internal state variables according to Boolean (true or false) valued expressions on V. A partitioned transition relation, R, on a partitioning of the internal state variables {V1, V2, . . . , Vk} has the implicitly conjoined form:
R(V, V′)=R1(V,V1′)AND R2(V,V2′) . . . AND Rk(V,Vk′)
where the ith partition is Ri(V,Vi′)=AND[0026] _{for all V′ in Vi′}(v′=N(v)). The assertion v′=N(v) is called the next state relation for v and v′ is a copy of v to record the value taken on by v at the next transition.
A set of states, S, may be represented using a Boolean state predicate S(V). Operations on sets may be carried out as algebraic manipulations of state predicates. The set of states that can move to S in one transition is called the pre-image of S and written [0027]
Pre(S(V))=∃V′.[AND _{for all v′ in V} _S′(v′=N(v))AND S(V′)].
An existential operation ∃V′.[S(V′)] represents a quantification of state predicate S(V′) over the variables in V′. Typically, in order to more efficiently use computation resources, the operation of computing the pre-image of a set of states is carried out as a relation product of state predicates using early variable quantification for partitioned transition relations, thereby permitting staged reductions of Boolean expressions, as follows: [0028] $\begin{matrix} Pre (S (V)) = \exists {V1}^{'} . [R1 (V, {V1}^{'}) AND ( \\ \exists {V2}^{'} . [R2 (V, {V2}^{'}) AND ( \\ \dots \\ \exists Vk . [Rk (V, {Vk}^{'}) AND ( \\ \exists {VI}^{'} . S (V^{'}))] \\ \dots)] \\ )] . \end{matrix}$
One drawback of a typical pre-image computation is that it involves the entire partitioned transition relation. But S(V) may involve only a few variables. Consequently, not all next state relations are relevant in any particular invocation of a pre-image computation. [0029]
For example, FIG. 2[0030] a graphically illustrates a possible transition relation 201 for circuit 101 having V_S={c, d, e, f} and V_I={a, b}. The next state function for variable c is N(c)=a AND c. Therefore, in order for the circuit to reach a state, S(c), where c=1 it must have made transition 211 from a state S(a AND c) where a=1 and c=1. The next state function for variable d is N(d)=b. Therefore, in order for the circuit to reach a state, S(d), where d=1 it must have made transition 219 from a state S(b) where b=1. The next state function for variable e is N(e)=e OR c. Therefore, in order for the circuit to reach a state, S(e), where e=1 it must have made transition 212 from a state S(c) where c=1 or it must have made transition 213 from a state S(e) where e=1. The next state function for variable f is N(f)=d NAND c. Therefore, in order for the circuit to reach a state, S(f), where f=1 it must have made transition 215 from a state S(NOT c) where c=0 or it must have made transition 218 from a state S(NOT d) where d=0.
Computing all states reachable to S(e) in two or more transitions includes the next state function for variable c, which has already been shown as N(c)=a AND c represented by [0031] transition 211. The next state function for variable NOT c is N(NOT c)=NOT(a AND c)=(NOT a) OR (NOT c). Therefore, in order for the circuit 101 to reach a state, S(NOT c), where c=0 it must have made transition 214 from a state S(NOT a) where a=0 or it must have made transition 216 from a state S(NOT c) where c=0. The next state function for variable NOT d is N(NOT d)=NOT b. Therefore, in order for the circuit to reach a state, S(NOT d), where d=0 it must have made transition 217 from a state S(NOT b) where b=0.
For a given state predicate, an invocation of a pre-image computation that uses [0032] transition relation 201 may result in computations that are not relevant to that state predicate. For one embodiment, a lazy pre-image computation is disclosed which provides a relevant transition relation abstraction for each pre-image computation according to the state predicate of the invocation. Such a lazy pre-image computation may be performed for a state predicate S(W), where W is contained in V and W_S′ is the set of next internal variables in the set of next variables W′, as follows:
Pre(S(W))=∃W′.[AND _{for all v′ in W} _S′(v′=N(v))AND S(W′)].
The approach provided by the lazy pre-image computation disclosed above differs from previous COI reduction approaches in that it is not statically derived from a model specification and then used throughout. Instead, it dynamically provides an abstraction for each pre-image computation that is relevant to the particular state predicate associated with the invocation. Accordingly, lazy pre-image computation provides for greater efficiency and capacity improvements in popular BDD-based symbolic model checking methods than previously used pre-image computation methods. [0033]
For example, the lazy pre-image of a state predicate S(e) for circuit [0034] 101 where e=1 can be computed: $\begin{matrix} Pre (S (e)) = \exists e^{'} . [(e^{'} = N (e)) AND S (e^{'})] . \\ = \exists e^{'} . [(e^{'} = e OR c) AND 3^{'}] . \\ = (e OR c) . \end{matrix}$
FIG. 2[0035] b graphically illustrates a possible transition relation 202 for circuit 101 built as a result of an invocation of the lazy pre-image computation Pre(S(e)) on the state predicate S(e) where e=1. The next state function for variable e is N(e)=e OR c. Therefore, in order for the circuit to reach a state, S(e), where e=1 it must have made transition 222 from a state S(c) where c=1 or it must have made transition 223 from a state S(e) where e=1. Since no other transitions are relevant to reaching state S(e), the lazy pre-image method need not build them. As seen in the above example, this lazy pre-image method potentially reduces the number of transition relation partitions involved and also the sizes of partitions. Therefore computations required to explicitly build a BDD for a desired function may be significantly reduced.
For one embodiment, FIG. 3[0036] a illustrates performing a lazy pre-image computation. In processing block 311 transition relation partitions are updated as needed by adding new transition relations for only the relevant next internal variables. In processing block 312 a pre-image is initialized to the next state predicate of the invocation and existentially quantified over the relevant next input variables. In processing block 313, partitions with relevant next variables are identified. Finally in processing block 314, next state relations for relevant variables from the partitions identified in processing block 313 are conjoined to the pre-image and quantified.
The lazy pre-image method disclosed above provides for greater efficiency and capacity for symbolic model checking operations, particularly on circuits with a large number of variables. In a BDD based implementation, building transition relation partitions only as needed and only for relevant next internal variables is especially beneficial since the next state function for an internal variable is efficiently and implicitly encoded, but a BDD for the function must be explicitly built for symbolic model checking. Explicitly building BDDs unnecessarily may become computationally expensive. [0037]
FIG. 3[0038] b details one embodiment of a method for performing a lazy pre-image computation on a state predicate S(W) involving a set W of internal variables and input variables. In processing block 320, W_S′ is initialized to be the set of next internal variables in W′. In processing block 321, W_I′ is initialized to be the set of next input variables in W′. In processing block 322, the next internal variables are checked to identify some variable w′ that has not been evaluated. If one is identified, w′=N(w) is conjoined to the partition including w′ and flow returns to processing block 322 to look for more next variables that have not been evaluated. Thus the transition relation partitions are built as needed for the relevant next internal variables. When no more are found, flow proceeds at processing block 324. In processing block 324 the pre-image is initialized to the state predicate existentially quantified for the relevant next input variables and partition counter i is set to k+1. In processing block 325, i is decremented. Then in processing block 326, partition counter i is tested to see if it has reached zero. If partition counter i has not reached zero, in processing block 327 partition Vi′ is checked against W′ to identify relevant variables. If no relevant variables are found, partition Vi′ is skipped and flow proceeds at processing block 325. Otherwise in processing block 328, all next variables in Vi′ that are not in W′ are existentially quantified out from partition Vi′ and the remaining relevant variables are evaluated according to their next state relations and assigned to Ra. Then in processing block 329, Ra is conjoined with the pre-image Pre and flow proceeds with the next i at processing block 325. When i=0 indicating no more partitions remain at processing block 326, the processing terminates and pre-image Pre is complete.
In one embodiment, the lazy pre-image computation disclosed above provides for potential improvements in key model checking techniques. For example one embodiment of a lazy pre-image method provides an efficient general operation that may also be used effectively in performing fixpoint computations. [0039]
FIG. 4[0040] a illustrates one embodiment of a fixpoint computation method which uses lazy pre-image computations. In processing block 411, a partial fixpoint state predicate, Fix₀, and an initial frontier predicate, Front₀, are both set to the input predicate S(W), and counter i is initialized to 1. In processing block 412, the new frontier predicate, Front_i, is set to the lazy pre-image of the previous frontier predicate, Front_i−1, intersected with the negated partial fixpoint predicate,
Fix_i−1, in order to exclude any states whose pre-images have already been computed. This computation is expressed symbolically as Pre(Front_i−1)

Fix_i−1. In processing block 413 a new fixpoint predicate Fix_iis set to the union of the new frontier predicate, Front_i, and the previous partial fixpoint predicate, Fix_i−1. Counter i is then incremented. In processing block 419, Front_iis tested to see if any states from the previous iteration that need to have pre-images computed remain in the frontier. If so, processing beginning at processing block 412 repeats until Front_iis emptied of such states, in which case processing terminates at processing block 419.
FIG. 4[0041] b illustrates an example of one embodiment of performing a lazy fixpoint computation for state predicate, S(e), where e=1, on circuit 101. The fixpoint Fix₀predicate 420 for the states reachable to S(e) in zero transitions and the frontier Front₀are initially set to e. Since no pre-image computation is required, no transition relation is built. To compute the fixpoint Fix₁predicate 421 for the states reachable to S(e) in one transition a lazy pre-image of the frontier predicate Front₀is computed and combined with NOT Fix₀. Since frontier predicate Front₀only involves signal e, lazy transition relation building only computes a transition relation partition for e, as [N(e)=e OR c]. Lazy pre-image Pre(S(e)) can be computed as previously shown, and the lazy pre-image computation returns e OR c based on the partially computed transition relation. The new frontier predicate Front₁is set to (e OR c) AND NOT e in accordance with processing block 412, which reduces to c AND NOT e. Fixpoint Fix₁predicate 421 for states reachable to S(e) in one transition is set to (c AND NOT e) OR e, which becomes e OR c.
To compute the fixpoint Fix[0042] ₂predicate 422 for those states reachable to S(e) in two transitions, the lazy pre-image of the frontier predicate Front₁is computed and combined with NOT Fix₁. The pre-image is calculated as follows: $\begin{matrix} Pre (C AND NOT e) = \exists e^{'}, c^{'} . [(e^{'} = N (e)) AND (c^{'} = N (c)) AND S (e^{'}, c^{'})] . \\ = \exists e^{'}, c^{'} . [(e^{'} = e OR c) AND (c^{'} = c AND a) AND (c^{'} = c AND a) AND (c^{'} AND NOT e^{'})] . \\ = (c AND a) AND NOT (e OR c) . \end{matrix}$
Alternatively, since Pre(e) has already been computed, what needs to be computed is Pre(c). It will be appreciated that reduction of frontier variables can be an extremely useful operation, providing for improved efficiency in each iteration. A frontier reduction may be accomplished through use of a symbolic variable reduction technique prior to computing the subsequent pre-image so that the pre-image computation may be performed on a smaller predicate. This symbolic variable reduction technique is below disclosed in greater detail. [0043]
Predicate (c AND NOT e) requires lazy transition relation building of the translation relation partition for c, as [N(c)=c AND a]. Lazy pre-image computation returns (c AND a) AND NOT (e OR c) based on the partially computed transition relation. The new frontier predicate Front[0044] ₂is set to (c AND a) AND NOT (e OR c) in accordance with processing block 412, which reduces to (c AND a AND NOT e AND NOT c)=0. Fixpoint Fix₂Predicate 422 for states reachable to S(e) in two transitions becomes just (e OR c).
Since frontier predicate Front[0045] ₂=0 the lazy fixpoint computation terminates. The transition relations for b, d and f are not needed and therefore they are not built.
It will be appreciated that the operations performed in [0046] processing block 412 may cause the number of variables in the frontier predicate Front_ito grow, thereby causing the lazy pre-image computation to be less effective. Therefore, it is again desirable to reduce the number of variables in Front_ithrough use of symbolic variable reduction. Herein, details of one embodiment of a symbolic variable reduction technique will be disclosed.
If, for example, at each iteration, Front[0047] _icould be replaced by a simplified frontier predicate, Front₁′, having fewer variables than Front_i, such that the simplified frontier predicate implicates the partial fixpoint predicate (i.e. Front_i′
Fix_i) and such that the original frontier predicate implicates the simplified frontier predicate (i.e. Front_i
Front_i′), then the efficiency of the lazy pre-image computation in the subsequent iteration could be improved. Hence, the overall efficiency of the fixpoint computation could also be improved. It will be appreciated that the first condition (Front_i′
Fix_i) may be expressed in an equivalent logical form as (Front_i′ AND NOT Fix_i=0). Since it is known that (Front_iAND NOT Fix_i=0), it is possible to derive some conditions for which a “don't care” variable may be eliminated from Front_i′.
If there is a variable v in Front[0048] _ibut not in NOT Fix_ithen v may be eliminated from Front_i′ by existential quantification. This can be expressed as follows:
[(∃v. Front _i)AND NOT Fix _i=0] for any v in Front_ibut not in NOT Fix _i.
If there is a variable v in Front[0049] _iand also in NOT Fix_ithen v may be eliminated from Front_i′ if the intersection of both predicates is empty after v is assigned opposite Boolean values in the two predicates. This can be expressed as follows:
[(∃v.Front _i)AND NOT Fix _i=0]
[(Front _i[1/v]AND NOT Fix _i[0/v]=0)AND(Front _i[0/v]AND NOT Fix _i[1/v]=0)].
If there is a variable w in Front[0050] _isuch that for any variable v in NOT Fix_ithe intersection of the two predicates is empty for all assignments to v, then w may be eliminated from Front_i′ by existential quantification. This can be expressed as follows:
[(∃w.Front _i)AND NOT Fix _i=0]
[(∃w.Front _i)AND(NOT Fix _i[0/v]=0)]AND[(∃w.Front _i)AND(NOT Fix _i[1/v]=0)].
FIG. 5[0051] a illustrates one embodiment of an improved fixpoint computation method which uses lazy pre-image computations and a symbolic variable reduction technique according to the observations disclosed above. In processing block 511, a partial fixpoint state predicate, Fix₀, and an initial frontier predicate, Front₀, are both set to S(W), and counter i is initialized to 1. In processing block 512, the new frontier predicate, Front_i, is set to the lazy pre-image of the previous frontier predicate, Front_i−1, intersected with the negated partial fixpoint predicate,
Fix_i−1, in order to exclude any states whose pre-images have already been computed. This computation is expressed symbolically as Pre(Front_i−1)

Fix_i−1. In processing block 513 a new fixpoint predicate Fix_iis set to the union of the new frontier predicate, Front₁, and the previous partial fixpoint predicate, Fix_i−1, which may be seen as expressing conditions for reduction of “don't care” variables. In processing block 518, the variables in frontier predicate, Front_i, are reduced according to the above disclosed conditions with respect to the negated partial fixpoint predicate,
Fix_i. Counter i is then incremented. In processing block 519, Front_iis tested to see if any states that need to have pre-images computed remain in the frontier. If so, processing beginning at processing block 512 repeats until Front_iis emptied of such states, in which case processing terminates at processing block 519.
FIG. 5[0052] b illustrates an example of one embodiment of performing a lazy fixpoint computation using a symbolic variable reduction technique for state predicate, S(e), where e=1, on circuit 101. The fixpoint, Fix₀predicate 520 for the states reachable to S(e) in zero transitions and the frontier Front₀are initially set to e. Since no pre-image computation is required, no transition relation is built. To compute the fixpoint Fix₁predicate 521 for the states reachable to S(e) in one transition a lazy pre-image of the frontier predicate Front₀is computed and combined with NOT Fix₀. Since frontier predicate Front₀only involves signal e, lazy transition relation building only computes a transition relation partition for e, as [N(e)=e OR c]. A lazy pre-image Pre(S(e)) can be computed as previously shown, and the lazy pre-image computation returns e OR c based on the partially computed transition relation. The new frontier predicate Front₁is set to (e OR c) AND NOT e in accordance with processing block 512, which reduces to c AND NOT e. Fixpoint Fix₁predicate 521 for states reachable to S(e) in one transition is set to (c AND NOT e) OR e, which becomes e OR c.
This time, in accordance with [0053] processing block 518 the variables may be reduced for Front₁=(c AND NOT e) using NOT Fix₁=NOT(e OR c). Since the variable e appears in both predicates, the following conditions are checked: $\begin{matrix} ({Front}_{1} [1 / e] AND NOT {Fix}_{1} [0 / e]) = (c AND NOT 1) AND NOT (0 OR c) = \\ 0 AND NOT c = 0. \\ AND \\ ({Front}_{1} [0 / e] AND NOT {Fix}_{1} [1 / e] = 0) \\ (c AND NOT 0) AND NOT (1 OR c) = \\ c AND NOT 1 = 0. \end{matrix}$
Accordingly, the frontier predicate Front[0054] ₁may be reduced to c.
To compute the fixpoint Fix[0055] ₂predicate 522 for those states reachable to S(e) in two transitions, the lazy pre-image of the reduced frontier predicate Front₁is computed and combined with NOT Fix₁. The pre-image is calculated as follows: $\begin{matrix} Pre (c) = \exists c^{'} . [(c^{'} = N (c)) AND S (c^{'})] . \\ = \exists c^{'} . [(c^{'} = c AND a) AND (c^{'})] . \\ = (c AND a) . \end{matrix}$
The predicate c requires lazy transition relation building of the translation relation partition for c, as [N(c)=c AND a]. Lazy pre-image computation returns (c AND a) based on the partially computed transition relation. The new frontier predicate Front[0056] ₂is set to (c AND a) AND NOT (e OR c) in accordance with processing block 512, which reduces to (c AND a AND NOT e AND NOT c)=0. Fixpoint Fix₂Predicate 522 for states reachable to S(e) in two transitions becomes just (e OR c).
Since frontier predicate Front[0057] ₂=0 the lazy fixpoint computation terminates. The transition relations for b, d and f are not needed and therefore they are not built and the number of variables in the frontier are reduced by a symbolic variable reduction technique further providing reduced computational complexity and storage requirements for the lazy pre-image computations.
FIG. 6[0058] a illustrates a more detailed method for one embodiment of a symbolic variable reduction computation according to a set of conditions with respect to a frontier predicate and a negated partial fixpoint predicate as disclosed above.
In [0059] processing block 611, the recursive method entry point, the negated partial fixpoint predicate is NOT Fix_d, and frontier predicate is Front_i. A variable v is selected from the variables in NOT Fix_d, or Front_d. In processing block 612, the recursive method terminates if Front_dis constant, returning Front_das a result, or if NOT Fix_dis constant, returning 1 as a result. In processing block 613 the recursive depth is increased to d+1. If v is in frontier predicate, Front_d, but not in negated partial fixpoint predicate, NOT Fix_d, then processing proceeds to processing block 614 where v is eliminated from Front_dby making a recursive call with arguments (Front_d[1/v] OR Front_d[0/v]) and NOT Fix_d. Otherwise processing proceeds to processing block 615.
In [0060] processing block 615, if v is in frontier predicate, Front_d, and also in negated partial fixpoint predicate, NOT Fix_d, then processing proceeds to processing block 616 where v may be eliminated from Front_dby making a recursive call with arguments (Front_d[1/v] OR Front_d[0/v]) and NOT Fix_dif the intersection of NOT Fix_d[0/v] when v set to zero (or false) and Front_d[1/v] when v set to one (or true) and the intersection of NOT Fix_d[1/v] when v set to one (or true) and Front_d[0/v] when v set to zero (or false) are both empty. Otherwise processing proceeds in processing block 617.
In [0061] processing block 617, if v is in negated partial fixpoint predicate, NOT Fix_d, but not in frontier predicate, Front_d, then processing proceeds to processing block 618 where another variable w is eliminated from Front_dif the intersection of Front_dwith NOT Fix_d[1/v] when v set to one (or true) and also with NOT Fix_d[0/v] when v set to zero (or false) are both empty by making a recursive call with arguments Front_dand (NOT Fix_d[1/v] OR NOT FiX_d [0/V]). Upon return from a recursive call processing block 619, the result is returned as Front _d.
It will be appreciated that the recursive method of FIG. 6[0062] a may also be performed as an iterative method. It will also be appreciated that previously computed results may be stored, for example in a hash table, to further reduce recursive computations.
FIG. 6[0063] b shows in detail, one alternative embodiment of the symbolic variable reduction of processing block 616. In processing block 615, if v is in frontier predicate, Front_d, and also in negated partial fixpoint predicate, NOT Fix_d, then processing proceeds to processing block 621. Otherwise processing proceeds in processing block 617.
In [0064] processing block 621, it is understood that v may be eliminated from Front_dif the intersection of NOT Fix_d[0/v] when v set to zero (or false) and Front_d [1/v] when v set to one (or true) and the intersection of NOT Fix _d[1/v] when v set to one (or true) and Front_d[0/v] when v set to zero (or false) are both empty. To accomplish this, a first recursive call is made with arguments Front_d[1/v] and (NOT Fix_d[1/v] OR NOT Fix_d[0/v]). Processing then proceeds to processing block 622 where a second recursive call is made with arguments Front_d[0/v] and (NOT Fix_d[1/v] OR NOT Fix_d[0/V]). Upon return from the recursion processing proceeds in processing block 623 where the two results Front_d[1/v] and Front_d[0/v] are tested for equality. If they are found to be equal then processing terminates in processing block 624 and the result Front_d[1/v] may be returned. Otherwise processing proceeds in processing block 625 where the two intersections NOT Fix_d[0/v] AND Front_d [1/v] and NOT Fix _d [1/v] AND Front _d[0/v] are checked. If they are both empty then processing terminates in processing block 626 and the result (Front_d[1/v] OR Front_d[0/v]) may be returned. Otherwise processing terminates in processing block 627 and the result ((v AND Front_d[1/v]) OR (NOT v AND Front_d[0/v])) may be returned.
The above symbolic variable reduction method is illustrated by way of example and not limitation. The method may also be applicable to any reduction of variables in a predicate P under a don't care condition Q by solving a symbolic variable reduction with the arguments P and NOT(P OR Q). [0065]
It will be appreciated that the methods herein disclosed or methods substantially similar to those herein disclosed may be implemented in one of many programming languages for performing automated computations including but not limited to lazy pre-image computations, symbolic variable reduction, lazy fixpoint computations using symbolic variable reduction, and lazy model checking using symbolic variable reduction on high-speed computing devices. [0066]
For example, FIG. 7 illustrates a computer system to perform computations, for one such embodiment. [0067] Processing device 722 is connectable with various recordable storage media, transmission media and I/O devices to receive data structures and programmed methods. Representative data structures 701 may include circuit descriptions 711, transition relations 712, and finite state models 713. Representative programmed methods 702 may include symbolic variable reduction programs 714, lazy pre-image programs 715, lazy fixpoint computation programs 716, and model checking programs 717. Components of either or both of the data structures and programmed methods may be stored or transmitted on recordable media such as removable storage disks 725, which may be accessed through an access device 726 in processing device 722 or in a storage serving system 721. Storage serving system 721 or processing device 722 may also include other removable storage media or non-removable storage media suitable for storing or transmitting data structures 701 or programmed methods 702. Component data structures and programmed methods may also be stored or transmitted on transmission media such as network 724 for access by processing device 722 or entered by users through I/O device 723. It will be appreciated that systems such as the one illustrated are commonly available and widely used in the art of designing finite state hardware and software systems. It will also be appreciated that the complexity, capabilities, and physical forms of such design systems improves and changes rapidly, and therefore understood that the design system illustrated is by way of example and not limitation.
The above description is intended to illustrate preferred embodiments of the present invention. From the discussion above it should also be apparent that the invention can be modified in arrangement and detail by those skilled in the art without departing from the principles of the present invention within the scope of the accompanying claims. [0068]

Claims

What is claimed is:

1. A verification system comprising:

means for identifying a don't care variable in a first state predicate; and

means for producing a reduced second state predicate from the first state predicate.

2. The verification system of claim 1 further comprising:

means for performing lazy pre-image computations on the reduced second predicate.

3. A verification system comprising:

means for identifying a don't care variable in a first state predicate and a don't care condition; and

4. The verification system of claim 3 wherein the second state predicate is implied by the first state predicate and wherein the second state predicate implies the first state predicate or the don't care condition.

5. The verification system of claim 3 further comprising:

6. A verification system comprising:

a recordable medium to store executable instructions;

a processing device to execute executable instruction; and

a plurality of executable instructions to cause the processing device to:

identify a first variable of a state predicate, P, under a condition predicate, Q; such that there exists a reduced state predicate, P′, not including the first variable and satisfying the relation:

(P

P′) AND (P′

(P OR Q)); and

produce the state predicate, P′, by eliminating the first variable from the state predicate, P.

7. The verification system of claim 6 wherein a first value is substituted for said first variable.

8. The verification system of claim 7 wherein a constant logical value is substituted for the first variable in (P OR Q).

9. A verification system comprising:

a recordable medium to store executable instructions;

a processing device to execute executable instruction; and

a plurality of executable instructions to cause the processing device to:

eliminate a variable in a state predicate under a don't care condition by a symbolic variable reduction having a first argument involving the state predicate and a second argument involving a union of the state predicate and the don't care condition.

10. The verification system of claim 9 wherein said plurality of executable instructions are further to cause the processing device to:

identify a first case when the variable is in the first argument and not in the second argument.

11. The verification system of claim 10 wherein said plurality of executable instructions are further to cause the processing device to:

identify a second case when the variable is in the first argument and in the second argument.

12. The verification system of claim 11 wherein said second case being identified, said plurality of executable instructions are further to cause the processing device to:

substitute a first value for the variable in the first argument and substitute a second value for the variable in the second argument

check if an intersection of the first argument having the first value substituted for the variable with the second argument having the second value substituted for the variable is empty.

13. A verification system comprising:

a recordable medium to store executable instructions;

a processing device to execute executable instruction; and

a plurality of executable instructions to cause the processing device to:

eliminate a variable, v, in a state predicate, P, under a don't care condition, Q.

14. The verification system of claim 13 wherein said plurality of executable instructions cause the processing device to:

eliminate said variable, v, by a symbolic variable reduction having a first argument involving the state predicate, P, and a second argument involving a union of the state predicate, P, and the don't care condition, Q.

15. The verification system of claim 14 wherein said wherein the second argument is a negated union of the state predicate, P, and the don't care condition, Q.

16. The verification system of claim 14 wherein said wherein a first value is substituted for the variable the first argument.

17. The verification system of claim 16 wherein said wherein a second value is substituted for the variable the second argument.

18. The verification system of claim 14 wherein said wherein said plurality of executable instructions cause the processing device to:

eliminate said variable, v, from the first argument if it can be identified that said variable, v, is in the first argument and is not in the second argument;

else if it can be identified that said variable, v, is in the first argument and in the second argument, substitute a first value and a second value for said variable, v, in the first argument and for said variable, v, in the second argument,

form a first intersection of the first argument having the first value substituted for said variable, v, with the second argument having the second value substituted for said variable, v,

form a second intersection of the first argument having the second value substituted for said variable, v, with the second argument having the first value substituted for said variable, v, and if the first intersection and the second intersection are empty, eliminate said variable, v, from the first argument.

19. The verification system of claim 18 wherein it can be identified that said variable, v, is in the second argument and is not in the first argument, said plurality of executable instructions cause the processing device to:

eliminate a variable, w, by a recursive symbolic variable reduction having a first recursive argument involving the state predicate, P, and a second recursive argument involving the second argument having said variable, v, eliminated.

20. The verification system of claim 19 wherein said second recursive argument involves a negated intersection of the second argument having the first value substituted for said variable, v, with the second argument having the second value substituted for said variable, v.