US20030194035A1 - Method to synchronise data and a transmitter and a receiver realising said method - Google Patents

Method to synchronise data and a transmitter and a receiver realising said method Download PDF

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Publication number
US20030194035A1
US20030194035A1 US10/436,620 US43662003A US2003194035A1 US 20030194035 A1 US20030194035 A1 US 20030194035A1 US 43662003 A US43662003 A US 43662003A US 2003194035 A1 US2003194035 A1 US 2003194035A1
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Prior art keywords
data
receiver
transmitter
dat
trigger signals
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US10/436,620
Inventor
Frank Van Der Putten
Paul Pierre Spruyt
Karel Adriaensen
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Alcatel Lucent SAS
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Alcatel Alsthom Compagnie Generale dElectricite
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Priority claimed from EP96402393A external-priority patent/EP0841766B1/en
Application filed by Alcatel Alsthom Compagnie Generale dElectricite filed Critical Alcatel Alsthom Compagnie Generale dElectricite
Priority to US10/436,620 priority Critical patent/US20030194035A1/en
Publication of US20030194035A1 publication Critical patent/US20030194035A1/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/062Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0623Synchronous multiplexing systems, e.g. synchronous digital hierarchy/synchronous optical network (SDH/SONET), synchronisation with a pointer process
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/062Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0632Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0079Receiver details
    • H04L7/0083Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Definitions

  • the present invention relates to a method to synchronise data as described in the preamble of claim 1, and a transmitter and a receiver realising said method as described in the preambles of claim 4 and claim 6.
  • Such a method to synchronise data is common knownledge. Indeed, e.g. in communication systems where data is sent from a transmitter to a receiver, for the receiver to be able to interprete the received data, the received data have to be synchronised in the receiver with a reference signal, usual a clock signal of the receiver. Realising synchronisation implies more complexity and therefore there is a need for additional hardware or software in the receiver. The trade-offs are generally between expense and complexity, on one hand, and error performance on the other hand. However, some kind of receivers e.g. receivers using asymmetric digital subscriber line technology are required to have both, a low complexity and also a low error performance.
  • An object of the present invention is to provide a method to synchronise data and a transmitter and a receiver realising said method of the above known type but which are suited for use in communication systems where a low complexity and a low error performance are required at the receiving side of the communication system.
  • this object is achieved by the method to synchronise data as described in claim 1, and the transmitter and the receiver realising the method as described in claim 4 and claim 6, respectively.
  • the transmitter is able to send the data to the receiver upon receipt of the trigger signals i.e. at the right time to ensure synchronisation between the data received in the receiver and the available signal e.g. a clock signal in the receiver.
  • the complexity of the synchronisation process is moved from the receiver side to the transmitter side of the communication system and each level of synchronisation can be realised with the required level of error performance and without making the receiver too complex.
  • the data, sent from the transmitter to the receiver is asynchronous data. Indeed, upon receipt of the trigger signals, the transmitter must be able to send data even if the trigger signals are sent in an asynchronous way. This is for instance the case when the receiver has to receive the data at a time moment at which the data has just to fit at a predefined place in a frame. In this way frame synchronisation is achieved.
  • Yet another charaderistic feature of the present invention is that in the event that no data is available in the transmitter to be sent upon receipt of the trigger signals, the transmitter is able to generate idle data and to send this idle data to the receiver. In this way, e.g. the frame synchronisation proces is not disturbed. This is described in the method of claim 3 and the transmitter of claim 8.
  • an important application of the present invention is that the receiver is included in an asymmetric digital subscriber line (ADSL) modem. This is described in claim 5.
  • ADSL asymmetric digital subscriber line
  • the received data is framed into an asymmetric digital subscriber line frame and sent over twisted pair.
  • ADSL modems using the known synchronisdtion methods, when the modem receives data at a higher frequency than the frequency at which the data is sent, the data has to be buffered before being framed.
  • the asymetric digital subscriber line modem gets rid of the buffering aspect.
  • FIGURE is a block scheme of a synchronisation system including a transmitter and a receiver realising the method of the invention.
  • the synchronisation system includes a transmitter TX and an asymmetric digital subscriber line modem (ADSL modem) ADSL.
  • ADSL modem asymmetric digital subscriber line modem
  • the transmitter TX includes four functional blocks
  • a trigger receiving means T-RX a trigger receiving means T-RX.
  • the buffer BUF is included to buffer the data DAT presented to the transmitter TX.
  • This data DAT can be digital data of any kind, however, for this embodiment the data DAT is asynchronous data i.e. data organised following the asynchronous transfer mode (ATM) technique.
  • ATM asynchronous transfer mode
  • the buffer BUF buffers the data DAT presented to the transmitter TX.
  • the buffer BUF will only do this when it is nessary i.e. when the transmitter receives more data DATA then he is allowed to send.
  • the idle data generating means ID-GEN is included to generate idle data. It has to be remarked that this one of the typical ATM functionalities. Idle data is send whenever there is no information available at the side of the sender at the moment of transmission. They allow a full asynchronous operation of both sender and receiver.
  • the data sending means DAT-SEND is included to send data from the transmitter TX to the ADSL modem.
  • This data can be useful user information i.e. the data DAT coming from the buffer BUF or idle data, coming from the idle data generating means ID-GEN.
  • the trigger receiving means T-RX is included to receive trigger signals T coming from the ADSL modem. Upon receipt of such a trigger signal, the data sending means DAT-SEND is on his turn triggered by the trigger receiving means T-RX and is allowed to send data.
  • the ADSL modem includes besides a receiver RX also the characteristic functional blocks of an ADSL modem. Since the description of the ADSL technology goes beyond the scope of this invention, these functional blocks are not shown in the FIGURE. However, it is worth to mention here that one of the functional blocks of such an ADSL modem is a framer which organizes overhead information and user information i.e. the incoming data DAT into ADSL frames, i.e. uniformly sized groups of bits used to organize the ADSL data stream.
  • the receiver RX includes three functional blocks
  • trigger generating means T-GEN T-GEN
  • data receiving means DAT-RX DAT-RX.
  • the trigger generating means T-GEN is included to generate trigger signals T from an available signal SIG in the receiver RX.
  • This available signal SIG is generated in accordance with the time moments whenever data DAT is needed to fit into an available ADSL frame on a predetermined place.
  • This signal S is not necessary a clock signal. Indeed, looking to the form of an ADSL frame, not the whole frame must be filled with data DAT, so by consequence, the signal S is not a signal with a constant frequency.
  • the trigger signals T are allowed to be of any kind e.g. one single bit pulse or a predefined codeword as long as the trigger generating means T-GEN of the receiver RX and the trigger receiving means T-RX of the transmitter TX are lined up with each other.
  • the trigger sending means T-SEND is included to send the trigger signals T from the receiver RX to the transmitter TX and the data receiving means DAT-RX is included to receive the data DAT coming from the transmitter TX.
  • the transmission medium for sending the trigger signals is in the FIGURE depicted as a separate line to simplify the description of the working of the system. However these signals can (and usually are) transmitted over the same transmission medium, i.e. twisted pair, as the data.
  • a trigger signal T is generated from the available signal SIG and transmitted to the transmitter TX.
  • the trigger receiving means T-RX gives a signal to the data sending means DAT-SEND, e.g. by means of a controle signal, and DAT-SEND on his turn requests data DAT to the buffer BUF.
  • the data DAT is provided to the data sending means DAT-SEND.
  • the synchronisation process may not be disturbed and the data sending means DAT-SEND requests idle data to the idle data generating means ID-GEN.
  • the data either user data or idle data, is sent to the receiver RX and arrives there at the right moment to fit immediately into the ADSL frame on the predetermined place whereby synchronisation is established between the data DAT and the available signal SIG.
  • the transmitter TX upon receipt of a trigger signal T, the transmitter TX has to send data DAT to the receiver RX.
  • Sending data can be done immediately after receiving of the trigger signal T, however the invention is not restricted to such kind of synchronisation systems but is also applicable for synchronisation systems where the data DAT is only sent after a predetermined period.
  • the total period between the moment of generating a particular trigger and the moment of data DAT arriving at the receiver RX to fit into a according predefined ADSL frame must be taken into account at initialisation time. It can be necessary to have a predetermined waiting period somewhere in the loop in order to be able to realise the synchronisation. Since the complexity is moved from the receiver RX to the transmitter TX, this waiting period will also be realised by the transmitter TX.

Abstract

A method to realise synchronisation in a receiver (RX), of data (DAT) sent from a transmitter (TX) to the receiver (RX), with a signal (SIG) available in the receiver (RX). The method includes the following steps:
in the receiver (RX) generating trigger signals (T) from the signal (S);
sending the trigger signals (T) from the receiver (RX) to the transmitter (TX);
upon receipt of the trigger signals (T) by the transmitter (TX) sending the data (DAT) from the transmitter (TX) to the receiver (RX).

Description

  • The present invention relates to a method to synchronise data as described in the preamble of claim 1, and a transmitter and a receiver realising said method as described in the preambles of claim 4 and claim 6. [0001]
  • Such a method to synchronise data is common knownledge. Indeed, e.g. in communication systems where data is sent from a transmitter to a receiver, for the receiver to be able to interprete the received data, the received data have to be synchronised in the receiver with a reference signal, usual a clock signal of the receiver. Realising synchronisation implies more complexity and therefore there is a need for additional hardware or software in the receiver. The trade-offs are generally between expense and complexity, on one hand, and error performance on the other hand. However, some kind of receivers e.g. receivers using asymmetric digital subscriber line technology are required to have both, a low complexity and also a low error performance. [0002]
  • An object of the present invention is to provide a method to synchronise data and a transmitter and a receiver realising said method of the above known type but which are suited for use in communication systems where a low complexity and a low error performance are required at the receiving side of the communication system. [0003]
  • According to the invention, this object is achieved by the method to synchronise data as described in claim 1, and the transmitter and the receiver realising the method as described in claim 4 and claim 6, respectively. [0004]
  • Indeed, due to the trigger signals generated from the signal available in the receiver and sent to the transmitter, the transmitter is able to send the data to the receiver upon receipt of the trigger signals i.e. at the right time to ensure synchronisation between the data received in the receiver and the available signal e.g. a clock signal in the receiver. In this way, the complexity of the synchronisation process is moved from the receiver side to the transmitter side of the communication system and each level of synchronisation can be realised with the required level of error performance and without making the receiver too complex. [0005]
  • Another characteristic feature of the present invention is that the data, sent from the transmitter to the receiver, is asynchronous data. Indeed, upon receipt of the trigger signals, the transmitter must be able to send data even if the trigger signals are sent in an asynchronous way. This is for instance the case when the receiver has to receive the data at a time moment at which the data has just to fit at a predefined place in a frame. In this way frame synchronisation is achieved. [0006]
  • Yet another charaderistic feature of the present invention is that in the event that no data is available in the transmitter to be sent upon receipt of the trigger signals, the transmitter is able to generate idle data and to send this idle data to the receiver. In this way, e.g. the frame synchronisation proces is not disturbed. This is described in the method of claim 3 and the transmitter of claim 8. [0007]
  • An important application of the present invention is that the receiver is included in an asymmetric digital subscriber line (ADSL) modem. This is described in claim 5. In such receiver, the received data is framed into an asymmetric digital subscriber line frame and sent over twisted pair. However in known ADSL modems using the known synchronisdtion methods, when the modem receives data at a higher frequency than the frequency at which the data is sent, the data has to be buffered before being framed. As already mentioned above, it is important to keep the complexity of a receiver in such a modem low. By using the method of the invention, the asymetric digital subscriber line modem gets rid of the buffering aspect. In fact the buffering is again moved from the receiver to the transmitter which now must be able to buffer the data until he receives a trigger signal of the receiver to hove the permission to sent the data to the receiver. Therefore, this way of synchronising is expecially suited for systems wherein there is anyway buffering foreseen at the transmitting side, e.g. for Asynchronous Transmission Mode (ATM) systems. [0008]
  • The above mentioned and other objects and features of the invention will become more apparent and the invention itself will be best understood by referring to the following description of an embodiment taken in conjunction with the accompanying FIGURE which is a block scheme of a synchronisation system including a transmitter and a receiver realising the method of the invention. [0009]
  • Referring to the FIGURE, the working of the synchronisation system will be described. First, the working of the synchronisation system will be explained by means of a functional description of the blocks shown in the FIGURE. Based on this description implementation of the functional blocks will be obvious to a person skilled in the art and will therefor not be described in detail. In addition, the principle working of the synchronisation system will be described in further detail. [0010]
  • The synchronisation system includes a transmitter TX and an asymmetric digital subscriber line modem (ADSL modem) ADSL. [0011]
  • The transmitter TX includes four functional blocks [0012]
  • a buffer BUF; [0013]
  • an idle data generating means ID-GEN [0014]
  • a data sending means DAT-SEND; and [0015]
  • a trigger receiving means T-RX. [0016]
  • The buffer BUF is included to buffer the data DAT presented to the transmitter TX. This data DAT can be digital data of any kind, however, for this embodiment the data DAT is asynchronous data i.e. data organised following the asynchronous transfer mode (ATM) technique. As mentioned, the buffer BUF buffers the data DAT presented to the transmitter TX. However, it has to be understood that the buffer BUF will only do this when it is nessary i.e. when the transmitter receives more data DATA then he is allowed to send. [0017]
  • The idle data generating means ID-GEN is included to generate idle data. It has to be remarked that this one of the typical ATM functionalities. Idle data is send whenever there is no information available at the side of the sender at the moment of transmission. They allow a full asynchronous operation of both sender and receiver. [0018]
  • The data sending means DAT-SEND is included to send data from the transmitter TX to the ADSL modem. This data can be useful user information i.e. the data DAT coming from the buffer BUF or idle data, coming from the idle data generating means ID-GEN. [0019]
  • The trigger receiving means T-RX is included to receive trigger signals T coming from the ADSL modem. Upon receipt of such a trigger signal, the data sending means DAT-SEND is on his turn triggered by the trigger receiving means T-RX and is allowed to send data. [0020]
  • The ADSL modem includes besides a receiver RX also the characteristic functional blocks of an ADSL modem. Since the description of the ADSL technology goes beyond the scope of this invention, these functional blocks are not shown in the FIGURE. However, it is worth to mention here that one of the functional blocks of such an ADSL modem is a framer which organizes overhead information and user information i.e. the incoming data DAT into ADSL frames, i.e. uniformly sized groups of bits used to organize the ADSL data stream. [0021]
  • The receiver RX includes three functional blocks [0022]
  • trigger generating means T-GEN; [0023]
  • trigger sending means T-SEND; and [0024]
  • data receiving means DAT-RX. [0025]
  • The trigger generating means T-GEN is included to generate trigger signals T from an available signal SIG in the receiver RX. This available signal SIG is generated in accordance with the time moments whenever data DAT is needed to fit into an available ADSL frame on a predetermined place. This signal S is not necessary a clock signal. Indeed, looking to the form of an ADSL frame, not the whole frame must be filled with data DAT, so by consequence, the signal S is not a signal with a constant frequency. [0026]
  • It has to be remarked here that the trigger signals T are allowed to be of any kind e.g. one single bit pulse or a predefined codeword as long as the trigger generating means T-GEN of the receiver RX and the trigger receiving means T-RX of the transmitter TX are lined up with each other. [0027]
  • The trigger sending means T-SEND is included to send the trigger signals T from the receiver RX to the transmitter TX and the data receiving means DAT-RX is included to receive the data DAT coming from the transmitter TX. [0028]
  • The transmission medium for sending the trigger signals is in the FIGURE depicted as a separate line to simplify the description of the working of the system. However these signals can (and usually are) transmitted over the same transmission medium, i.e. twisted pair, as the data. [0029]
  • The principle working of the synchronisation system will be described in the following paragraph. [0030]
  • Whenever data DAT is needed to fit in an available ADSL frame on a predetermined place, a trigger signal T is generated from the available signal SIG and transmitted to the transmitter TX. Upon receipt of a trigger signal T the trigger receiving means T-RX gives a signal to the data sending means DAT-SEND, e.g. by means of a controle signal, and DAT-SEND on his turn requests data DAT to the buffer BUF. When there is data DAT available in the buffer BUF, the data DAT is provided to the data sending means DAT-SEND. However, when no data DAT is available in the buffer, the synchronisation process may not be disturbed and the data sending means DAT-SEND requests idle data to the idle data generating means ID-GEN. The data, either user data or idle data, is sent to the receiver RX and arrives there at the right moment to fit immediately into the ADSL frame on the predetermined place whereby synchronisation is established between the data DAT and the available signal SIG. [0031]
  • It has to be remarked that upon receipt of a trigger signal T, the transmitter TX has to send data DAT to the receiver RX. Sending data can be done immediately after receiving of the trigger signal T, however the invention is not restricted to such kind of synchronisation systems but is also applicable for synchronisation systems where the data DAT is only sent after a predetermined period. Indeed, in this particular embodiment, the total period between the moment of generating a particular trigger and the moment of data DAT arriving at the receiver RX to fit into a according predefined ADSL frame must be taken into account at initialisation time. It can be necessary to have a predetermined waiting period somewhere in the loop in order to be able to realise the synchronisation. Since the complexity is moved from the receiver RX to the transmitter TX, this waiting period will also be realised by the transmitter TX. [0032]
  • It has to be remarked that due to the cell structure of the ATM data stream whenever idle data, not corresponding to a complete idle cell has been sent, that upon receipt of subsequent trigger signals T idle data has to be sent until the complete idle cell is transmitted, even if in the mean time some data DAT becomes available in the buffer BUF. [0033]
  • While the principles of the invention have been described above in connection with specific apparatus, it is to be clearly understood that this description is made only by way of example and not as a limitation on the scope of the invention. [0034]

Claims (8)

1. A method to realise synchronisation in a receiver (RX), of data (DAT) sent from a transmitter (TX) to said receiver (RX), with a signal (SIG) available in said receiver (RX), characterised in that said method includes the steps of:
in said receiver (RX) generating trigger signals (T) from said signal (SIG);
sending said trigger signals (T) from said receiver (RX) to said transmitter (TX);
upon receipt of said trigger signals (T) by said transmitter (TX) sending said data (DAT) from said transmitter (TX) to said receiver (RX).
2. The method according to claim 1, characterised in that said data (DT) is asynchronous data.
3. The method according to claim 1, characterised in that said method further includes in the event that no data is available in said transmitter (TX) to be sent upon receipt of said trigger signals, sending idle data from said transmitter (TX) to said receiver (RX).
4. A receiver (RX) for receiving from a transmitter (TX) data (DAT), said data (DAT) having to be synchronous with a signal (SIG) available in said receiver (RX), characterised in that said receiver (RX) includes:
trigger generating means (T-GEN) to generate trigger signals (T) from said signal (SIG);
trigger sending means (T-SEND) to send said trigger signals (T) from said receiver (RX) to said transmitter (TX);
data receiving means (DAT-RX) to receive said data (DAT) sent by said transmitter (TX) upon receipt of said trigger signals (T) to said receiver (RX).
5. The receiver (RX) according to claim 4, characterised in that said receiver (RX) is included in an asymmetric digital subscriber line modem.
6. A transmitter (TX) for transmitting data (DAT) to a receiver (RX), said data (DAT) having to be synchronous with a signal (SIG) available in said receiver (RX), characterised in that said transmitter (TX) includes
trigger receiving means (T-RX) to receive trigger signals T), generated by said receiver (RX) from said signal (SIG) and sent from said receiver (RX) to said transmitter (TX);
data sending means (DAT-SEND) to send data (DAT) from said transmitter (TX) to said receiver (RX) upon receipt of said trigger signals (T).
7. The transmitter (TX) according to claim 6, characterised in that said transmitter (TX) includes means to send said data (DAT) in an asynchronous way.
8. The transmitter (TX) according to claim 6, characterised in that said transmitter (TX) includes idle data generating means (ID-GEN) to generate idle data and to send said idle data from said transmitter (TX) to said receiver (RX) in the event that no data (DAT) is available in said transmitter (TX) upon receipt of said trigger signals (T).
US10/436,620 1996-11-08 2003-05-13 Method to synchronise data and a transmitter and a receiver realising said method Abandoned US20030194035A1 (en)

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EP06402393.1 1996-11-08
EP96402393A EP0841766B1 (en) 1996-11-08 1996-11-08 Method to synchronise data transmission between a receiver and a transmitter
US5212697P 1997-07-10 1997-07-10
US08/965,136 US5903612A (en) 1996-11-08 1997-11-06 Method to synchronize data and a transmitter and a receiver realizing said method
US09/280,435 US6845136B1 (en) 1996-11-08 1999-03-29 Method to synchronize data and a transistor and a receiver realizing said method
US10/436,620 US20030194035A1 (en) 1996-11-08 2003-05-13 Method to synchronise data and a transmitter and a receiver realising said method

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US6845136B1 (en) 2005-01-18
US5903612A (en) 1999-05-11

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