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Publication numberUS20030155247 A1
Publication typeApplication
Application numberUS 10/078,766
Publication date21 Aug 2003
Filing date19 Feb 2002
Priority date19 Feb 2002
Publication number078766, 10078766, US 2003/0155247 A1, US 2003/155247 A1, US 20030155247 A1, US 20030155247A1, US 2003155247 A1, US 2003155247A1, US-A1-20030155247, US-A1-2003155247, US2003/0155247A1, US2003/155247A1, US20030155247 A1, US20030155247A1, US2003155247 A1, US2003155247A1
InventorsTakeshi Miura, Masaru Seita, Yasuo Ota
Original AssigneeShipley Company, L.L.C.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Electrolysis of copper compound; adjustment ph
US 20030155247 A1
Abstract
An electroplating solution comprising copper ions and a complexing agent for the copper ions and has a pH in the range of 4 to 10. The electroplating solution of the present invention makes it possible to fill trenches or via holes on silicon wafers for providing copper wiring with copper in a defect-free manner by preventing the seed layer from dissolving in the plating solution.
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Claims(4)
What is claimed is:
1. An electroplating solution comprising copper ions and a complexing agent for the copper ions and having a pH in the range of 4 to 10.
2. An electroplating process using an electroplating solution comprising copper ions and a completing agent for the copper ions and having a pH in the range of 4 to 10.
3. The electroplating process according to claim 2, wherein the plating is applied on the silicon wafer on which a conductive seed layer has been formed.
4. A silicon wafer plated with an electroplating solution comprising copper ions and a complexing agent for the copper ions and having a pH in the range of 4 to 10.
Description
BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to an electroplating solution that can provide a microdefect-free plated copper layer with improved adherence to form Cu wiring on a silicon wafer. The present invention also relates to a plating process using such an electroplating solution, as well as to a silicon wafer obtained through such a plating process.

[0003] 2. Description of the Related Art

[0004] In response to the trend toward development of electronic devices such as personal computers with higher performance than ever and miniaturization of these devices, a process of forming wiring on silicon wafers has been devised and become widely used, in which, in place of conventional aluminum wiring, a copper layer with extremely high electroconductivity is deposited in trenches and/or via holes formed on the silicon wafer to form wiring with improved performance.

[0005] When it is desired to deposit the electroconductive layer in trenches or via holes of silicone wafers to form wiring, dry processes such as CVD and PVD including sputtering and ion plating have been conventionally used. Drawbacks of these techniques include low work efficiency in the dry process and unreliable Cu wiring due to the voids that, when the Cu layer is formed by sputtering, remain in trenches or via holes that have been incompletely filled with copper. This incomplete filling arises because in the dry processes, the Cu layer is formed at a substantially faster rate at the openings of the trenches and via holes than inside them, plugging up the openings before the trenches and via holes have been completely filled.

[0006] For this reason, a plating technique known as copper sulfate plating has recently been employed for forming an electroconductive film and filling trenches and via holes in silicon wafers and thereby form Cu wiring. While the copper sulfate plating, a wet process, offers high work efficiency and achieves complete filling of the trenches and via holes with copper, leaving no void, it requires that an electroconductive layer be deposited on the surfaces of the silicon wafers, as well as on the inner surfaces of the trenches and via holes, prior to application of the plating, due to the nature of the copper sulfate plating as an electroplating technique. This surface conductive layer, which serves as an undercoat of the plating, is commonly referred to as a seed layer and is generally formed by CVD or PVD including sputtering and ion plating.

[0007] Although the seed layer is generally formed to an average thickness of 100 to 200 nm in the flat region of a silicon wafer and to an average thickness of 10 nm on the inner sides of trenches and via holes, the thickness can vary significantly with the thinnest part having a thickness less than half the average thickness.

[0008] Thus, when electroplating is applied on top of the seed layer by using the copper sulfate plating solution, which is strongly acidic, the seed layer often dissolves in the plating solution at a significantly fast rate so that relatively thin parts of the seed layer may completely dissolve upon electroplating, which makes it difficult to ensure sufficient adhesion between the seed layer and the plating. Moreover, as it dissolves during the electroplating, the seed layer may be partially lost and, as a result, copper deposition may not take place in some part in the trenches or via holes, or, in an extreme case, electric current may not be able to flow through the trenches or via holes due to the missing seed layer and copper deposition may not take place at all, resulting in defects in plating. For this reason, copper sulfate plating cannot be applied to silicon wafers with particularly small trenches and via holes.

[0009] In short, formation of micro patterns of wiring, an essential requirement for improving the performance of semiconductor devices, cannot be achieved through the use of the copper sulfate plating solution.

[0010] Since such defects are more likely to occur in the trenches or via holes with smaller sizes, it is difficult to design smaller patterns on the silicon wafers. Accordingly, novel plating techniques have been longed for that can provide copper plating without causing deterioration of the seed layer and thus make it possible to pursue smaller patterns on the silicon wafers and semiconductor devices so as to improve their performances.

[0011] Electroless copper deposition, on the other hand, does not require a highly acidic plating solution like the copper sulfate plating solution so that the seed layer is less susceptible to the plating solution. In this technique, however, catalysts such as palladium must be adsorbed onto the inside of trenches or via holes prior to plating. As a result, the heterogeneous metal may contaminate the Cu layer that serves as wiring, lowering the electric characteristics as well as reliability of the wiring. Furthermore, the bath control is more difficult in the electroless copper plating than in the electrolytic copper plating since reducing agents would decompose while the plating solution is used. Also, the electroless copper plating solution contains harmful substances such as formaldehyde, which serves as a reducing agent, and a cyanide compound, which serves as a stabilizing agent.

SUMMARY OF THE INVENTION

[0012] Accordingly, it is an objective of the present invention to provide an efficient plating solution that can completely fill trenches or via holes without a defect such as voids when it is used to form copper wiring on silicon wafers. It is also an objective of the present invention to provide a plating process that takes advantage of such a plating solution.

[0013] In an effort to find a way to solve the above-mentioned problems, the present inventor has found that, when copper wiring is to be formed on silicon wafers, it is possible to fill up trenches or via holes of the silicon wafers with copper, without causing any defects such as void, by applying electroplating to the silicon wafers on top of the conductive seed layer using a plating solution that contains copper ions and a complexing agent for the copper ions and has a pH in a predetermined range.

[0014] Accordingly, the present invention provides an electroplating solution that contains copper ions and a complexing agent for the copper ions and has a pH in the range of 4 to 10. The present invention further provides a plating process using such an electroplating solution. When the plating process of the present invention is used to form copper wiring on a silicon wafer, the plating is applied on the silicon wafer on which a conductive seed layer has been formed. The present invention also provides a silicon wafer plated with the electroplating solution of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] These and other objectives and advantages of the present invention will become apparent from the following description with reference to the accompanying drawings, wherein:

[0016]FIG. 1 is a scanning ion micrograph showing a cross-section of via holes formed on a silicon wafer fabricated in accordance with Example 3 of the present invention; and

[0017]FIG. 2 is a scanning ion micrograph showing a cross-section of via holes formed on a silicon wafer fabricated in accordance with Comparative Example.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] The present invention will now be described in further detail.

[0019] An electrolytic copper plating solution of the present invention contains cupper ions and a complexing agent for the copper ions. The copper ions may be added to the electrolytic copper plating solution in the form of salts. Any known copper salt that can serve as a copper ion source may be used in the electrolytic copper plating solution. In this regard, various types of copper salts can be used to serve as the copper salt of the present invention provided that their anions do not impose adverse effects on the electrolytic copper plating solution.

[0020] Examples of the preferred copper salt include, but are not limited to, copper sulfate, copper chloride, copper hydroxide, copper acetate, copper sulfamate, copper pyrophosphate, copper carbonate and copper oxide. Of these, copper sulfate, copper hydroxide, copper chloride and salts of copper with the later-described complexing agent are particularly preferred.

[0021] For example, the electrolytic copper plating solution has a copper concentration of 0.5 to 60 g/L, preferably 5 to 20 g/L.

[0022] Alternatively, an anode may be used to serve as the source of copper ions. Examples of the preferred anode include soluble anodes including oxygen-free copper anodes and phosphorus-containing copper anodes. Insoluble anodes such as platinum, titanium, stainless, iridium oxide and graphite may also be used.

[0023] Examples of the preferred complexing agent for use in the present invention include any material that can form a complex with copper ions, such as polyamine and salts thereof, aminocarboxylic acid and salts thereof, aminealkanol compounds, oxycarboxylic acid and salts thereof, cyclic acid-imide compounds, and organic phosphonic acid and salts thereof.

[0024] The polyamine may be either a straight-chained or cyclic polyamine. Examples of the straight-chained polyamine include ethylenediamine, diethylenetriamine, diethylenetetramine and triethylenetetramine while examples of the cyclic polyamine include piperazine, imidazolidine and pyrazolidine. These compounds may be provided in the forms of salts such as sulfates, chlorides, nitrates and acetates.

[0025] Examples of the amino carboxylic acid include glycine, iminodiacetic acid, nitrilotriacetic acid, hydroxyethylethylenediaminetriacetic acid, tetrahydroxyethylenediamine, dihydroxymethylethylenediaminediacetic acid, ethylenediaminetetracetic acid, cyclohexane-1,2-diaminetetracetic acid, ethyleneglycoldiethyletherdiaminetetracetic acid, ethylenediaminetetrapropionic acid and N,N,N′,N′-tetrabis-2-(2-hydroxypropyl)ethylenediamine. These compounds may be provided in the forms of salts including salts formed with alkali metals such as sodium and potassium, and ammonium salts.

[0026] Examples of the alkanolamine compounds include monoethanolamine, diethanolamine and triethanolamine.

[0027] Examples of the oxycarboxylic acid include tartaric acid, citric acid, gluconic acid, succinic acid and malic acid. These may be provided in the forms of salts including salts formed with alkali metals such as sodium and potassium, and ammonium salts.

[0028] Examples of the cyclic acid-imide compound include cyclic acid-imide compounds that contains one or two nitrogen atoms in one molecule of that compound, such as succinimide, phthalimide, hydantoin and 5,5-dimethylhydantoin.

[0029] The organic phosphonic acid may be any compound that has a plurality of phosphonic acid groups in one molecule of that compound and has one of the chemical structures shown below, and salts thereof:

[0030] Formula 1

[0031] where X1 is selected from the group consisting of hydrogen atom, C1-5 alkyls, aryl, arylalkyl, amino, or C1-5 alkyls substituted with hydroxyl, carboxyl (—COOH) or phosphonic acid group (—PO3MM′); M and M′ are each selected from the group consisting of hydrogen atom, sodium, potassium and ammonium (NH4) and may or may not be identical to one another; and m and n are each an integer from 0 to 5;

[0032] Formula 2

[0033] where X2 is one selected from the group consisting of —CH2—, —CH(OH)—, —C(CH3)(OH)—, —CH(COOM)— or —C(CH3)(COOM)—; or

[0034] Formula 3

[0035] where X3 through X7 are each independently selected from hydrogen atom, C1-5 alkyls, aryl, arylalkyl, amino, phosphonic acid group (—PO3H2), or C1-5 alkyls substituted with hydroxyl, carboxyl (—COOH) or phosphonic acid group (—PO3H2), given that at least two of X3 through X7 are phosphonic acid group (—PO3H2) or C1-5 alkyl substituted with phosphonic acid group (—PO3H2).

[0036] The C1-5 alkyl may be either straight-chained or branched and includes methyl, ethyl, propyl, isopropyl, butyl, isobutyl and sec-butyl. The aryl may be phenyl or naphthyl. The arylalkyl may be any combination of the aforementioned alkyls and aryls.

[0037] Specific examples of the complexing agent for use with the above-mentioned organic phosphonic acid having a plurality of phosphonic acid groups include aminotrimethylenephosphonic acid, 1-hydroxyethylidene-1,1-diphosphonic acid, ethylenediaminetetramethylenephosphonic acid, diethylenetriaminepentamethylenephosphonic acid or salts thereof formed with sodium, potassium or ammonium.

[0038] The complexing agent for use in the present invention may be either a single agent or a mixture of two or more agents.

[0039] The complexing agent for use in the present invention is used in the concentration range of, for example, 0.05 to 2.0 mol/L, preferably 0.2 to 1.0 mol/L. It is particularly preferred that the amount of the complexing agent be equal to or greater than that of copper ions in the plating solution for use in the present invention. Preferably, the molar ratio of copper ions to the complexing agent is in the range of 1:1 to 1:25, more preferably 1:1 to 1:10 (copper ion:complexing agent). If the concentration of the complexing agent is lower than either 0.05 mol/L or the molar concentration of copper ion in the plating solution, the complexing agent cannot keep copper ions in the plating solution in a stable manner, leading to the formation of copper precipitation. On the other hand, a concentration of the complexing agent higher than 2.0 mol/L is economically unfavorable since further increase in its effect is hardly expected.

[0040] The electroplating solution of the present invention can be obtained by adding an acidic or basic compound to a solution containing the copper salt and the complexing agent to adjust the solution to a pH of 4 to 10, preferably 7 to 10. It is particularly important to maintain the solution in this pH range since the dissolving rate at which the seed layer deposited in the trenches or via holes of a silicon wafer into the plating solution can be substantially decreased by performing plating in this pH range.

[0041] Examples of the basic compound for adjusting the pH of the plating solution include sodium hydroxide, potassium hydroxide, ammonium hydroxide, monoethanolamine, diethanolamine, triethanolamine, ethylenediamine, diethylenetriamine and triethylenetetramine, while examples of the acidic compound include sulfuric acid, hydrochloric acid, phosphoric acid, organic sulfonic acids, phosphonic acids and carboxylic acids. These basic compounds and acidic compounds may or may not be the same as the above-mentioned complexing agents.

[0042] When necessary, a brightener is added to the electroplating solution of the present invention in order to improve characteristics of the electroplating solution and film characteristics of the deposits. Any known material that has been conventionally used in copper plating can be used as the brightener. Examples thereof include sulfur compounds such as sulfides and thio-compounds and nitrogen-containing heterocyclic compounds that are soluble in the plating solution.

[0043] A wetting agent may be added to the electroplating solution of the present invention in order to improve wetting characteristics of articles to be plated. Any known material that has been conventionally used in copper plating can be used as the wetting agent. Examples of such material include nonionic surfactants, anionic surfactants, cationic surfactants and amphoteric surfactants. The cationic surfactants and the amphoteric surfactants to serve as the wetting agent may or may not be the same material as the above-described additives or the complexing agents.

[0044] While the electrolytic copper plating solution of the present invention has a substantially high conductivity, a conductive salt may further be added if necessary. Examples of the conductive salt include sulfates, organic sulphonates, phosphates and salts of carboxylic acids.

[0045] If necessary, any known additive may be added to the electrolytic copper plating solution of the present invention.

[0046] While the electroplating solution of the present invention and the electroplating process using the same plating solution may be used in practically any electroplating application, they are particularly useful for electroplating silicon wafers, especially those with trenches and via holes. The term “trench” as used herein means a groove formed on a silicon wafer and may be of any cross-sectional shape such as rectangular, square or trapezoidal shape. A trench can be characterized by its aspect ratio, which is given by the depth divided by the width of the trench. Preferably, a trench has an aspect ratio of 0.1 to 30, particularly 0.5 to 10.

[0047] The term “via hole” as used herein means a hole formed on a wafer and may be formed as a blind hole with one end closed. While a via hole may be of any cross-sectional shape, it preferably has a rectangular or trapezoidal cross-sectional shape. A via hole generally has a diameter of 0.05 to 1.0 μm while one with the diameter of 0.15 to 0.5 μm is particularly preferred.

[0048] Trenches or via holes can be formed on silicon wafers by using dry etching techniques such as reactive ion etching (RIE) and plasma etching.

[0049] A barrier layer may be provided on the surface of silicon wafers, trenches or via holes. The purpose of the barrier layer is to prevent the deposited copper from dispersing on the surface of the silicon wafer to alter the semiconductor characteristics. The barrier layer can be formed on the surface of the silicon wafer, or inside the trenches or via holes, by depositing a layer of Ti, TiN, Ta, TaN, W and WN using PVD techniques including sputtering and ion plating or CVD techniques.

[0050] A conductive seed layer is deposited on the surface of silicon wafer, or inside the trenches or via holes, prior to application of electrolytic copper plating. The seed layer is formed by depositing a layer of a highly conductive metal (e.g., copper) using PVD techniques such as sputtering and ion plating or CVD techniques. While the seed layer may be of any thickness, the layer that is 1 nm thick is sufficient to be formed inside the trenches or via holes.

[0051] When the electrolytic copper plating is applied in the trenches or via holes of a silicon wafer, the trenches or via holes may be filled completely with copper using the electrolytic copper plating solution of the present invention, or they may first be filled halfway and then applied with a highly acidic or highly basic copper plating solution to be filled completely. The electrolytic copper plating solution of the present invention reinforces the seed layer and adds thickness to the seed layer within the trenches or via holes of silicon wafers so that a highly acidic or highly basic copper plating solution, which would otherwise corrode the seed layer, can be used to plate the silicon wafer.

[0052] In the present invention, electrolysis is carried out at a temperature of 10 to 70° C., preferably 20 to 40° C. Sufficient conductivity cannot be obtained if the temperature is lower than, or equal to, 10° C., whereas decomposition of the complexing agent unfavorably accelerates at temperatures higher than, or equal to, 70° C.

[0053] In the present invention, electrolysis is carried out at a cathode current density of 0.1 to 4.0 A/dm2, preferably 0.5 to 2.0 A/dm2. If the cathode current density is excessively small, it takes considerable amount of time to achieve the plated layer of desired thickness, reducing productivity, whereas if the cathode current density is excessively large, copper deposits cannot be obtained as desired since copper ions are depleted at the surface of the cathode, especially within the trenches and via holes.

[0054] While a general-purpose DC power source can be used to apply plating using the plating solution of the present invention, a pulse power source or a PR power source is particularly effective in improving uniformity of electroplating. Current-reverse electrolysis, which switches polarity faster than the conventional PR electrolysis, is also effective.

[0055] Unlike the conventional sulfuric acid copper plating solution, which is highly acidic, the electrolytic copper plating solution of the present invention has a pH ranging from weakly acidic to weakly basic pH (pH 4-10), preferably from neutral to weakly basic pH (pH 7-10). For this reason, the electrolytic copper plating solution of the present invention makes it possible to fill the trenches or via holes with copper without causing any defects such as voids while minimizing damage to the seed layer formed on a silicon wafer, which is susceptible to highly acidic conditions. Accordingly, copper wiring is achieved using defect-free trenches or via holes.

EXAMPLES

[0056] The present invention will now be described with reference to Examples and Comparative Examples in further detail. Examples and Comparative Examples are only illustrative and are not intended to limit the scope of the invention in any way.

[0057] A typical process of the present invention involves following steps:

[0058] 1. formation of trenches and via holes.

[0059] 2. deposition of a TaN barrier layer using sputtering technique.

[0060] 3. deposition of a Cu seed layer using sputtering technique.

[0061] 4. application of electrolytic copper plating in accordance with the present invention, the pH of which ranges from weakly acidic to weakly basic.

Example 1 A Weakly Acidic Plating Solution 1 in Accordance with the Present Invention

[0062]

Cu ions 10 g/L
(added as copper sulfate)
citric acid 0.25 mol/L
potassium hydroxide 45 g/L
pH 4.5
temperature 25° C.
current density 0.5 A/dm2
time 10 min.

Example 2 A Weakly Acidic Plating Solution 2 in Accordance with the Present Invention

[0063]

Cu ions 10 g/L
(added as copper sulfate)
ethylenediamine 0.5 mol/L
sulfuric acid 20 g/L
pH 5.0
temperature 25° C.
current density 0.5 A/dm2
time 10 min.

Example 3 A Weakly Basic Plating Solution 1 in Accordance with the Present Invention

[0064]

Cu ions 10 g/L
(added as copper sulfate)
hydroxyethylethylenediaminetriacetic acid 0.15 mol/L
triethanolamine 0.65 mol/L
pH 8.4
temperature 25° C.
current density 0.5 A/dm2
time 10 min.

Example 4 A Weakly Basic Plating Solution 2 in Accordance with the Present Invention

[0065]

Cu ions 10 g/L
(added as copper acetate)
aminotri (methylenephosphonic acid) 0.5 mol/L
potassium hydroxide 90 g/L
pH 9.0
temperature 25° C.
current density 0.5 A/dm2
time 10 min.

Example 5 A Weakly Basic Plating Solution 3 in Accordance with the Present Invention

[0066]

Cu ions 15 g/L
(added as copper hydroxide)
1-hydroxyethylene-1,1-diphosphonic acid 0.5 mol/L
potassium hydroxide 110 g/L
pH 9.6
temperature 25° C.
current density 0.5 A/dm2
time 10 min.

Example 6 A Weakly Basic Plating Solution 4 in Accordance with the Present Invention

[0067]

Cu ions 15 g/L
(added as copper acetate)
ethylenediaminetetra (methylenephosphonic acid) 0.5 mol/L
aqueous ammonia (35%) 100 mL/L
pH 7.4
temperature 25° C.
current density 0.5 A/dm2
time 10 min.

Comparative Example

[0068] 1. formation of trenches and via holes.

[0069] 2. deposition of a TaN barrier layer using sputtering technique.

[0070] 3. deposition of a Cu seed layer using sputtering technique.

[0071] 4. application of copper sulfate plating.

[0072] Plating Solution A Copper Sulfate Plating Solution of Known Composition

Cu ions 17.5 g/L
(added as copper sulfate)
sulfuric acid 175 g/L
Cl ions 50 mg/L
Additive 5 mL/L
pH 1 or less
temperature 25° C.
current density 1 A/dm2
time 5 min.

[0073] Evaluation Test 1 Dissolving Rate of Seed Layer.

[0074] Small pieces of a silicon wafer with a deposited seed layer were immersed in the plating solutions. The thickness of the seed layer was measured for each piece using a fluorescent X-ray film thickness meter, and the dissolving rate of the seed layer was determined from the decrease in thickness.

[0075] Temperature of plating solution: 25° C.

[0076] Immersion time: 10 min.

[0077] Solution: not stirred

[0078] Measurement was taken by fluorescent X-ray film thickness meter. Average of five measurements was taken.

[0079] Seed layer: made of copper; formed by sputtering to a thickness of 100 nm.

TABLE 1
Results
Dissolving rate of seed layer
Weakly acidic copper plating 0.3 nm/min.
bath 1 of the present
invention
Weakly acidic copper plating 0.7 nm/min.
bath 2 of the present
invention
Weakly basic copper plating 0.3 nm/min.
bath 1 of the present
invention
Weakly basic copper plating 0.9 nm/min.
bath 2 of the present
invention
Weakly basic copper plating 0.8 nm/min.
bath 3 of the present
invention
Weakly basic copper plating 0.5 nm/min.
bath 4 of the present
invent ion
Copper sulfate plating bath 2.5 nm/min.

[0080] Evaluation Test 2: Test for Plating Applied to via Holes on a Silicon Wafer.

[0081] Copper plating was applied to the silicon wafer having via holes by the above-described steps. It was observed that the via holes were filled with copper. The via holes, the barrier layer and the seed layer were formed under the same conditions for all of Examples and Comparative Example.

[0082] Via hole size: 0.35 μm in diameter, 1.6 μm in depth.

[0083] Barrier layer: made of TaN; formed by sputtering.

[0084] Seed layer: made of copper; formed by sputtering.

[0085] Observation: Silicon wafer was cut by a focused ion beam (FIB), and the cross-section was observed using scanning ion microscopy (SIM).

TABLE 2
Results
Plating bath Degree of via Occurrence of
used hole filling defects
Example 1 Weakly acidic Completely 0/5
bath 1 filled
Example 2 Weakly acidic Completely 0/6
bath 2 filled
Example 3 Weakly basic Completely 0/5
bath 1 filled
Example 4 Weakly basic Completely 0/6
bath 2 filled
Example 5 Weakly basic Completely 0/6
bath 3 filled
Example 6 Weakly basic Completely 0/6
bath 4 filled
Comparative Copper sulfate Seed layer was 6/6
Example 1 bath lost and no
copper deposits
formed at the
bottom of via
holes.

[0086] It has been made clear from the results of Examples 1 to 6 according to the present invention that, through the use of the method of the present invention, the seed layer was prevented from dissolving into the plating solution and copper wiring can be provided by filling trenches or via holes of silicon wafers with copper in a defect-free manner.

[0087] On the other hand, the seed layer dissolved in the plating solution in Comparative Example, in which a copper sulfate solution was used. Thus, it has been shown that via holes cannot be filled with copper through this process.

[0088] While there has been described what are at present considered to be preferred embodiments of the present invention, it will be understood that various modifications may be made thereto, and it is intended that the appended claims cover all such modifications as fall within the true spirit and scope of the invention.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US6770559 *29 Oct 20023 Aug 2004Advanced Micro Devices, Inc.Method of forming wiring by implantation of seed layer material
US684817728 Mar 20021 Feb 2005Intel CorporationIntegrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US690884528 Mar 200221 Jun 2005Intel CorporationIntegrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US711288723 Nov 200426 Sep 2006Intel CorporationIntegrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US857441820 Sep 20065 Nov 2013AlchimerElectroplating method for coating a substrate surface with a metal
US8591715 *4 May 200926 Nov 2013AlchimerElectrodeposition composition and method for coating a semiconductor substrate using the said composition
US8808525 *15 Jul 200919 Aug 2014Enthone Inc.Cyanide free electrolyte composition for the galvanic deposition of a copper layer
US20090035603 *7 Feb 20075 Feb 2009Hitachi Metals, Ltd.,Method for producing rare earth metal-based permanent magnet having copper plating film on surface thereof
US20090294293 *4 May 20093 Dec 2009AlchimerElectrodeposition composition and method for coating a semiconductor substrate using the said composition
US20110127074 *27 May 20092 Jun 2011Mitsui Mining & Smelting Co., Ltd.Method for roughening treatment of copper foil and copper foil for printed wiring boards obtained using the method for roughening treatment
US20110180415 *15 Jul 200928 Jul 2011Enthone Inc.Cyanide free electrolyte composition for the galvanic deposition of a copper layer
US20130224948 *28 Feb 201229 Aug 2013Globalfoundries Inc.Methods for deposition of tungsten in the fabrication of an integrated circuit
Classifications
U.S. Classification205/157, 205/291
International ClassificationC25D7/12, C25D3/38
Cooperative ClassificationC25D3/38, C25D7/123
European ClassificationC25D3/38, C25D7/12
Legal Events
DateCodeEventDescription
20 Aug 2002ASAssignment
Owner name: SHIPLEY COMPANY, L.L.C., MASSACHUSETTS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MIURA, TAKESHI;SEITA, MASARU;OTA, YASUO;REEL/FRAME:013214/0781;SIGNING DATES FROM 20020502 TO 20020507