US20020173069A1 - Mounting structure of semiconductor chip, semiconductor device and method of making the semiconductor device - Google Patents
Mounting structure of semiconductor chip, semiconductor device and method of making the semiconductor device Download PDFInfo
- Publication number
- US20020173069A1 US20020173069A1 US09/958,094 US95809401A US2002173069A1 US 20020173069 A1 US20020173069 A1 US 20020173069A1 US 95809401 A US95809401 A US 95809401A US 2002173069 A1 US2002173069 A1 US 2002173069A1
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- US
- United States
- Prior art keywords
- semiconductor chip
- insulated substrate
- semiconductor device
- protective resin
- mounting structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
The present invention provides a mounting structure of a semiconductor chip (3) onto an insulated substrate (2). The insulated substrate (2) is made of a polyimide resin, at least side surfaces (3 c) of the semiconductor chip (3) is protected by a protective resin (5) provided by a polyimide resin. The semiconductor chip (3) is held by the protective resin (5) with respect to the insulated substrate (2). Preferably, an adhesive layer (4) is provided between the semiconductor chip (3) and the insulated substrate (2). The adhesive layer (4) is also provided by a polyimide resin.
Description
- The present invention relates to a mounting structure of a semiconductor chip onto a polyimide substrate, a semiconductor device having this mounting structure and a method of manufacturing this semiconductor device.
- There is already known a semiconductor device having a mounting structure in which a semiconductor chip is mounted on an insulated substrate. An example of the structure is shown in FIG. 12. A semiconductor device7 shown in this figure comprises a
semiconductor chip 70 and aninsulated substrate 71. Thesemiconductor chip 70 has amounting surface 70 a, which is connected with asurface 71 a of theinsulated substrate 71 via an adhesive 72 such as an epoxy resin. Thesemiconductor chip 70 haselectrodes 70 b faced onto and electrically connected with connectingterminals 71 b of the insulatedsubstrate 71. The insulatedsubstrate 71 is a flexible film of e.g. a polyimide resin, and formed with a plurality of throughholes 71 c disposed in a grid pattern, each leading to one of the connectingterminals 71 b. Via these throughholes 71 c, each of theconnecting terminals 71 b is electrically connected with asolder terminal 72 formed on the other side of theinsulated substrate 71. Thesemiconductor chip 70 hasside surfaces 70 c surrounded by aprotective resin 73 provided by e.g. an epoxy resin. Thesolder terminals 72 are disposed in a grid pattern correspondingly to the throughholes 71 c, and specifically called BGA (Ball Grid Array). - The
protective resin 73 is formed by first applying the epoxy resin which is not yet fully hardened in thermosetting process, to enclose theside surfaces 70 c of thesemiconductor chip 70, and then heating at a temperature of 150° C. through 200° C. to complete the thermosetting process. Theprotective resin 73 shrinks as it is thermally set, and shrinks further as it is cooled down to the room temperature. The insulatedsubstrate 71 also shrinks. However, an amount of shrinkage in the insulatedsubstrate 71 is smaller than that of the protective resin73, since the insulatedsubstrate 71 is formed of polyimide resin which is superior to the protective resin 73 (epoxy resin) in terms of heat resistance and has a smaller coefficient of thermal shrinkage. In addition, since theinsulated substrate 71 is flexible, theinsulated substrate 71 is sometimes warped when the epoxy resin cools after the thermal setting. If the insulatedsubstrate 71 is warped, the insulatedsubstrate 71 can no longer sit horizontally, and when placed, thesolder terminals 72 closer to the edge of the insulatedsubstrate 71 are raised higher. This potentially causes an open circuit when the semiconductor device 7 is mounted onto a circuit substrate for example. - There is another problem. The
adhesive 74 which connects thesemiconductor chip 70 with the insulatedsubstrate 71 is commonly provided by an epoxy resin. Therefore, again due to difference in the amount of thermal shrinkage between theinsulated substrate 71 and theadhesive 74, interfaces of theadhesive 74 with theinsulated substrate 71 and with thesemiconductor chip 70 come under a certain strain. Therefore, according to the mounting structure as in the semiconductor device 7 shown in FIG. 12, in which an electrode bearing surface (the mounting surface) 70 a is faced to theinsulated substrate 71, the circuit element of thesemiconductor chip 70 comes under the strain, and could be damaged. - It is therefore an object of the present invention to avoid the warp of the insulated substrate and damage to the semiconductor chip, and to provide a mounting structure of the semiconductor chip capable of offering a good performance for a long time.
- Another object of the present invention is to provide a semiconductor device having such a mounting structure.
- Still another object of the present invention is to provide a method for favorably manufacturing the semiconductor device having such a mounting structure.
- A first aspect of the present invention provides a mounting structure of a semiconductor chip onto an insulated substrate, in which the insulated substrate is made of a polyimide resin, at least a side surface of the semiconductor chip is protected by a protective resin provided by a polyimide resin, and the semiconductor chip is held by the protective resin with respect to the insulated substrate.
- According to this arrangement, since the side surface of the semiconductor chip is enclosed by a polyimide resin, the semiconductor chip as mounted has its side surface protected. Further, since the semiconductor chip is held with respect to the insulated substrate, by a polyimide resin which is the same kind of resin that provides the insulated substrate, the following effects are obtained. First, the warp in the insulated substrate can be avoided. This is because the insulated substrate and the polyimide resin that encloses the semiconductor chip expand to a more or less the same extent if heated, and shrink to a more or less the same extent when cooled, in a process such as mounting the semiconductor chip. Second, a high level of adhesion is achieved between the insulated substrate and the resin that encloses the semiconductor chip, making possible to favorably keep a state of holding (state of mounting) and a state of protection of the semiconductor chip.
- Preferably, the protective resin rides on an upper surface of the semiconductor chip. This arrangement offers the following effects. First, the polyimide resin which rides on the surface that is away from the insulated substrate reduces movement of the semiconductor chip away from the insulated substrate, keeping more favorably the state of mounting of the semiconductor chip. Second, if an external force is applied to an angled portion of the semiconductor chip as mounted, the external force does not act directly on the angled portion, and thus damage to the semiconductor chip is small.
- Further, the protective resin may seal the semiconductor chip entirely.
- According to a preferred embodiment of the present invention, an adhesive layer is provided between the semiconductor chip and the insulated substrate. If the semiconductor chip is formed with a bump, and the mounting to the insulated substrate is made in a facedown mode, a gap is formed between the semiconductor chip and the insulated substrate. The presence of the adhesive layer in this gap enables to avoid air inclusion in the gap, preventing such a problem that the air in the gap expands when the semiconductor chip and/or the insulated substrate are heated, causing a strain onto a circuit element in the semiconductor chip and damage the circuit element.
- Preferably, the adhesive layer is provided by a polyimide resin. Polyimide resin has a superior heat resistance and a smaller coefficient of thermal expansion than epoxy resin. Therefore, even if the adhesive layer between the circuit element and the insulated substrate is made of a polyimide resin, an influence (strain) of the resin expansion and shrinkage caused by heating and cooling, on the circuit element in the semiconductor chip is smaller than in the case where an epoxy resin is used.
- Preferably, the insulated substrate has a peripheral margin extending beyond the semiconductor chip, and the protective resin is formed to rise from the margin.
- According to a preferred embodiment of the present invention, the semiconductor chip has an electrode bearing surface formed with a plurality of electrodes, and the insulated substrate is provided with external terminals disposed in a grid pattern, each made of a solder ball and electrically connected with a corresponding one of the electrodes. With this arrangement, the electrode bearing surface may be faced to the insulated substrate when the semiconductor chip is mounted onto the insulated substrate. Alternatively, the electrode bearing surface may be faced away from the insulated substrate, and the electrical connection of each electrode of the semiconductor chip with the corresponding external terminal is provided by a wire.
- A second aspect of the present invention offers a semiconductor device comprising an insulated substrate and a semiconductor chip mounted on the insulated substrate. In this semiconductor device the insulated substrate is made of a polyimide resin, at least a side surface of the semiconductor chip is protected by a protective resin provided by a polyimide resin, and the semiconductor chip is held by the protective resin with respect to the insulated substrate.
- A third aspect of the present invention offers a method of manufacturing a semiconductor device, comprising steps of: mounting a semiconductor chip on an insulated substrate; and covering at least a side surface of the semiconductor chip with a protective resin, thereby holding the semiconductor chip with respect to the insulated substrate. The method is characterized in that the protective resin is formed by thermal imidization of a liquid polyamide precursor.
- Preferably, the mounting of the semiconductor chip to the insulated substrate includes steps of: forming a non-hardened or semi-hardened adhesive layer on the insulated substrate; and pressing the semiconductor chip onto the insulated substrate under heat via the adhesive layer. Further, it is advantageous if ultrasonic wave is applied to the semiconductor chip when pressing the semiconductor chip onto the insulated substrate under heat via the adhesive layer.
- The other characteristics and advantages of the present invention will become clearer from the following description to be presented with reference to the accompanying drawings.
- FIG. 1 is an overall perspective view of a semiconductor device according to a first embodiment of the present invention.
- FIG. 2 is an overall perspective view of the semiconductor device in FIG. 1 viewed from a back side.
- FIG. 3 is a sectional view taken in lines III-III in FIG.1.
- FIG. 4 is a perspective view showing a principal portion of a carrier tape used in manufacture of the semiconductor device shown in FIGS. 1 through 3.
- FIGS. 5 through 9 are sectional views illustrating steps of manufacture of the semiconductor device shown in FIGS. 1 through 3.
- FIG. 10 is a sectional view of a semiconductor device according to a second embodiment of the present invention.
- FIG. 11 is a sectional view of a semiconductor device according to a third embodiment of the present invention.
- FIG. 12 is a sectional view of a prior art semiconductor device.
- Hereinafter, preferred embodiments of the present invention will be described with reference to the attached drawings.
- FIGS. 1 through 3 show a semiconductor device according to a first embodiment of the present invention. The semiconductor device according to the present embodiment has a structure so called BGA (Ball Grid Array).
- A
semiconductor device 1 according to the first embodiment comprises aninsulated substrate 2, and asemiconductor chip 3 mounted on anupper surface 2 a of theinsulated substrate 2. Theinsulated substrate 2 and thesemiconductor chip 3 sandwich anadhesive layer 4 in between. - The
semiconductor chip 3 is generally a rectangular parallelepiped, including an electrode bearing surface (the bottom surface in the figure) 3 a, anupper surface 3 b, and fourside surfaces 3 c. Theside surface 3 c of thesemiconductor chip 3 is enclosed by aprotective resin 5. Theinsulated substrate 2 has aback surface 2 b provided with a plurality ofexternal terminals 9 projecting from the surface and disposed in a grid pattern. Each of theexternal terminals 9 is ball-shaped. - The
semiconductor chip 3 is a bear chip such as an IC chip and an LSI chip. The electrode bearing surface 3 a is formed with a plurality ofelectrodes 30. Each of theelectrodes 30 includes anelectrode pad 30 a formed integrally with thesemiconductor chip 3 and abump 30 b formed by e.g. gold plating on theterminal pad 30 a. Thebump 30 b projects out of theelectrode bearing surface 3 a. - The insulated
substrate 2 is made of a polyimide resin. As shown clearly in FIG. 2 and FIG. 3, theupper surface 2 a and theback surface 2 b of theinsulated substrate 2 are both generally rectangular. Theupper surface 2 a and theback surface 2 b of theinsulated substrate 2 each has an area greater than that of theelectrode bearing surface 3 a. Thus, once theinsulated substrate 2 is mounted with thesemiconductor chip 3, theinsulated substrate 2 has itsperipheral margins 23 extend beyond thesemiconductor chip 3. - The insulated
substrate 2 is formed with a plurality of throughholes 20 in a grid pattern. Further, theupper surface 2 a of theinsulated substrate 2 is formed with a plurality of connectingterminals 21 each connected with a corresponding one of the-electrodes 30 of thesemiconductor chip 3. Though not clearly shown in the figures, each of the connectingterminals 21 has an end faced to the correspondingelectrode 30 and another end extending to a corresponding throughhole 20, closing an upper opening of the throughhole 20. Further, as clearly shown in FIG. 3, each of theexternal terminals 9 fills a corresponding one of the throughholes 20 and connects with a corresponding one of the connectingterminals 21. - The
adhesive layer 4 is provided by e.g. an epoxy resin, connecting theelectrode bearing surface 3 a of thesemiconductor chip 3 with theupper surface 2 a of theinsulated substrate 2. Alternatively to the epoxy resin, theadhesive layer 4 may be formed of a polyimide resin, or may be formed of an electrically conductive anisotropic adhesive. The electrically conductive anisotropic adhesive can bond, with its resin component, the semiconductor chip to the insulated substrate whereas its electrically conductive particles provide electrical connection between the electrode of the semiconductor chip and the connecting terminal of the insulated substrate. A common resin component for the electrically conductive anisotropic adhesive is an epoxy resin, which may be replaced by a polyimide resin, however. - The
protective resin 5 is provided by a polyimide resin, completely coats theextended margins 23 of theupper surface 2 a of theinsulated substrate 2 and the side surfaces 3 c of thesemiconductor chip 3, and rides on an outer edges of theupper surface 3 b of thesemiconductor chip 3. In other words, themargins 23 of theinsulated substrate 2 and theupper surface 3 b of thesemiconductor chip 3 are integrally connected by theprotective resin 5. As described earlier, theinsulated substrate 2 is made of polyimide resin, and thus has a high level of adhesion with the polyimideprotective resin 5. Further, the polyimide resin, which has a good heat resistance and a small thermal expansion coefficient, does not expand very much when thesemiconductor device 1 is mounted and driven on a circuit substrate for example. Thus, the thermal expansion causes only a small stress acting on a place where thesemiconductor device 1 is bonded, making possible to keep a stable state of operation. - Further, the side surfaces3 c of the
semiconductor chip 3 and the edges of theupper surface 3 b are directly protected by theprotective resin 5. Therefore, if an external force is applied to thesemiconductor chip 3 when handling thesemiconductor device 1, damage to thesemiconductor chip 3 is small. Further, since themargins 23 of theinsulated substrate 2 is integrated with thesemiconductor chip 3 by theprotective resin 5, themargins 23 is not prone to direct influence of external force. This appropriately prevents such a situation in which theinsulated substrate 2 comes off thesemiconductor chip 3 due to external force acting on themargins 23 of theinsulated substrate 2. - The
semiconductor device 1 is manufactured by using acarrier tape 2A shown in FIG. 4. Thecarrier tape 2A is like a long ribbon, and includes, at a predetermined longitudinal pitch, a plurality of square unit regions 25 (regions surrounded by imaginative lines in FIG. 4) each to be mounted with thesemiconductor chip 3. Thecarrier tape 2A is formed of a polyimide resin. In each of theunit regions 25, the throughholes 20 are formed in a grid pattern, on which the connectingterminals 21 are formed. These connectingterminals 21 are formed for example by first forming and then etching a film of metal such as cupper on the surface of thecarrier tape 2A. The metal film may be formed by plating, vapor deposition, or bonding a foil of metal. If the metal foil is bonded, the foil may have a pattern formed in advance. Each of the connectingterminals 21 has an end positioned to corresponding one of theelectrodes 30 of thesemiconductor chip 3, and another end closing a corresponding one of the throughholes 20 from above. Thecarrier tape 2A has two widthwise margins each formed with a plurality of engagingholes 24 at a predetermined interval. By using these engagingholes 24, thecarrier tape 2A is transported on an appropriate table. - When manufacturing the
semiconductor device 1 by using thecarrier tape 2A as described, first, as shown in FIG. 4 and FIG. 5, thecarrier tape 2A is placed on a table 6 incorporating a heater (not illustrated). Under this state, thesemiconductor chip 3 is mounted, in a facedown mode, onto eachunit region 25 of thecarrier tape 2A via anadhesive sheet 4. In this step, eachelectrode 30 of thesemiconductor chip 3 must be faced to the corresponding end of the connectingterminals 21 in theunit region 25. Theadhesive tape 4 is provided by a half-hardened epoxy resin or polyimide resin. Alternatively to theadhesive sheet 4, a liquid adhesive may be applied to theunit region 25 or theelectrode bearing surface 3 a of thesemiconductor chip 3, before thesemiconductor chip 3 is mounted onto theunit region 25. - Next, as shown in FIG. 6, while heating the adhesive4 by the heater incorporated in the table 6, the
semiconductor chip 3 is pressed onto thecarrier tape 2A, whereby mounting of thesemiconductor chip 3 onto thecarrier tape 2A is achieved. During this process, preferably, ultrasonic wave is applied to thesemiconductor chip 3 to make sure the contact between theelectrodes 30 of thesemiconductor chip 3 and thecarrier tape 2A. - Next, as shown in FIG. 7, the
protective resin 5 is formed by enclosing the surrounds of the adhesive 4, and the side surfaces 3 c of thesemiconductor chip 3. Theprotective resin 5 is formed for example by first applying a liquid polyamide precursor, i.e. poly amicacid (a polymer of acid anhydride and diamine before cyclization (hardening)) carried in a solvent, thereby enclosing the side surfaces 3 c of the semiconductor chip and covering the edges of theupper surface 3 b of thesemiconductor chip 3. Then, the precursor is heated to cause imidization. Theprotective resin 5 thus formed offers the following advantages since it is made of polyimide resin as is thecarrier tape 2A (the insulated substrate 2). First, a high level of adhesion is achieved between theprotective resin 5 and thecarrier tape 2A that are made of the same kind of resin. Second, thecarrier tape 2A does not warp when theprotective resin 5 is cooled after the thermal formation process, because theprotective resin 5 and thecarrier tape 2A shrink to a more or less the same extent. - Next, as shown in FIG. 8, the
carrier tape 2A is turned upside down, and theexternal terminals 9 are formed in a grid pattern on the back surface of thecarrier tape 2A, corresponding to the grid pattern of the throughholes 20 of thecarrier tape 2A. Specifically, asolder ball 90 is placed with solder flux (not illustrated) in each of the throughholes 20, and then thesolder ball 90 is heated into molten and then cooled to solidify. Thus, as shown in FIG. 9, the ball-likeexternal terminals 9 as shown in FIG. 9 are formed. Again in this forming process of theexternal terminals 9, thecarrier tape 2A and theprotective resin 5 are heated and then cooled, but since both are formed of polyimide resin, and therefore expand and shrink to a more or less the same extent, thecarrier tape 2A is not prone to warp. - When all of the processes are completed as described, a region to serve the
insulated substrate 2 is cut out of thecarrier tape 2A, and thesemiconductor device 1 as shown in FIG. 1 through FIG. 3 is obtained. - When utilized, the
semiconductor device 1 is mounted on e.g. a circuit substrate (not illustrated) formed with a predetermined wiring, together with other electronic components. The mounting of thesemiconductor device 1 onto the circuit substrate is performed by first placing thesemiconductor device 1, with itsexternal terminals 9 faced to corresponding terminals formed on the circuit substrate, re-melting and then re-solidifying theexternal terminals 9. - FIG. 10 shows a
semiconductor device 1′ according to a second embodiment of the present invention. The semiconductor device according to the present embodiment is similar to thesemiconductor device 1 according to the first embodiment, but differs from the first embodiment in that theprotective resin 5′ is formed to cover not only the side surfaces 3 c and the edges of theupper surface 3 b of thesemiconductor chip 3 but also the entireupper surface 3 b of thesemiconductor chip 3. Theprotective resin 5′ as described can be formed e.g. by means of transfer forming using a metal mold, and of course may be formed by means of potting, in which a liquid polyamide precursor is applied to cover the chip and then thermally hardened, into a dome-like shape. - FIG. 11 shows a
semiconductor device 1″ according to a third embodiment of the present invention. Thesemiconductor device 1″ according to the present embodiment is similar to thesemiconductor device 1′ according to the second embodiment, but differs from the second embodiment in that thesemiconductor chip 3 is mounted on theinsulated substrate 2 in a face-up mode, that electrical connection between each electrode of thesemiconductor chip 3 and a corresponding connectingterminal 21 of theinsulated substrate 2 are provided by a wire W, and that theprotective resin 5′ encloses the wires W, too. - According to the embodiments described above, description is made for a semiconductor device having a structure in which a single semiconductor chip mounted on an insulated substrate is protected by a protective resin. However, the present invention is also applicable to a semiconductor device having a structure in which a plurality of semiconductor chips mounted on an insulated substrate are protected by a protective resin.
Claims (21)
1. A mounting structure of a semiconductor chip onto an insulated substrate,
the insulated substrate being made of a polyimide resin,
at least a side surface of the semiconductor chip being protected by a protective resin provided by a polyimide resin, the semiconductor chip being held by the protective resin with respect to the insulated substrate.
2. The mounting structure according to claim 1 , wherein the protective resin rides on an upper surface of the semiconductor chip.
3. The mounting structure according to claim 1 , wherein the protective resin seals the semiconductor chip entirely.
4. The mounting structure according to claim 1 , wherein an adhesive layer is provided between the semiconductor chip and the insulated substrate.
5. The mounting structure according to claim 4 , wherein the adhesive layer is provided by a polyimide resin.
6. The mounting structure according to claim 1 , wherein the insulated substrate has a peripheral margin extending beyond the semiconductor chip, the protective resin being formed to rise from the margin.
7. The mounting structure according to claim 1 , wherein the semiconductor chip has an electrode bearing surface formed with a plurality of electrodes, the insulated substrate being provided with external terminals disposed in a grid pattern, each made of a solder ball and electrically connected with a corresponding one of the electrodes.
8. The mounting structure according to claim 1 , wherein the electrode bearing surface is faced to the insulated substrate.
9. The mounting structure according to claim 1 , wherein the electrode bearing surface is faced away from the insulated substrate, the electrical connection of each electrode of the semiconductor chip with the corresponding external terminal being provided by a wire.
10. A semiconductor device comprising:
an insulated substrate; and
a semiconductor chip mounted on the insulated substrate;
wherein the insulated substrate is made of a polyimide resin, and
wherein at least a side surface of the semiconductor chip is protected by a protective resin provided by a polyimide resin, the semiconductor chip being held by the protective resin with respect to the insulated substrate.
11. The semiconductor device according to claim 10 , wherein the protective resin rides on an upper surface of the semiconductor chip.
12. The semiconductor device according to claim 10 , wherein the protective resin seals the semiconductor chip entirely.
13. The semiconductor device according to claim 10 , wherein the semiconductor chip and the insulated substrate sandwich an adhesive layer in between.
14. The semiconductor device according to claim 10 , wherein the adhesive layer is provided by a polyimide resin.
15. The semiconductor device according to claim 10 , wherein the insulated substrate has a peripheral margin extending beyond the semiconductor chip, the protective resin being formed to rise from the margin.
16. The semiconductor device according to claim 10 , wherein the semiconductor chip has an electrode bearing surface formed with a plurality of electrodes, the insulated substrate being provided with external terminals disposed in a grid pattern, each made of a solder ball and electrically connected with a corresponding one of the electrodes.
17. The semiconductor device according to claim 10 , wherein the electrode bearing surface is faced to the insulated substrate.
18. The semiconductor device according to claim 10 , wherein the electrode bearing surface is faced away from the insulated substrate, the electrical connection of each electrode of the semiconductor chip with the corresponding external terminal being provided by a wire.
19. A method of manufacturing a semiconductor device, comprising steps of:
mounting a semiconductor chip on an insulated substrate; and
covering at least a side surface of the semiconductor chip with a protective resin, thereby holding the semiconductor chip with respect to the insulated substrate;
characterized that the protective resin is formed by thermal imidization of a liquid polyamide precursor.
20. The method according to claim 19 , further comprising steps of:
forming a non-hardened or semi-hardened adhesive layer on the insulated substrate; and
pressing the semiconductor chip onto the insulated substrate under heat via the adhesive layer.
21. The method according to claim 21, wherein
ultrasonic wave is applied to the semiconductor chip when pressing the semiconductor chip onto the insulated substrate under heat via the adhesive layer.
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US11/065,070 US7285446B2 (en) | 2000-02-07 | 2005-02-25 | Mounting structure of semiconductor chip, semiconductor device and method of making the semiconductor device |
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JP2000028818A JP2001217354A (en) | 2000-02-07 | 2000-02-07 | Mounting structure for semiconductor chip, and semiconductor device |
JP2000-28818 | 2000-02-07 |
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2001
- 2001-02-06 KR KR10-2001-7012768A patent/KR100451924B1/en not_active IP Right Cessation
- 2001-02-06 WO PCT/JP2001/000829 patent/WO2001059839A1/en active Application Filing
- 2001-02-06 US US09/958,094 patent/US20020173069A1/en not_active Abandoned
- 2001-02-07 TW TW091213650U patent/TW592386U/en not_active IP Right Cessation
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US6794739B2 (en) * | 2001-02-28 | 2004-09-21 | Sony Corporation | Semiconductor device, process for production thereof, and electronic equipment |
US20030111734A1 (en) * | 2001-02-28 | 2003-06-19 | Hirotaka Kobayashi | Semiconductor device, its manufacturing method, and electronic apparatus |
US7005322B2 (en) | 2003-06-17 | 2006-02-28 | Stmicroelectronics, S.A. | Process for encapsulating semiconductor components using through-holes in the semiconductor components support substrates |
FR2856517A1 (en) * | 2003-06-17 | 2004-12-24 | St Microelectronics Sa | Semiconductor component manufacturing process, involves delivering liquid filling material between support plate and each chip such that material fills space between portion of plate and chip, after hardening |
WO2006013197A1 (en) * | 2004-08-03 | 2006-02-09 | United Monolithic Semiconductors S.A.S. | Surface-mounted microwave miniature package and method for making same |
US7602071B2 (en) * | 2004-08-05 | 2009-10-13 | Disco Corporation | Apparatus for dividing an adhesive film mounted on a wafer |
US20060030129A1 (en) * | 2004-08-05 | 2006-02-09 | Disco Corporation | Method and apparatus for dividing an adhesive film mounted on a wafer |
US8399776B2 (en) | 2009-05-13 | 2013-03-19 | Advanced Semiconductor Engineering, Inc. | Substrate having single patterned metal layer, and package applied with the substrate , and methods of manufacturing of the substrate and package |
US20100288541A1 (en) * | 2009-05-13 | 2010-11-18 | Advanced Semiconductor Engineering, Inc. | Substrate having single patterned metal layer, and package applied with the substrate , and methods of manufacturing of the substrate and package |
US20100289132A1 (en) * | 2009-05-13 | 2010-11-18 | Shih-Fu Huang | Substrate having embedded single patterned metal layer, and package applied with the same, and methods of manufacturing of the substrate and package |
US8367473B2 (en) | 2009-05-13 | 2013-02-05 | Advanced Semiconductor Engineering, Inc. | Substrate having single patterned metal layer exposing patterned dielectric layer, chip package structure including the substrate, and manufacturing methods thereof |
US20110057301A1 (en) * | 2009-09-08 | 2011-03-10 | Advanced Semiconductor Engineering, Inc. | Semiconductor package |
US8330267B2 (en) * | 2009-09-08 | 2012-12-11 | Advanced Semiconductor Engineering, Inc. | Semiconductor package |
US20110084370A1 (en) * | 2009-10-14 | 2011-04-14 | Advanced Semiconductor Engineering, Inc. | Semiconductor package and process for fabricating same |
US8786062B2 (en) | 2009-10-14 | 2014-07-22 | Advanced Semiconductor Engineering, Inc. | Semiconductor package and process for fabricating same |
US9165900B2 (en) | 2009-10-14 | 2015-10-20 | Advanced Semiconductor Engineering, Inc. | Semiconductor package and process for fabricating same |
US9564346B2 (en) | 2009-10-14 | 2017-02-07 | Advanced Semiconductor Engineering, Inc. | Package carrier, semiconductor package, and process for fabricating same |
US8569894B2 (en) | 2010-01-13 | 2013-10-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
US8884424B2 (en) | 2010-01-13 | 2014-11-11 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
US9196597B2 (en) | 2010-01-13 | 2015-11-24 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
US9349611B2 (en) | 2010-03-22 | 2016-05-24 | Advanced Semiconductor Engineering, Inc. | Stackable semiconductor package and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
US20050142691A1 (en) | 2005-06-30 |
WO2001059839A1 (en) | 2001-08-16 |
US7285446B2 (en) | 2007-10-23 |
JP2001217354A (en) | 2001-08-10 |
TW592386U (en) | 2004-06-11 |
KR100451924B1 (en) | 2004-10-12 |
KR20010105415A (en) | 2001-11-28 |
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