US20020165947A1 - Network application apparatus - Google Patents
Network application apparatus Download PDFInfo
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- US20020165947A1 US20020165947A1 US09/790,434 US79043401A US2002165947A1 US 20020165947 A1 US20020165947 A1 US 20020165947A1 US 79043401 A US79043401 A US 79043401A US 2002165947 A1 US2002165947 A1 US 2002165947A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/20—Network architectures or network communication protocols for network security for managing network security; network security policies in general
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/5033—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering data affinity
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/5055—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering software capabilities, i.e. software resources associated or available to the machine
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/10—Network architectures or network communication protocols for network security for controlling access to devices or network resources
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/14—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic
- H04L63/1408—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic by monitoring network traffic
- H04L63/1416—Event detection, e.g. attack signature detection
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/2866—Architectures; Arrangements
- H04L67/30—Profiles
- H04L67/306—User profiles
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/34—Network arrangements or protocols for supporting network services or applications involving the movement of software or configuration parameters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/50—Network services
- H04L67/60—Scheduling or organising the servicing of application requests, e.g. requests for application data transmissions using the analysis and optimisation of the required network resources
- H04L67/62—Establishing a time schedule for servicing the requests
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/50—Network services
- H04L67/60—Scheduling or organising the servicing of application requests, e.g. requests for application data transmissions using the analysis and optimisation of the required network resources
- H04L67/63—Routing a service request depending on the request content or context
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
- H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
- H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
- H04L69/329—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the application layer [OSI layer 7]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/40—Network security protocols
Definitions
- the present invention relates generally to network devices, and more particularly to improved devices and methods for delivering services and applications to network users.
- IP internet protocol
- Prior art systems attempt to ease the demand for a given service by providing a multiplicity of servers at the destination IP address, wherein the servers are managed by a content-aware flow switch.
- the content-aware flow switch intercepts requests for the application or service and preferably initiates a flow with a server that maintains a comparatively low processing load.
- the prior art systems may attempt to increase the computational power at the particular destination IP address by distributing the requests at the IP address, data transport dependencies remain inherent in the network structure. The content-aware flow switch is therefore limited by the rate at which requests arrive.
- the methods and systems of this invention provide a scalable architecture and method to facilitate the allocation of network services and applications by distributing the services and applications throughout a network such as the internet.
- the methods and systems can be implemented using a switch architecture that can include applications processors that can execute applications and services according to subscriber profiles.
- the applications processors utilize the LINUX operating system to provide an open architecture for downloading, modifying, and otherwise managing applications.
- the switch architecture can also include a front-end processor that interfaces to the network and the application processors, recognizes data flows from subscribers, and distributes the data flows from the network to the applications processors for applications processing according to subscriber profiles.
- the front-end processors can recognize data flows from non-subscribers, and switch such data flows to an appropriate destination in accordance with standard network switches.
- the front-end processors include flow schedules for distributing subscriber flows amongst and between several applications processors based on existing flow processing requirements, including for example, policy.
- the applications processors and front-end processors can be connected to a control processor that can further access local and remote storage devices that include subscriber profile information and applications data that can be transferred to the front-end or applications processors.
- the control processor can further aggregate health and maintenance information from the applications and front-end processors, and provide a communications path for distributing health, maintenance, and/or control information between a management processor and the front-end and applications processors.
- the methods and systems disclosed herein can include the functionality of a switch that can be located at the front-end of a network of servers, while in another embodiment, the network apparatus may be between routers that connect networks.
- the front-end processors can be Network Processor Modules (NPMs), while the at least one applications processor can be Flow Processor Modules (FPMs).
- the control processor can include a Control Processor Module (CPM).
- the NPMs can interface to a communications system network such as the internet, receive and classify flows, and distribute flows to the FPMs according to a flow schedule that can be based upon FPM utilization.
- the at least one FPM can host applications and network services that process data from individual flows using one or more processors resident on the FPMs.
- the CPM can coordinate the different components of the switch, including the NPMs and FPMs, allow management access to the switch, and support access to local storage devices. Local storage devices can store images, configuration files, and databases that may be utilized when applications execute on the FPMs.
- the methods and systems of the invention can also allow the CPM to access a remote storage device that can store applications and databases.
- An interface to at least one management server (MS) module can receive and aggregate health and status information from the switch modules (e.g., NPMs, FPMs, CPMs) through the CPMs.
- the MS module can reside on a separate host machine.
- the management server module functionality can be incorporated in a processor resident on a CPM.
- an internal switched Ethernet control bus connects the internal components of the switch and facilitates management and control operations.
- the internal switched Ethernet control bus can be separate from a switched data path that can be used for internal packet forwarding.
- the NPMs, the CPMs, the FPMs, and the interconnections between the NPMs, CPMs, and FPMs can be implemented with selected redundancy to enhance the fault tolerant operations and hence system reliability.
- the two NPMs can operate in redundant or complementary configurations.
- the two CPMs can operate in a redundant configuration with the first CPM operational and the second CPM serving as a backup.
- the NPMs and CPMs can be controlled via the Management Server module that can determine whether a particular NPM or CPM may be malfunctioning, etc.
- FPMs up to two FPMs can be identified as reserve FPMs to assist in ensuring that, in case of an FPM failure, eight FPMs can function at a given time, although those with ordinary skill in the art will recognize that such an example is provided for illustration, and the number of reserve or functioning FPMs can vary depending upon system requirements, etc.
- the illustrated FPMs can be configured to host one or more applications, and some applications can be resident on multiple FPMs to allow efficient servicing for more heavily demanded applications.
- Data flows entering the switch in this configuration can be received from an originator, processed by a NPM and returned to the originator, processed by a NPM and forwarded to a destination, forwarded by a NPM to a flow processor and returned via the NPM to the originator, or forwarded by a NPM to a flow processor and forwarded by the NPM to a destination.
- a flow received by a first NPM may be processed, forwarded to a second NPM, and forwarded by the second NPM to a destination.
- the first NPM can receive a flow and immediately forward the flow to the second NPM for processing and forwarding to a destination.
- FPM processing can also be included within the described data paths.
- the well-known Linux operating system can be installed on the FPM and CPM processors, thereby providing an open architecture that allows installation and modification of, for example, applications residing on the FPMs.
- the NPMs can execute the well-known VxWorks operating system on a MIPS processor and a small executable on a network processor.
- FIG. 1A shows four example modes of operation for the network apparatus disclosed herein;
- FIG. 1B shows an illustration of an edge-based firewall embodiment for the systems and methods disclosed herein;
- FIG. 2 is a block diagram of an apparatus according to the invention.
- FIG. 3A is a block diagram of the basic data flow through the apparatus of FIG. 2;
- FIG. 3B is a block diagram of a storage area network embodiment for the apparatus of FIG. 2;
- FIG. 4 is a diagram of a redundant architecture for a system according to FIG. 2;
- FIG. 5 is a schematic of a Network Processor Module (NPM) for the systems of FIGS. 2 and 4;
- NPM Network Processor Module
- FIGS. 6A, 6B, 6 C, 6 D, 6 E, and 6 F detail embodiments of a network interface for the NPM of FIG. 5;
- FIG. 7 illustrates a crossover on the backplane within the illustrated NPM of FIG. 5;
- FIG. 8 is an architectural block diagram of a Flow Processor Module (FPM) for the embodiments of FIGS. 2 and 4; and,
- FPM Flow Processor Module
- FIG. 9 is a block diagram of an illustrative Control Processor Module (CPM) architecture according to the representative systems of FIGS. 2 and 4.
- CCM Control Processor Module
- an application can be understood to be a data processing element that can be implemented in hardware, software, or a combination thereof, wherein the data processing element can include a number of states that can be zero or any positive integer.
- a processor can be understood to be any element or component that is capable of executing instructions, including but not limited to a Central Processing Unit (CPU).
- CPU Central Processing Unit
- the invention disclosed herein includes systems and methods related to a network apparatus that can be connected in and throughout a network, such as the internet, to make available applications and services throughout the network, to data flows from subscriber users.
- a network such as the internet
- the apparatus can perform the functions normally attributed to a switch as understood by one of ordinary skill in the art, and similarly, the apparatus can be connected in and throughout the network as a switch as understood by one of ordinary skill in the art
- the apparatus additionally allows the distribution of applications throughout the network by providing technical intelligence to recognize data flows received at the switch, recall a profile based on the data flow, apply a policy to the data flow, and cause the data flow to be processed by applications or services according to the profile and/or policy, before forwarding the data flow to a next destination in accordance with switch operations as presently understood by one of ordinary skill in the art.
- the next destination may be a network address or a another device otherwise connected to the network apparatus.
- FIG. 1A displays four exemplary modes and corresponding illustrative examples of operation for the network apparatus or device presented herein, wherein such modes are provided for illustration and not limitation.
- the first mode shown in FIG. 1A can be utilized for, as an example, a firewall application, wherein data flows can be received by the network apparatus and processed in what can otherwise be known as a “pass or drop” scenario.
- the network apparatus can accept data flows from one interface and either pass the flow to a destination using a second interface according to permissions provided by the firewall, or the data flow may be dropped (i.e., not forwarded to the destination).
- a data flow received by the network apparatus can be received by a first interface, modified, and forwarded via a second interface to a destination.
- An example embodiment of the second scenario includes content insertion.
- the network apparatus can function as a proxy wherein data flows can be received, processed, and returned at a first data interface, and similarly, data flows received from a second data interface can be processed and returned via the second interface, wherein the respective data flows can be dependent or otherwise related.
- Sample embodiments of the third scenario of FIG. 1A include transaction services and protocol translation.
- the network apparatus can be utilized for applications including, for example, VOIP conferencing, content insertion, and application caching, wherein data flows can be received at a first interface, processed, and returned via the first interface.
- FIG. 1B provides another illustration of the network apparatus and demonstrates a data flow for an edge-based firewall embodiment 200 incorporating the network apparatus according to the methods and systems disclosed herein.
- data flows in the form of internet requests from a subscriber to Internet Service Provider (ISP) A 202 and a subscriber to ISP B 204 are input to a Digital Subscriber Line Access Multiplexer (DSLAM) 206 and thereafter forwarded to an Asynchronous Transfer Mode (ATM) switch 208 within an ISP A-related Super-POP, that aggregates the flows and forwards the flows to a router 210 .
- ISP Internet Service Provider
- ATM Asynchronous Transfer Mode
- the router 210 directs the data flow traffic to the network device or apparatus 12 that recognizes the flows from the respective ISP subscribers 202 , 204 and applies respective firewall policies.
- ISPs A and B are subscribers to the network apparatus 12 and in accordance therewith, provide profiles and applications/services in accordance with such profiles for distribution and processing by the apparatus in conformance with the profiles.
- applications in addition to the respective firewall policies can be applied to the respective data flows.
- the data flow from the ISP A subscriber 202 is forwarded to the internet 212 with the applications applied to the data, while the data flow from the ISP B subscriber 204 is forwarded to ISP B 214 with the policy applied to the data.
- the network apparatus 12 can also recognize data as not otherwise belonging to a subscriber and therefore not eligible for applications processing, wherein such data can be switched to a destination in accordance with a switch presently known to one of ordinary skill in the art.
- Those with ordinary skill in the art will also recognize that although this disclosure presents the apparatus connected within the network known as the internet, the internet application is presented for illustration and not limitation. In an embodiment wherein the apparatus is used with a communications system such as the internet, the apparatus can be connected at the front-end of a server network, or alternately, between routers that connect networks, although the apparatus disclosed herein is not limited to such embodiments.
- FIG. 2 shows another illustrative block diagram 10 of the network apparatus 12 that can host applications and connect into and throughout the infrastructure of a network such as the internet, thereby distributing the hosted applications and/or services accordingly throughout the network.
- the illustrated apparatus 12 includes two Network Processor Module (NPMs) 14 that facilitate the flow of network into and out of the network apparatus 12 by independently maintaining, in the illustrated embodiment, two Gigabit Ethernet connections.
- NPMs Network Processor Module
- Gigabit Ethernet connections are merely one high-speed data link, and other such data links can be substituted without departing from the scope of the invention.
- the Gigabit Ethernet connections can optionally interface to a subscriber network 16 and the internet core 18 .
- a single NPM can be utilized, and the two Gigabit Ethernet connections can connect to two different networks, for example.
- the apparatus 12 can utilize a single bi-directional interface to connect to the subscriber network 16 and internet core 18 .
- NPMs 14 connect via an Ethernet through a cross-connect 20 to at least one Flow Processor Modules (FPMs) 22 that apply applications and services to data flows, and to at least one Control Processor Module (CPM) 24 that can process data flow requests and collect health and maintenance information from the NPMs 14 and FPMs 22 .
- FPMs Flow Processor Modules
- CPM Control Processor Module
- Each illustrated NPM 14 , FPM 22 , and CPM 24 also connect to a high-speed switching fabric that interconnects all modules and allows internal packet forwarding of data flows between the NPM 14 , FPM 22 , and CPM 24 modules.
- the CPM 24 similarly independently connects to the FPMs 22 and NPMs 14 in the representative embodiment by a 100Base-T Ethernet Control Bus 26 that can be dual redundant internal switched 100 Mbyte/second Ethernet control planes.
- the illustrated CPMs 24 also connect to a Management Server (MS) module 28 by a 100Base-T Ethernet, to a local memory device 30 , and to a Data Center 32 through a Gigabit Ethernet connection.
- MS Management Server
- the MS module 28 allows for data collection, application loading, and application deleting from the FPMs 22 , while the local memory device 30 and Data Center 32 can store data related to applications or profile information.
- the two NPMs can operate in complementary or redundant configurations, while the two CPMs can be configured for redundancy.
- the apparatus 12 may be placed within the normal scheme of a network such as the internet, wherein the apparatus 12 may be located, for example, at the front-end of a server network, or alternately and additionally, between routers that connect networks.
- the apparatus 12 can be configured to provide applications to subscribers, wherein the applications can include virus detection, intrusion detection, firewalls, content filtering, privacy protection, and policy-based browsing, although these applications are merely an illustration and are not intended as a limitation of the invention herein.
- the NPMs 14 can receive data packets or flows and process such packets entirely before forwarding the packets to the appropriate destination.
- the NPMs 14 can receive and forward the packets to an appropriate destination. Also in the same embodiment, the NPMs 14 can recognize data packets that require processing that can be performed by applications residing on the FPMs 22 ; and in these instances, the NPMs 14 can perform flow scheduling to determine which FPM 22 can appropriately and most efficiently process the data, wherein the data packets or flow can then be forwarded to the selected FPM 22 for processing. In an embodiment, not all FPMs 22 can process all types of processing requests or data packets.
- a FPM 22 can require information from the local memory device 30 or the remote memory device 32 , wherein the NPM 14 can direct the retrieval of storage data through the CPM 24 and thereafter forward the storage data to the FPM 22 .
- An FPM 22 can thereafter transfer processed data to the NPM 14 for forwarding to an appropriate destination.
- application service providers can more efficiently provide services to subscribers by integrating and making available services throughout a network such as the internet, rather than at a single location that is often designated as a single IP address.
- FIG. 3A shows a schematic of data flow through the apparatus 12 of FIG. 1.
- NPMs 14 may provide an interface between the subscriber interface and the network core.
- the FIG. 3A NPM 14 can receive data from a first interface 14 a, and depending on the data request, can process the data and transmit the processed data using either the first interface 14 a or the second interface 14 b. Alternately, the NPM 14 can forward the received data to a FPM 22 that can thereafter return the processed data to the NPM 14 for transmission or forwarding using either the first interface 14 a or the second interface 14 b.
- the NPM 14 can receive data from the second interface 14 b, process the data, and transmit the processed data using either the first interface 14 a or the second interface 14 b.
- data received by the NPM 14 through the second interface 14 b can be forwarded to the FPMs 22 for processing, wherein the FPMs 22 can return the processed data to the NPM 14 for transmission through either the first interface 14 a or the second interface 14 b.
- data received by the NPM 14 can be processed by multiple FPMs 22 , wherein the data can be forwarded to the multiple FPMs 22 through the NPM 14 , and returned to the NPM 14 for forwarding to a destination.
- data received at a first NPM can be processed by the first NPM, transmitted to a second NPM, and forwarded by the second NPM to a destination.
- data received at the first NPM can be forwarded to the second NPM, processed, and forwarded to a destination accordingly.
- data received at either of the two NPMs can be forwarded to any of the FPMs 22 , processed, and returned to either of the NPMs for forwarding to a destination.
- FIG. 3B shows the system of FIGS. 2 and 3A configured to operate in accordance with a Storage Area Network (SAN) as is commonly known in the art.
- SAN Storage Area Network
- the NPM 14 and FPM 22 integration as indicated in FIG. 3A is preserved, however, the NPM 14 and FPM 22 also maintain interfaces to one or more storage devices 23 that can be any storage device commonly known in the art, including but not limited to RAM, ROM, diskettes, disk drives, ZIP drives, RAID systems, holographic storage, etc., and such examples are provided for illustration and not limitation.
- FIG. 3B shows the system of FIGS. 2 and 3A configured to operate in accordance with a Storage Area Network (SAN) as is commonly known in the art.
- the NPM 14 and FPM 22 also maintain interfaces to one or more storage devices 23 that can be any storage device commonly known in the art, including but not limited to RAM, ROM, diskettes, disk drives, ZIP drives, RAID systems, holographic storage, etc., and such examples are provided for illustration and not
- data can be received at the NPM 14 and transferred directly to the storage devices 23 ; or, data received by the NPM 14 can be forwarded to one or more FPMs 22 before being forwarded by the FPMs 22 to the storage devices 23 , wherein the FPMs 22 can perform processing on the data before forwarding the data to storage 23 .
- data can be retrieved from storage 23 by either the NPM 14 or FPMs 22 .
- the NPM 14 and FPMs 22 maintain external interfaces that can accommodate data input and output.
- FIG. 4 illustrates an alternate representation of the FIG. 2 system that implements a dual redundant architecture.
- a redundant architecture there are two NPMs 14 a, 14 b, two CPMs 24 a, 24 b, and ten FPMs 22a-22n that reside in a fourteen rack chassis.
- eight FPMs 22 are provided for typical apparatus 12 operation, with two FPMs 22 provided as alternates in the case of failure of up to two of the operational eight FPMs 22 .
- FIG. 4 illustrates an alternate representation of the FIG. 2 system that implements a dual redundant architecture.
- eight FPMs 22 are provided for typical apparatus 12 operation, with two FPMs 22 provided as alternates in the case of failure of up to two of the operational eight FPMs 22 .
- redundant internal switched 100 Mbyte/second (100Base-T) Ethernet control planes 170 a , 170 b provide connections between each of the NPMs 14 a , 14 b , CPMs 24 a , 24 b , and FPMs 22 a - 22 n .
- the illustrated LA system also includes dual fabric links 172 a , 172 b , wherein each FPM 22 a - 22 n and CPM 24 a , 24 b connect to each fabric link 172 a , 172 b , while the first NPM 14 a connects to the first fabric link 172 b, and the second NPM 14 b connects to the second fabric link 172 b to allow each NPM 14 a , 14 b to operate independently of the other.
- FIG. 4 NPMs 14 a , 14 b maintain two Gigabit Ethernet connections to the network, wherein one of the connections can be to a subscriber including a subscriber network, etc., while the other connection can be to the internet core.
- the illustrated CPMs 24 a , 24 b maintain a Gigabit Ethernet connection to communicate with a remote storage device illustrated as the data center 32 of FIG. 2.
- FIG. 5 shows a schematic block diagram of an illustrative NPM 14 according to FIGS. 2 and 4.
- the apparatus or switch 12 can include one or more NPMs 14 , and when more than one NPM 14 is utilized, the NPMs 14 may be configured for redundant or complementary operation.
- a NPM 14 can include a modular and optional subsystem illustrated in FIG. 5 as a network interface subsystem 40 .
- This subsystem 40 physically connects the switch 12 and a network, thereby providing a data flow between the switch 12 and the 14 network.
- the NPM 14 also includes a Network Processor 42 that Is connects to the network interface subsystem 40 .
- the Network Processor 42 can be, for example, an IQ2000 Network Processor, and those with ordinary skill in the art will recognize this example as an illustration and not a limitation, wherein any like device performing the functions as described herein may be similarly substituted.
- a second processor can be co-located within the NPM architecture without departing from the scope of the invention.
- the network interface system 40 can connect to ports A and B of the Network Processor 42 using a FOCUS bus, wherein such ports shall hereinafter be referred to as FOCUS ports A and B, and wherein two remaining FOCUS ports labeled C and D are available on the Network Processor 42 .
- the network interface subsystem 40 can be a changeable component of the NPM architecture, wherein the different options can be different Printed Circuit Board (PCB) designs or pluggable option boards, however, those with ordinary skill in the art will recognize that such methods of implementing the network interface subsystem 40 are merely illustrative and the invention herein is not limited to such techniques.
- PCB Printed Circuit Board
- FIGS. 6A through 6F provide various illustrative network interface subsystem 40 options for the FIG. NPM 14 .
- the two Gigabit Ethernet interfaces 50 , 52 to the FIG. 5 Network Processor 42 are supported through the Network Processor's 42 two embedded Gigabit Ethernet Media Access Control devices (MACs).
- MACs Media Access Control devices
- the only external devices necessary for Gigabit Ethernet operation include the Gigabit Ethernet physical layer device (PHY) 54 a , 54 b and optical interfaces 56 a , 56 b .
- PHY physical layer device
- a first optical interface 56 a can couple to a subscriber's network equipment
- a second optical interface 56 b can couple to the internet core.
- FIG. 6B there is an illustrative configuration for the FIG. 5 NPM 14 wherein FOCUS ports A and B can support up to eight 10/100 Ethernet ports through an external octal 10/100 MAC 60 a , 60 b .
- the two external eight port 10/100 MACs 60 a , 60 b couple to the FOCUS ports and to two external eight port 10/100 PHY devices 62 a , 62 b .
- the PHY devices respectively couple to eight RJ-45 connections 64 a , 64 b .
- FIG. 6B the two external eight port 10/100 MACs 60 a , 60 b couple to the FOCUS ports and to two external eight port 10/100 PHY devices 62 a , 62 b .
- the PHY devices respectively couple to eight RJ-45 connections 64 a , 64 b .
- one set of eight RJ-45 ports 64 a can be dedicated to the subscriber's network, while the remaining eight RJ-45 ports 64 b can couple to the internet core.
- the architecture of FIG. 6B can allow software or firmware to configure the ports as independent data streams such that data received on a subscriber's port can be returned on a internet port.
- FIG. 6C there is a network interface subsystem 40 configuration for the illustrated NPM 14 of FIG. 5, wherein the switch 12 can receive ATM cells with the cooperation of a Segmentation and Reassembly device (SAR) 70 a , 70 b connected to the A and B FOCUS ports.
- SAR Segmentation and Reassembly device
- FIG. 6C wherein OC-3c ATM operation is illustrated, four optical interfaces 72 a provide the subscriber interface, while four optical interfaces 72 b provide the internet core interface.
- the respective subscriber and internet optical interfaces 72 a , 72 b couple to a four port framer 76 a , 76 b that provides input to a Transmission SAR 70 a (TX, “to” the switch 12 ), or receives output from a Receiver SAR 70 b (RX, “from” the switch 12 ).
- the SARs 70 a , 70 b utilize a 32-bit SRAM 77 and a 64-bit SDRAM 78 , although such an embodiment is merely for illustration.
- the SAR UTOPIA ports interface to the FOCUS A and B ports through a Field Programmable Gate Array (FPGA) 79 .
- FPGA Field Programmable Gate Array
- FIG. 6C the network interface subsystem of FIG. 6C, as with the other diagrams provided herein, is merely provided for illustration and not intended to limit the scope of the invention; therefore, components may be otherwise substituted to perform the same functionality, wherein for example, a single SAR capable of transmission and receiving may be substituted for the two SARs 70 a , 70 b depicted in the illustration of FIG. 6C.
- FIG. 6D there is a network interface subsystem 40 configuration for the illustrated NPM 14 of FIG. 4, wherein OC-12c ATM operation may be enabled.
- one OC-12c optical interface 80 a can couple to the subscribers, while a second OC-12c optical interface 80 b can couple to the internet core.
- FIG. 5D illustrates only a two port framer 82 that thereafter interfaces to the TX and RX SARs 84 a , 84 b , FPGA 86 , and the respective FOCUS ports of the Network Processor 42 .
- FIG. 6E there is an OC-3C Packet Over SONET (POS) configuration for the network interface subsystem 40 of FIG. 5.
- POS Packet Over SONET
- four optical interfaces 90 a can interface to the subscriber, while four optical interfaces 90 b can be dedicated to the internet core.
- the optical interfaces 90 a , 90 b respectively couple to a four port framer 92 a , 92 b that interfaces to the A and B FOCUS ports through a FPGA 94 .
- FIG. 6F there is a configuration of the network interface subsystem 40 of FIG. 5 for a two port OC-12c POS application.
- one optical interface 100 a can couple to the subscriber, and another 100 b can couple to the internet core.
- the FIG. 6F optical interfaces 100 a , 100 b couple to a two port framer 102 that interfaces to a FPGA 104 for connection to the A and B FOCUS ports.
- the illustrated Network Processor 42 also connects to a CPU subsystem 110 that includes a MIPS processor 112 such as a QED RM700A 400 MHz MIPS processor, a system controller/PCI bridge 114 such as the Galileo GT64120A system controller/PC bridge, local SDRAM 116 , and a Programmable Logic Device (PLD) 118 .
- a MIPS processor 112 such as a QED RM700A 400 MHz MIPS processor
- system controller/PCI bridge 114 such as the Galileo GT64120A system controller/PC bridge
- local SDRAM 116 local SDRAM
- PLD Programmable Logic Device
- the PLD 118 makes accessible the board specific control registers and miscellaneous devices.
- the PLD 118 is connected to a local high-speed bus on the GT64120A 114 with a local SDRAM 116 , and acts as a buffer between the local high-speed bus 120 and a lower speed peripheral bus 122 that has boot PROM Flash 124 and non-volatile RAM (NVRAM) 126 for semi-permanent storage of settings and parameters, and for providing a real-time clock for time of day and date.
- the FIG. 5 PCI bus 127 connected to the PCI bridge also includes two Fast Ethernet MACs 128 a , 128 b , such as the Intel GD82559ER 100 Mbit MAC that includes an integrated PHY, to provide redundant connections between the NPM 14 and CPM 24 via a primary and secondary 100 Base-T Ethernet channel.
- the illustrated MACs 128 a , 128 b reside on the PCI bus and perform Direct Memory Access (DMA) transfers between the PCI internal buffers and the defined buffer descriptors within the local MIPS memory 112 .
- the MACs 128 a , 128 b can support an unlimited burst size and can be limited by PCI bridge performance.
- flow control can be utilized in a control plane application to avoid unnecessary packet loss.
- the illustrated GT64120A 114 allows the CPU 112 and other local bus masters to access the PCI memory and/or device buses.
- the FIG. 5 NPM 14 also includes a switch fabric subsystem 130 that provides high-speed, non-blocking data connections between the NPM 14 and the other modules within the switch 12 .
- the connections include two links to another, redundant or complementary NPM 14 and a link to each CPM 24 .
- the illustrated NPM's 14 portion of the fabric includes two Focus Connect devices 132 a , 132 b , wherein one Focus Connect device 132 a is connected to the IQ2000 42 port C using a FOCUS Bus, while another Focus Connect device 132 b is connected to port D.
- the ports on the sixteen bit FOCUS bus on the Focus Connect devices 132 a , 132 b are attached to a Cypress Quad Hotlink Gigabit transceiver 134 that is a serial to deserial (SerDes) device 136 having dual redundant I/O capabilities and configured for dual channel bonded mode.
- the dual channel bonded mode couples two channels together in a sixteen-bit channel, wherein there can be two such sixteen-bit channels per device.
- SerDes serial to deserial
- FIG. 7 the dual redundant serial I/O capabilities, in cooperation with a crossover on the backplane, allow any slot to be connected to any other slot such that a packet or a data route vector modification is not necessary when only one NPM 14 is present.
- the FIG. 5 Serdes devices 136 convert incoming serial stream data from the backplane, to parallel data for forwarding to the Focus Connect devices 132 a , 132 b . Similarly, the Serdes 136 converts parallel data from the Focus Connect device 132 a , 132 b to serial data before placing the data on the backplane.
- a Focus Connect device 132 a , 132 b is connected to the IQ2000 FOCUS C and D ports and wherein the Focus Connect devices 132 a , 132 b maintain eight ports each, in the illustrative system wherein there is a fourteen slot chassis and there are ten slots for FPMs 22 a - 22 n , two slots for NPMs 14 a , 14 b , and two slots for CPMs 24 a , 24 b
- the Focus Connect device ports can be configured as shown in Tables 1 and 2: TABLE 1 Focus Connect device connected to IQ2000 FOCUS Port C (132a) Focus Connect Port Connected Module 1 FPM, slot 1 2 FPM, slot 2 3 FPM, slot 3 4 FPM, slot 4 5 FPM, slot 5 6 CPM, slot 1 7 Other NPM, Focus Connect Port D 8 Local IQ2000, Port C
- the fourth major subsystem of the FIG. 5 NPM 14 is a memory subsystem 140 .
- the FIG. 5 memory subsystem is a single RAMbus channel for packet buffer storage and flow lookup table space.
- the memory subsystem 140 includes a search processor 142 and several content addressable memories 144 , although those with ordinary skill in the art will recognize that the invention herein is not limited to the memory subsystem 140 or the components thereof.
- data received by the NPM 14 can be forwarded to the IQ2000 42 that can include instructions for recognizing packets or data flows.
- CPU or processor instructions can implement or otherwise utilize a hash table to identify services or processing for an identified packet or flow, wherein the packet or flow can subsequently be forwarded to a FPM 22 , for example, in accordance with the service or processing.
- unidentified packets can be forwarded to the MIPS 112 that can include instructions for identifying the packet or flow and associated processing or services.
- packets unable to be identified by the MIPS 112 can be forwarded by the MIPS 112 to the CPM 24 that can also include instructions for identifying packets or flows. Identification information from either the CPM 24 or MIPS 112 can be returned to the IQ2000 and the hash table can be updated accordingly with the identification information.
- FIG. 8 there is a basic schematic block diagram of a FPM 22 for the system illustrated in FIGS. 1 - 3 .
- the FPM 22 is based upon Intel's 440BX AGPset, with a majority of the FPM functionality similar to a personal computer (PC).
- the illustrated FPM 22 can therefore be viewed as having four main sections that include a processor or CPU 120 , a 440BX AGPset 122 , a FOCUS interface, and peripherals.
- the FPMs 22 are identically designed, although those with ordinary skill in the art will recognize that the methods and systems disclosed herein may include differing FPM designs.
- the illustrated FPM 22 embodiment supports a single socket 370 Intel Pentium III CPU 150 with a 100 Megahertz processor system bus (PSB), although such processor is merely for illustration and not limitation, and those with ordinary skill in the art will recognize that the invention disclosed herein is not limited by the CPU selection or processor component. Similarly, those with ordinary skill in the art will recognize that multiple processors 150 can be incorporated within the FPM architecture without departing from the scope of the invention.
- the representative FPM 22 also includes a 440BX Accelerated Graphics Port (AGPset) 152 that provides host/processor support for the CPU 150 .
- AGPset Accelerated Graphics Port
- Data packets moving into and out of the FPM 22 in the illustrated system use a 16-bit wide 100 Megahertz bus called the FOCUS bus, and in the illustrated embodiment, a full-duplex FOCUS bus attaches to every FPM 22 from each NPM 14 , wherein in the illustrated embodiment of dual redundant NPMs 14 a , 14 b , every FPM 22 communicates with two NPMs 14 a , 14 b .
- the FOCUS bus signal is serialized on the NPM 14 a , 14 b before it is placed on the backplane, to improve signal integrity and reduce the number of traces.
- deserializers 154 a , 154 b on the FPM 22 convert the signal from the backplane to a bus and the bus connects the deserializers 154 a , 154 b to a Focus Connect 156 that interfaces through a FPGA 158 and Input Output Processor 160 to the 440BX AGPset 152 .
- the illustrated PRC is an eight-way FOCUS switch that allows the FPM 22 to properly direct packets to the correct NPM 14 .
- the FIG. 8 FPM 22 also maintains peripherals including control plane interfaces, mass storage devices, and serial interfaces.
- the control plane provides a dedicated path for communicating with the FPM 22 through two fast Ethernet controllers 130 a , 130 b that interface the AGP 152 to the redundant control plane. As indicated in FIGS. 2 and 4, it is typically the CPM 24 a , 24 b that communicates with the FPM 22 via the control plane.
- the fast Ethernet controllers 130 a , 130 b connect to control planes that are switched 100 Megabits/second Ethernet networks that terminate at the two CPMs 24 .
- the illustrated FPM 22 may also support different types of mass storage devices that can include, for example, a M-Systems DiskOnChip (DOC), a 2.5 inch disk drive, NVRAM for semi-permanent storage of settings and parameters, etc.
- DOC M-Systems DiskOnChip
- NVRAM NVRAM for semi-permanent storage of settings and parameters, etc.
- FIG. 9 there is an illustration of a sample CPM 24 as presented in the systems of FIG. 2 and 4 .
- the CPM 24 performs generic, switch-wide functions and is connected to the other switch components through a data interface that, in the illustrated embodiment, is identical to the data interface of FIG. 7 for the FPM 22 .
- the common data interfaces for the FPM 22 and CPM 24 modules are merely for convenience and do not limit the scope of the invention.
- control planes terminate at a CPM 24 , wherein the illustrative control planes are dual redundant, private, switched 100 Megabit Ethernet.
- the switching elements are housed on the CPM 24 , and therefore all point-to-point connections between other modules and a CPM 24 are maintained through the backplane connector.
- the CPM 24 controls the switch 12 boot process and manages the removal and insertion of modules into the switch 12 while the switch 12 is operational.
- the main CPU 170 is a Pentium III processor, although the invention herein is not so limited, and any processor or CPU or device capable of performing the functions described herein may be substituted without departing from the scope of the invention, wherein multiple processors or CPUs may additionally be utilized.
- a 440BX Accelerated Graphics Port (AGPset) 172 provides host/processor support for the CPU 170 .
- the FIG. 9 AGP 172 supports a PCI interface to connect to miscellaneous hardware devices.
- Three fast Ethernet controllers 174 a , 174 b , 174 c also reside on the PCI bus of the 440 BX 172 .
- One of these three fast Ethernet controllers 174 a provides external communications and multiplexes with the fast Ethernet on the other CPM 24 .
- the other two fast Ethernet controllers 174 b , 174 c provide dedicated communications paths to the NPMs 14 and FPMs 22 .
- the fast Ethernet controller is an Intel 82559ER, fully integrated 10BASE-T/100BASE-TX LAN solution combining the MAC and PHY into a single component, although such embodiment is merely provided as an illustration.
- the fast Ethernet controllers 174 b , 174 c interface to an Ethernet switch 176 that provides fourteen dedicated communication paths to the control plane for up to ten FPMs 22 and two NPMs 14 .
- the illustrated Focus Connect 180 is a switch used by the CPM 24 to direct packets to the correct NPM 14 .
- packets are moved into and out of the CPU memory 182 through a FPGA 184 and Input Output Processor 186 that interface the Focus Connect 180 to the AGP 172 .
- the CPMs 24 coordinate the different components of the switch, including the NPMs and FPMs, and similarly support access to a local storage device 30 that can also be referred to as a local memory device.
- the local storage device 30 can store images, configuration files, and databases for executing applications on the FPMs 22 .
- the local device 30 may store subscriber profiles that can be retrieved for use by either the NPM 14 or FPMs 22 .
- a configuration file for a particular application or subscriber can be retrieved and copied to multiple FPMs 22 , for example, thereby providing increased efficiency in a scenario wherein multiple, identically configured FPMs 22 are desired.
- FPMs 22 may be grouped for a subscriber.
- the local storage device 30 can be any well-known memory component that may be removable or resident on the CPMs 24 , including but not limited to a floppy disk, compact disc (CD), digital video device (DVD), etc. In the illustrated system, there is at least one local storage device for each CPM 24 . Similarly, in the illustrated system, the local storage device 30 can be divided into several partitions to accommodate and protect certain processor's needs, including the processors on the various FPMs 22 . In one embodiment, the local storage device 30 can include two identical disk partitions that allow dynamic software upgrades. In an embodiment, two disk partitions can include identical groups of partitions that can include swap partitions, common partitions for use by all processors, and specific partitions for different module processors (i.e., NPMs, FPMs, CPMs).
- the illustrated CPMs 24 can also access a remote storage device 32 , wherein such remote storage can store services, database, etc., that may not be efficiently stored in the local memory device 30 .
- the remote storage device 32 can be any compilation of memory components that can be physically or logically partitioned depending upon the application, and those with ordinary skill in the art will recognize that the invention herein is not limited by the actual memory components utilized to create the remote storage device 32 .
- the FIG. 2 CPMs 24 also couple to at least one management server (MS) module 28 .
- the connection is a 100Base-T Ethernet connection.
- the MS 28 can receive and aggregate health and status information from the switch modules 14 , 22 , 24 , wherein the health and status information may be provided to the MS 28 through the CPMs 24 .
- the MS 28 can activate or inactivate a particular apparatus 12 module.
- the MS 28 communicates with the apparatus 12 modules through the CPM 24 .
- the MS 28 may be a PC, Sun Workstation, or other similarly operational microprocessor controlled device, that can be equipped with microprocessor executable instructions for monitoring and controlling the apparatus 12 modules.
- the MS 38 can include an executable that provides a graphical user interface (GUI) for display of apparatus 12 monitoring and control information.
- GUI graphical user interface
- the MS 38 can be a separate device from the CPM 24 , while in another embodiment, the MS 28 functionality can be incorporated into the CPM 24 , for example, by utilizing a separate processor on the CPM 24 for MS 38 functionality.
- the well-known Linux operating system can be installed on the FPM 22 and CPM 24 processors, thereby providing an open architecture that allows installation and modification of, for example, applications residing on the FPMs 22 .
- the management and control of applications on the switch modules can be performed using the MS 28 .
- the MS 28 management can be performed using the CPM 24 .
- Applications such as firewall applications, etc., in the illustrated embodiments can therefore be downloaded, removed, modified, transferred between FPMs 22 , etc. using the MS 28 .
- the NPMs 14 can execute the well-known Vxworks operating system on the MIPS processor and a small executable on the IQ2000 processor 42 .
- Vxworks operating system on the MIPS processor
- IQ2000 processor 42 a small executable on the IQ2000 processor 42 .
- One advantage of the present invention over the prior art is that a switch architecture is disclosed with multiple processor modules having an open architecture wherein applications may be distributed to and throughout the multiple processors for efficient servicing by applications throughout a network, and wherein a distinct processor module can interface to the network and appropriately direct data from the network, to one of the multiple processor modules in part as a function of the multiple processor processing loads, and hence return the processed data to the network.
- the apparatus includes the functionality of a switch with the ability to apply applications and services to received data according to respective subscriber profiles.
- Front-end processors, or Network Processor Modules (NPMs) receive and recognize data flows from subscribers, extract profile information for the respective subscribers, utilize flow scheduling techniques to forward the data to applications processors, or Flow Processor Modules (FPMs).
- the FPMs utilize resident applications to process data received from the NPMs.
- a Control Processor Module (CPM) facilitates applications processing and maintains connections to the NPMs, FPMs, local and remote storage devices, and a Management Server (MS) module that can monitor the health and maintenance of the various modules.
- the MS can download and otherwise control applications on the FPMs that execute the Linux operating system to provide an open architecture for downloading, executing, modifying, and otherwise managing applications.
- the present invention has been described relative to a specific embodiment thereof, it is not so limited. Obviously many modifications and variations of the present invention may become apparent in light of the above teachings.
- the illustrated systems divided the modules into various components, the functionality of components may be combined into a single module where appropriate, without affecting the invention.
- the management server module may be incorporated in the control processor module.
- the processors and supporting components of the different modules may be replaced with other, similarly functioning components.
- additional supporting components may be desired, while in other embodiments, some of the illustrated supporting components can be omitted.
- connections between components may include wired or wireless Ethernet, for example, or may include any combination of communicative channel and protocol, wherein examples of wired or wireless communicative channels may be bus configurations, cabling, infrared, spread spectrum, or other communicative channels or connections, and examples of protocols may include pseudo noise modulation, Frame Relay, Asynchronous Transfer Mode (ATM), etc., wherein such combinations of communicative channel and protocol may herein be described and defined as electrical connections.
- ATM Asynchronous Transfer Mode
Abstract
Description
- This application claims priority to U.S. Provisional Application No. 60/235,281, entitled “Optical Application Switch Architecture with Load Balancing Method”, and filed on Sep. 25, 2000, naming Mike Ackerman, Stephen Justus, Throop Wilder, Kurt Reiss, Rich Collins, Derek Keefe, Bill Terrell, Joe Kroll, Eugene Korsunky, A. J. Beaverson, Avikudy Srikanth, Luc Parisean, Vitaly Dvorkian, Hung Trinh, and Sherman Dmirty as inventors, the contents of which are herein incorporated by reference.
- This patent application is co-pending with a related patent application entitled Second Title by the same inventor(s) as this patent application.
- 1. Field of the Invention
- The present invention relates generally to network devices, and more particularly to improved devices and methods for delivering services and applications to network users.
- 2. Description of the Prior Art
- Increasing numbers of businesses, services, and other providers are expanding their offerings on the internet. The basic structure for providing network services, however, is constrained with data transport dependencies. Unfortunately, a given service is often provided from a single network location that is deemed the central location for the service. This location may be identified by a destination internet protocol (IP) address that corresponds to a server that is capable of receiving and processing the request. Prior art systems attempt to ease the demand for a given service by providing a multiplicity of servers at the destination IP address, wherein the servers are managed by a content-aware flow switch. The content-aware flow switch intercepts requests for the application or service and preferably initiates a flow with a server that maintains a comparatively low processing load. Although the prior art systems may attempt to increase the computational power at the particular destination IP address by distributing the requests at the IP address, data transport dependencies remain inherent in the network structure. The content-aware flow switch is therefore limited by the rate at which requests arrive.
- There is currently not a scalable system or method to alleviate the data transport dependencies characteristic of large computer networks such as the internet.
- What is needed is a system and method for delivering applications and services to computer network users that is scalable to increased network demands for applications and services, and thereby mitigates data transport dependencies typical of the present internet architecture.
- The methods and systems of this invention provide a scalable architecture and method to facilitate the allocation of network services and applications by distributing the services and applications throughout a network such as the internet. In an embodiment, the methods and systems can be implemented using a switch architecture that can include applications processors that can execute applications and services according to subscriber profiles. In one embodiment, the applications processors utilize the LINUX operating system to provide an open architecture for downloading, modifying, and otherwise managing applications. The switch architecture can also include a front-end processor that interfaces to the network and the application processors, recognizes data flows from subscribers, and distributes the data flows from the network to the applications processors for applications processing according to subscriber profiles. In an embodiment, the front-end processors can recognize data flows from non-subscribers, and switch such data flows to an appropriate destination in accordance with standard network switches. In one embodiment, the front-end processors include flow schedules for distributing subscriber flows amongst and between several applications processors based on existing flow processing requirements, including for example, policy.
- In an embodiment, the applications processors and front-end processors can be connected to a control processor that can further access local and remote storage devices that include subscriber profile information and applications data that can be transferred to the front-end or applications processors. The control processor can further aggregate health and maintenance information from the applications and front-end processors, and provide a communications path for distributing health, maintenance, and/or control information between a management processor and the front-end and applications processors.
- In an embodiment, the methods and systems disclosed herein can include the functionality of a switch that can be located at the front-end of a network of servers, while in another embodiment, the network apparatus may be between routers that connect networks.
- In one embodiment, the front-end processors can be Network Processor Modules (NPMs), while the at least one applications processor can be Flow Processor Modules (FPMs). The control processor can include a Control Processor Module (CPM). In this embodiment, the NPMs can interface to a communications system network such as the internet, receive and classify flows, and distribute flows to the FPMs according to a flow schedule that can be based upon FPM utilization. The at least one FPM can host applications and network services that process data from individual flows using one or more processors resident on the FPMs. The CPM can coordinate the different components of the switch, including the NPMs and FPMs, allow management access to the switch, and support access to local storage devices. Local storage devices can store images, configuration files, and databases that may be utilized when applications execute on the FPMs.
- In an embodiment, the methods and systems of the invention can also allow the CPM to access a remote storage device that can store applications and databases. An interface to at least one management server (MS) module can receive and aggregate health and status information from the switch modules (e.g., NPMs, FPMs, CPMs) through the CPMs. In one embodiment, the MS module can reside on a separate host machine. In another embodiment, the management server module functionality can be incorporated in a processor resident on a CPM.
- In one embodiment, an internal switched Ethernet control bus connects the internal components of the switch and facilitates management and control operations. The internal switched Ethernet control bus can be separate from a switched data path that can be used for internal packet forwarding.
- In an embodiment of the invention, the NPMs, the CPMs, the FPMs, and the interconnections between the NPMs, CPMs, and FPMs, can be implemented with selected redundancy to enhance the fault tolerant operations and hence system reliability. For example, in one embodiment wherein two NPMs, ten FPMs, and two CPMs can be implemented, the two NPMs can operate in redundant or complementary configurations. Additionally, the two CPMs can operate in a redundant configuration with the first CPM operational and the second CPM serving as a backup. The NPMs and CPMs can be controlled via the Management Server module that can determine whether a particular NPM or CPM may be malfunctioning, etc. In this same example, up to two FPMs can be identified as reserve FPMs to assist in ensuring that, in case of an FPM failure, eight FPMs can function at a given time, although those with ordinary skill in the art will recognize that such an example is provided for illustration, and the number of reserve or functioning FPMs can vary depending upon system requirements, etc. The illustrated FPMs can be configured to host one or more applications, and some applications can be resident on multiple FPMs to allow efficient servicing for more heavily demanded applications. Data flows entering the switch in this configuration can be received from an originator, processed by a NPM and returned to the originator, processed by a NPM and forwarded to a destination, forwarded by a NPM to a flow processor and returned via the NPM to the originator, or forwarded by a NPM to a flow processor and forwarded by the NPM to a destination. In an embodiment wherein two or more NPMs are configured for complementary operation, a flow received by a first NPM may be processed, forwarded to a second NPM, and forwarded by the second NPM to a destination. In another embodiment, the first NPM can receive a flow and immediately forward the flow to the second NPM for processing and forwarding to a destination. In complementary NPM embodiments, FPM processing can also be included within the described data paths.
- In an embodiment, the well-known Linux operating system can be installed on the FPM and CPM processors, thereby providing an open architecture that allows installation and modification of, for example, applications residing on the FPMs. In an embodiment, the NPMs can execute the well-known VxWorks operating system on a MIPS processor and a small executable on a network processor.
- Other objects and advantages of the invention will become obvious hereinafter in the specification and drawings.
- A more complete understanding of the invention and many of the attendant advantages thereto will be readily appreciated as the same becomes better understood by reference to the following detailed description when considered in conjunction with the accompanying drawings, wherein like reference numerals refer to like parts and wherein:
- FIG. 1A shows four example modes of operation for the network apparatus disclosed herein;
- FIG. 1B shows an illustration of an edge-based firewall embodiment for the systems and methods disclosed herein;
- FIG. 2 is a block diagram of an apparatus according to the invention;
- FIG. 3A is a block diagram of the basic data flow through the apparatus of FIG. 2;
- FIG. 3B is a block diagram of a storage area network embodiment for the apparatus of FIG. 2;
- FIG. 4 is a diagram of a redundant architecture for a system according to FIG. 2;
- FIG. 5 is a schematic of a Network Processor Module (NPM) for the systems of FIGS. 2 and 4;
- FIGS. 6A, 6B,6C, 6D, 6E, and 6F detail embodiments of a network interface for the NPM of FIG. 5;
- FIG. 7 illustrates a crossover on the backplane within the illustrated NPM of FIG. 5;
- FIG. 8 is an architectural block diagram of a Flow Processor Module (FPM) for the embodiments of FIGS. 2 and 4; and,
- FIG. 9 is a block diagram of an illustrative Control Processor Module (CPM) architecture according to the representative systems of FIGS. 2 and 4.
- To provide an overall understanding of the invention, certain illustrative embodiments will now be described; however, it will be understood by one of ordinary skill in the art that the systems and methods described herein can be adapted and modified to provide systems and methods for other suitable applications and that other additions and modifications can be made to the invention without departing from the scope hereof.
- For the purposes of the disclosure herein, an application can be understood to be a data processing element that can be implemented in hardware, software, or a combination thereof, wherein the data processing element can include a number of states that can be zero or any positive integer.
- For the purposes of the methods and systems described herein, a processor can be understood to be any element or component that is capable of executing instructions, including but not limited to a Central Processing Unit (CPU).
- The invention disclosed herein includes systems and methods related to a network apparatus that can be connected in and throughout a network, such as the internet, to make available applications and services throughout the network, to data flows from subscriber users. Although the apparatus can perform the functions normally attributed to a switch as understood by one of ordinary skill in the art, and similarly, the apparatus can be connected in and throughout the network as a switch as understood by one of ordinary skill in the art, the apparatus additionally allows the distribution of applications throughout the network by providing technical intelligence to recognize data flows received at the switch, recall a profile based on the data flow, apply a policy to the data flow, and cause the data flow to be processed by applications or services according to the profile and/or policy, before forwarding the data flow to a next destination in accordance with switch operations as presently understood by one of ordinary skill in the art. In an embodiment, the next destination may be a network address or a another device otherwise connected to the network apparatus. By increasing the availability of services by distributing the services throughout the network, scalability issues related to alternate solutions to satisfy increased demand for applications and services, are addressed.
- FIG. 1A displays four exemplary modes and corresponding illustrative examples of operation for the network apparatus or device presented herein, wherein such modes are provided for illustration and not limitation. The first mode shown in FIG. 1A can be utilized for, as an example, a firewall application, wherein data flows can be received by the network apparatus and processed in what can otherwise be known as a “pass or drop” scenario. In such applications, the network apparatus can accept data flows from one interface and either pass the flow to a destination using a second interface according to permissions provided by the firewall, or the data flow may be dropped (i.e., not forwarded to the destination). In the second scenario of FIG. 1A, labeled “modify, source, and send,” a data flow received by the network apparatus can be received by a first interface, modified, and forwarded via a second interface to a destination. An example embodiment of the second scenario includes content insertion. In the third scenario of FIG. 1A, the network apparatus can function as a proxy wherein data flows can be received, processed, and returned at a first data interface, and similarly, data flows received from a second data interface can be processed and returned via the second interface, wherein the respective data flows can be dependent or otherwise related. Sample embodiments of the third scenario of FIG. 1A include transaction services and protocol translation. In the fourth sample embodiment of FIG. 1A, the network apparatus can be utilized for applications including, for example, VOIP conferencing, content insertion, and application caching, wherein data flows can be received at a first interface, processed, and returned via the first interface.
- FIG. 1B provides another illustration of the network apparatus and demonstrates a data flow for an edge-based
firewall embodiment 200 incorporating the network apparatus according to the methods and systems disclosed herein. In the illustration, data flows in the form of internet requests from a subscriber to Internet Service Provider (ISP) A 202 and a subscriber toISP B 204 are input to a Digital Subscriber Line Access Multiplexer (DSLAM) 206 and thereafter forwarded to an Asynchronous Transfer Mode (ATM)switch 208 within an ISP A-related Super-POP, that aggregates the flows and forwards the flows to arouter 210. Therouter 210 directs the data flow traffic to the network device orapparatus 12 that recognizes the flows from therespective ISP subscribers network apparatus 12 and in accordance therewith, provide profiles and applications/services in accordance with such profiles for distribution and processing by the apparatus in conformance with the profiles. In the illustrated embodiment, applications in addition to the respective firewall policies, for example, can be applied to the respective data flows. After the respective processing is performed by thenetwork apparatus 12, in the illustrated embodiment, the data flow from theISP A subscriber 202 is forwarded to the internet 212 with the applications applied to the data, while the data flow from theISP B subscriber 204 is forwarded to ISP B 214 with the policy applied to the data. - The
network apparatus 12 can also recognize data as not otherwise belonging to a subscriber and therefore not eligible for applications processing, wherein such data can be switched to a destination in accordance with a switch presently known to one of ordinary skill in the art. Those with ordinary skill in the art will also recognize that although this disclosure presents the apparatus connected within the network known as the internet, the internet application is presented for illustration and not limitation. In an embodiment wherein the apparatus is used with a communications system such as the internet, the apparatus can be connected at the front-end of a server network, or alternately, between routers that connect networks, although the apparatus disclosed herein is not limited to such embodiments. - FIG. 2 shows another illustrative block diagram10 of the
network apparatus 12 that can host applications and connect into and throughout the infrastructure of a network such as the internet, thereby distributing the hosted applications and/or services accordingly throughout the network. Those with ordinary skill in the art will recognize that the FIG. 2 illustration is intended to facilitate the disclosure of the invention and is not intended as a limitation of the invention. As indicated by FIG. 2, the illustratedapparatus 12 includes two Network Processor Module (NPMs) 14 that facilitate the flow of network into and out of thenetwork apparatus 12 by independently maintaining, in the illustrated embodiment, two Gigabit Ethernet connections. Those with ordinary skill with recognize that Gigabit Ethernet connections are merely one high-speed data link, and other such data links can be substituted without departing from the scope of the invention. In an embodiment where theapparatus 12 is inserted in-line on a trunk connecting subscribers to the internet core, for example, the Gigabit Ethernet connections can optionally interface to asubscriber network 16 and theinternet core 18. Those with ordinary skill in the art will recognize that in another embodiment, a single NPM can be utilized, and the two Gigabit Ethernet connections can connect to two different networks, for example. Additionally, those with skill in the art will recognize that for the illustrated system, theapparatus 12 can utilize a single bi-directional interface to connect to thesubscriber network 16 andinternet core 18. The FIG. 2NPMs 14 connect via an Ethernet through a cross-connect 20 to at least one Flow Processor Modules (FPMs) 22 that apply applications and services to data flows, and to at least one Control Processor Module (CPM) 24 that can process data flow requests and collect health and maintenance information from theNPMs 14 andFPMs 22. - Each illustrated
NPM 14,FPM 22, and CPM 24 also connect to a high-speed switching fabric that interconnects all modules and allows internal packet forwarding of data flows between theNPM 14,FPM 22, and CPM 24 modules. The CPM 24 similarly independently connects to theFPMs 22 andNPMs 14 in the representative embodiment by a 100Base-T Ethernet Control Bus 26 that can be dual redundant internal switched 100 Mbyte/second Ethernet control planes. The illustrated CPMs 24 also connect to a Management Server (MS)module 28 by a 100Base-T Ethernet, to alocal memory device 30, and to aData Center 32 through a Gigabit Ethernet connection. TheMS module 28 allows for data collection, application loading, and application deleting from theFPMs 22, while thelocal memory device 30 andData Center 32 can store data related to applications or profile information. In the illustrated system of FIG. 2, there are twoNPMs 14, at least two CPMs 24, and tenFPMs 22, although such a system is merely illustrative, and those with ordinary skill in the art will recognize that fewer or greater numbers of these components may be utilized without departing from the scope of the invention. In the illustrated system of FIG. 2, the two NPMs can operate in complementary or redundant configurations, while the two CPMs can be configured for redundancy. - As indicated, using an architecture according to the principles illustrated, the
apparatus 12 may be placed within the normal scheme of a network such as the internet, wherein theapparatus 12 may be located, for example, at the front-end of a server network, or alternately and additionally, between routers that connect networks. Using firmware and/or software configured for the apparatus modules, theapparatus 12 can be configured to provide applications to subscribers, wherein the applications can include virus detection, intrusion detection, firewalls, content filtering, privacy protection, and policy-based browsing, although these applications are merely an illustration and are not intended as a limitation of the invention herein. In one embodiment, theNPMs 14 can receive data packets or flows and process such packets entirely before forwarding the packets to the appropriate destination. In the same embodiment, theNPMs 14 can receive and forward the packets to an appropriate destination. Also in the same embodiment, theNPMs 14 can recognize data packets that require processing that can be performed by applications residing on theFPMs 22; and in these instances, theNPMs 14 can perform flow scheduling to determine whichFPM 22 can appropriately and most efficiently process the data, wherein the data packets or flow can then be forwarded to the selectedFPM 22 for processing. In an embodiment, not allFPMs 22 can process all types of processing requests or data packets. Additionally, to process a data request, in some instances, aFPM 22 can require information from thelocal memory device 30 or theremote memory device 32, wherein theNPM 14 can direct the retrieval of storage data through the CPM 24 and thereafter forward the storage data to theFPM 22. AnFPM 22 can thereafter transfer processed data to theNPM 14 for forwarding to an appropriate destination. With theapparatus 12 architecture such as that provided by FIGS. 1 and 3, application service providers can more efficiently provide services to subscribers by integrating and making available services throughout a network such as the internet, rather than at a single location that is often designated as a single IP address. - FIG. 3A shows a schematic of data flow through the
apparatus 12 of FIG. 1. As FIG. 3A indicates,NPMs 14 may provide an interface between the subscriber interface and the network core. The FIG.3A NPM 14 can receive data from a first interface 14 a, and depending on the data request, can process the data and transmit the processed data using either the first interface 14 a or the second interface 14 b. Alternately, theNPM 14 can forward the received data to aFPM 22 that can thereafter return the processed data to theNPM 14 for transmission or forwarding using either the first interface 14 a or the second interface 14 b. - Similarly, the
NPM 14 can receive data from the second interface 14 b, process the data, and transmit the processed data using either the first interface 14 a or the second interface 14 b. - Additionally, data received by the
NPM 14 through the second interface 14 b can be forwarded to theFPMs 22 for processing, wherein theFPMs 22 can return the processed data to theNPM 14 for transmission through either the first interface 14 a or the second interface 14 b. In another example, data received by theNPM 14 can be processed bymultiple FPMs 22, wherein the data can be forwarded to themultiple FPMs 22 through theNPM 14, and returned to theNPM 14 for forwarding to a destination. - In an embodiment wherein two NPMs are configured for complementary operation, data received at a first NPM can be processed by the first NPM, transmitted to a second NPM, and forwarded by the second NPM to a destination. Alternately, data received at the first NPM can be forwarded to the second NPM, processed, and forwarded to a destination accordingly. In yet other scenarios, data received at either of the two NPMs can be forwarded to any of the
FPMs 22, processed, and returned to either of the NPMs for forwarding to a destination. Those with ordinary skill in the art will recognize that the examples of data movement and processing entering, within, and exiting theapparatus 10 are merely for illustration and not limitation, and references to the first NPM and second NPM in the complementary embodiment can be exchanged, for example, without departing from the scope of the invention. - FIG. 3B shows the system of FIGS. 2 and 3A configured to operate in accordance with a Storage Area Network (SAN) as is commonly known in the art. In the configuration of FIG. 3B, the
NPM 14 andFPM 22 integration as indicated in FIG. 3A is preserved, however, theNPM 14 andFPM 22 also maintain interfaces to one ormore storage devices 23 that can be any storage device commonly known in the art, including but not limited to RAM, ROM, diskettes, disk drives, ZIP drives, RAID systems, holographic storage, etc., and such examples are provided for illustration and not limitation. As FIG. 3B indicates, data can be received at theNPM 14 and transferred directly to thestorage devices 23; or, data received by theNPM 14 can be forwarded to one or more FPMs 22 before being forwarded by theFPMs 22 to thestorage devices 23, wherein theFPMs 22 can perform processing on the data before forwarding the data tostorage 23. Similarly, in the FIG. 3B configuration, data can be retrieved fromstorage 23 by either theNPM 14 orFPMs 22. In the FIG. 3B configuration, theNPM 14 andFPMs 22 maintain external interfaces that can accommodate data input and output. - FIG. 4 illustrates an alternate representation of the FIG. 2 system that implements a dual redundant architecture. In the FIG. 4 embodiment of a redundant architecture, there are two NPMs14 a, 14 b, two CPMs 24 a, 24 b, and ten FPMs 22a-22n that reside in a fourteen rack chassis. In the FIG. 4 system, eight
FPMs 22 are provided fortypical apparatus 12 operation, with twoFPMs 22 provided as alternates in the case of failure of up to two of the operational eightFPMs 22. As FIG. 4 indicates, redundant internal switched 100 Mbyte/second (100Base-T) Ethernet control planes 170 a, 170 b, provide connections between each of the NPMs 14 a, 14 b, CPMs 24 a, 24 b, andFPMs 22 a-22 n. The illustrated LA system also includes dual fabric links 172 a, 172 b, wherein eachFPM 22 a-22 n and CPM 24 a, 24 b connect to each fabric link 172 a, 172 b, while the first NPM 14 a connects to the first fabric link 172 b, and the second NPM 14 b connects to the second fabric link 172 b to allow each NPM 14 a, 14 b to operate independently of the other. - Additionally, as indicated in FIG. 4, the FIG. 4 NPMs14 a, 14 b maintain two Gigabit Ethernet connections to the network, wherein one of the connections can be to a subscriber including a subscriber network, etc., while the other connection can be to the internet core. Alternately, the illustrated CPMs 24 a, 24 b maintain a Gigabit Ethernet connection to communicate with a remote storage device illustrated as the
data center 32 of FIG. 2. - FIG. 5 shows a schematic block diagram of an
illustrative NPM 14 according to FIGS. 2 and 4. As indicated in FIGS. 2 and 4, according to the invention, the apparatus or switch 12 can include one or more NPMs 14, and when more than oneNPM 14 is utilized, theNPMs 14 may be configured for redundant or complementary operation. - A
NPM 14 can include a modular and optional subsystem illustrated in FIG. 5 as a network interface subsystem 40. This subsystem 40 physically connects theswitch 12 and a network, thereby providing a data flow between theswitch 12 and the 14 network. TheNPM 14 also includes a Network Processor 42 that Is connects to the network interface subsystem 40. The Network Processor 42 can be, for example, an IQ2000 Network Processor, and those with ordinary skill in the art will recognize this example as an illustration and not a limitation, wherein any like device performing the functions as described herein may be similarly substituted. Additionally, a second processor can be co-located within the NPM architecture without departing from the scope of the invention. In the case of the illustrated IQ2000 Network Processor 42, the network interface system 40 can connect to ports A and B of the Network Processor 42 using a FOCUS bus, wherein such ports shall hereinafter be referred to as FOCUS ports A and B, and wherein two remaining FOCUS ports labeled C and D are available on the Network Processor 42. - The network interface subsystem40 can be a changeable component of the NPM architecture, wherein the different options can be different Printed Circuit Board (PCB) designs or pluggable option boards, however, those with ordinary skill in the art will recognize that such methods of implementing the network interface subsystem 40 are merely illustrative and the invention herein is not limited to such techniques.
- For example, FIGS. 6A through 6F provide various illustrative network interface subsystem40 options for the FIG.
NPM 14. Referring to FIG. 6A, the two Gigabit Ethernet interfaces 50, 52 to the FIG. 5 Network Processor 42 are supported through the Network Processor's 42 two embedded Gigabit Ethernet Media Access Control devices (MACs). In the FIG. 6A embodiment of a network interface subsystem 40, the only external devices necessary for Gigabit Ethernet operation include the Gigabit Ethernet physical layer device (PHY) 54 a, 54 b and optical interfaces 56 a, 56 b. In the illustrated embodiment, a first optical interface 56 a can couple to a subscriber's network equipment, while a second optical interface 56 b can couple to the internet core. - Referring now to FIG. 6B, there is an illustrative configuration for the FIG. 5
NPM 14 wherein FOCUS ports A and B can support up to eight 10/100 Ethernet ports through anexternal octal 10/100 MAC 60 a, 60 b. In FIG. 6B, the two external eightport 10/100 MACs 60 a, 60 b couple to the FOCUS ports and to two external eightport 10/100PHY devices 62 a, 62 b. The PHY devices respectively couple to eight RJ-45connections 64 a, 64 b. In the FIG. 6B configuration, one set of eight RJ-45ports 64 a can be dedicated to the subscriber's network, while the remaining eight RJ-45 ports 64 b can couple to the internet core. In one embodiment, the architecture of FIG. 6B can allow software or firmware to configure the ports as independent data streams such that data received on a subscriber's port can be returned on a internet port. - Referring now to FIG. 6C, there is a network interface subsystem40 configuration for the illustrated
NPM 14 of FIG. 5, wherein theswitch 12 can receive ATM cells with the cooperation of a Segmentation and Reassembly device (SAR) 70 a, 70 b connected to the A and B FOCUS ports. In the configuration of FIG. 6C wherein OC-3c ATM operation is illustrated, four optical interfaces 72 a provide the subscriber interface, while four optical interfaces 72 b provide the internet core interface. The respective subscriber and internet optical interfaces 72 a, 72 b couple to a four port framer 76 a, 76 b that provides input to aTransmission SAR 70 a (TX, “to” the switch 12), or receives output from a Receiver SAR 70 b (RX, “from” the switch 12). In the illustrated configuration, theSARs 70 a, 70 b utilize a 32-bit SRAM 77 and a 64-bit SDRAM 78, although such an embodiment is merely for illustration. In the illustrated system of FIG. 6C, the SAR UTOPIA ports interface to the FOCUS A and B ports through a Field Programmable Gate Array (FPGA) 79. Those with ordinary skill in the art will recognize that the network interface subsystem of FIG. 6C, as with the other diagrams provided herein, is merely provided for illustration and not intended to limit the scope of the invention; therefore, components may be otherwise substituted to perform the same functionality, wherein for example, a single SAR capable of transmission and receiving may be substituted for the twoSARs 70 a, 70 b depicted in the illustration of FIG. 6C. - Referring now to FIG. 6D, there is a network interface subsystem40 configuration for the illustrated
NPM 14 of FIG. 4, wherein OC-12c ATM operation may be enabled. In the illustrated system, one OC-12c optical interface 80 a can couple to the subscribers, while a second OC-12c optical interface 80 b can couple to the internet core. In contrast to FIG. 6C, FIG. 5D illustrates only a two port framer 82 that thereafter interfaces to the TX and RX SARs 84 a, 84 b,FPGA 86, and the respective FOCUS ports of the Network Processor 42. - Referring now to FIG. 6E, there is an OC-3C Packet Over SONET (POS) configuration for the network interface subsystem40 of FIG. 5. In the illustrated configuration of FIG. 6E, four optical interfaces 90 a can interface to the subscriber, while four optical interfaces 90 b can be dedicated to the internet core. The optical interfaces 90 a, 90 b respectively couple to a four port framer 92 a, 92 b that interfaces to the A and B FOCUS ports through a
FPGA 94. Those with ordinary skill in the art will recognize that because PPP (Point-to-Point Protocol) encapsulated packets are inserted into the SONET Payload Envelope (SPE), all POS links are concatenated, and theFPGA 94 utilized in FIG. 6E may therefore be similar to theFPGA 86 of FIG. 6D. - Referring to FIG. 6F, there is a configuration of the network interface subsystem40 of FIG. 5 for a two port OC-12c POS application. In the illustrated system, one optical interface 100 a can couple to the subscriber, and another 100 b can couple to the internet core. The FIG. 6F optical interfaces 100 a, 100 b couple to a two port framer 102 that interfaces to a FPGA 104 for connection to the A and B FOCUS ports.
- Referring back to FIG. 5, the illustrated Network Processor42 also connects to a
CPU subsystem 110 that includes aMIPS processor 112 such as a QED RM700A 400 MHz MIPS processor, a system controller/PCI bridge 114 such as the Galileo GT64120A system controller/PC bridge, local SDRAM 116, and a Programmable Logic Device (PLD) 118. In the illustrated system, thePLD 118 makes accessible the board specific control registers and miscellaneous devices. As illustrated, thePLD 118 is connected to a local high-speed bus on the GT64120A 114 with a local SDRAM 116, and acts as a buffer between the local high-speed bus 120 and a lower speed peripheral bus 122 that has boot PROM Flash 124 and non-volatile RAM (NVRAM) 126 for semi-permanent storage of settings and parameters, and for providing a real-time clock for time of day and date. The FIG. 5 PCI bus 127 connected to the PCI bridge also includes two Fast Ethernet MACs 128 a, 128 b, such as the Intel GD82559ER 100 Mbit MAC that includes an integrated PHY, to provide redundant connections between theNPM 14 and CPM 24 via a primary and secondary 100 Base-T Ethernet channel. The illustrated MACs 128 a, 128 b reside on the PCI bus and perform Direct Memory Access (DMA) transfers between the PCI internal buffers and the defined buffer descriptors within thelocal MIPS memory 112. The MACs 128 a, 128 b can support an unlimited burst size and can be limited by PCI bridge performance. In an embodiment, flow control can be utilized in a control plane application to avoid unnecessary packet loss. The illustrated GT64120A 114 allows theCPU 112 and other local bus masters to access the PCI memory and/or device buses. - The FIG. 5
NPM 14 also includes aswitch fabric subsystem 130 that provides high-speed, non-blocking data connections between theNPM 14 and the other modules within theswitch 12. The connections include two links to another, redundant orcomplementary NPM 14 and a link to each CPM 24. The illustrated NPM's 14 portion of the fabric includes two Focus Connect devices 132 a, 132 b, wherein one Focus Connect device 132 a is connected to the IQ2000 42 port C using a FOCUS Bus, while another Focus Connect device 132 b is connected to port D. - In the illustrated system, the ports on the sixteen bit FOCUS bus on the Focus Connect devices132 a, 132 b, with the exception of local port eight, are attached to a Cypress Quad Hotlink Gigabit transceiver 134 that is a serial to deserial (SerDes) device 136 having dual redundant I/O capabilities and configured for dual channel bonded mode. The dual channel bonded mode couples two channels together in a sixteen-bit channel, wherein there can be two such sixteen-bit channels per device. Referring now FIG. 7, the dual redundant serial I/O capabilities, in cooperation with a crossover on the backplane, allow any slot to be connected to any other slot such that a packet or a data route vector modification is not necessary when only one
NPM 14 is present. The FIG. 5 Serdes devices 136 convert incoming serial stream data from the backplane, to parallel data for forwarding to the Focus Connect devices 132 a, 132 b. Similarly, the Serdes 136 converts parallel data from the Focus Connect device 132 a, 132 b to serial data before placing the data on the backplane. - For example, with the illustrated system of FIG. 4 a Focus Connect device132 a, 132 b is connected to the IQ2000 FOCUS C and D ports and wherein the Focus Connect devices 132 a, 132 b maintain eight ports each, in the illustrative system wherein there is a fourteen slot chassis and there are ten slots for
FPMs 22 a-22 n, two slots for NPMs 14 a, 14 b, and two slots for CPMs 24 a, 24 b, the Focus Connect device ports can be configured as shown in Tables 1 and 2:TABLE 1 Focus Connect device connected to IQ2000 FOCUS Port C (132a) Focus Connect Port Connected Module 1 FPM, slot 12 FPM, slot 23 FPM, slot 34 FPM, slot 45 FPM, slot 56 CPM, slot 17 Other NPM, Focus Connect Port D 8 Local IQ2000, Port C -
TABLE 2 Focus Connect device connected to IQ2000 FOCUS Port D (132b) Focus Connect Port Connected Module 1 FPM, slot 6 2 FPM, slot 73 FPM, slot 84 FPM, slot 9 5 FPM, slot 106 CPM, slot 27 Other NPM, Focus Connect on Port C 8 Local IQ2000, Port D - As Tables 1 and 2 indicate, using the FIG. 4
NPM 14 in a redundant system as illustrated in FIGS. 1 and 3, the dual NPMs 14 a, 14 b can access allFPMs 22 a-22 n and each CPM 24 a, 24 b, and vice-versa. - The fourth major subsystem of the FIG. 5
NPM 14 is amemory subsystem 140. The FIG. 5 memory subsystem is a single RAMbus channel for packet buffer storage and flow lookup table space. In the illustrated embodiment, thememory subsystem 140 includes a search processor 142 and several content addressable memories 144, although those with ordinary skill in the art will recognize that the invention herein is not limited to thememory subsystem 140 or the components thereof. - Referring back to FIG. 5, data received by the
NPM 14 can be forwarded to the IQ2000 42 that can include instructions for recognizing packets or data flows. For example, CPU or processor instructions can implement or otherwise utilize a hash table to identify services or processing for an identified packet or flow, wherein the packet or flow can subsequently be forwarded to aFPM 22, for example, in accordance with the service or processing. Alternately, unidentified packets can be forwarded to theMIPS 112 that can include instructions for identifying the packet or flow and associated processing or services. In an embodiment, packets unable to be identified by theMIPS 112 can be forwarded by theMIPS 112 to the CPM 24 that can also include instructions for identifying packets or flows. Identification information from either the CPM 24 orMIPS 112 can be returned to the IQ2000 and the hash table can be updated accordingly with the identification information. - Referring now to FIG. 8, there is a basic schematic block diagram of a
FPM 22 for the system illustrated in FIGS. 1-3. In the embodiment of FIG. 8, theFPM 22 is based upon Intel's 440BX AGPset, with a majority of the FPM functionality similar to a personal computer (PC). The illustratedFPM 22 can therefore be viewed as having four main sections that include a processor or CPU 120, a 440BX AGPset 122, a FOCUS interface, and peripherals. In the illustrated system of FIGS. 2 and 4, theFPMs 22 are identically designed, although those with ordinary skill in the art will recognize that the methods and systems disclosed herein may include differing FPM designs. - Referring to FIG. 8, the illustrated
FPM 22 embodiment supports asingle socket 370 Intel Pentium III CPU 150 with a 100 Megahertz processor system bus (PSB), although such processor is merely for illustration and not limitation, and those with ordinary skill in the art will recognize that the invention disclosed herein is not limited by the CPU selection or processor component. Similarly, those with ordinary skill in the art will recognize that multiple processors 150 can be incorporated within the FPM architecture without departing from the scope of the invention. Therepresentative FPM 22 also includes a 440BX Accelerated Graphics Port (AGPset) 152 that provides host/processor support for the CPU 150. - Data packets moving into and out of the
FPM 22 in the illustrated system use a 16-bit wide 100 Megahertz bus called the FOCUS bus, and in the illustrated embodiment, a full-duplex FOCUS bus attaches to everyFPM 22 from eachNPM 14, wherein in the illustrated embodiment of dual redundant NPMs 14 a, 14 b, everyFPM 22 communicates with two NPMs 14 a, 14 b. As indicated previously, the FOCUS bus signal is serialized on the NPM 14 a, 14 b before it is placed on the backplane, to improve signal integrity and reduce the number of traces. As illustrated, deserializers 154 a, 154 b on theFPM 22 convert the signal from the backplane to a bus and the bus connects the deserializers 154 a, 154 b to aFocus Connect 156 that interfaces through aFPGA 158 andInput Output Processor 160 to the440BX AGPset 152. The illustrated PRC is an eight-way FOCUS switch that allows theFPM 22 to properly direct packets to thecorrect NPM 14. - The FIG. 8
FPM 22 also maintains peripherals including control plane interfaces, mass storage devices, and serial interfaces. In the illustratedFPM 22, the control plane provides a dedicated path for communicating with theFPM 22 through twofast Ethernet controllers 130 a, 130 b that interface theAGP 152 to the redundant control plane. As indicated in FIGS. 2 and 4, it is typically the CPM 24 a, 24 b that communicates with theFPM 22 via the control plane. In the illustrated embodiment, thefast Ethernet controllers 130 a, 130 b connect to control planes that are switched 100 Megabits/second Ethernet networks that terminate at the two CPMs 24. - The illustrated
FPM 22 may also support different types of mass storage devices that can include, for example, a M-Systems DiskOnChip (DOC), a 2.5 inch disk drive, NVRAM for semi-permanent storage of settings and parameters, etc. - Referring now to FIG. 9, there is an illustration of a sample CPM24 as presented in the systems of FIG. 2 and 4. As indicated previously, the CPM 24 performs generic, switch-wide functions and is connected to the other switch components through a data interface that, in the illustrated embodiment, is identical to the data interface of FIG. 7 for the
FPM 22. Those with ordinary skill in the art will recognize that the common data interfaces for theFPM 22 and CPM 24 modules are merely for convenience and do not limit the scope of the invention. - As discussed earlier, in the illustrated embodiment, the control planes terminate at a CPM24, wherein the illustrative control planes are dual redundant, private, switched 100 Megabit Ethernet. The switching elements are housed on the CPM 24, and therefore all point-to-point connections between other modules and a CPM 24 are maintained through the backplane connector.
- Additionally, the CPM24 controls the
switch 12 boot process and manages the removal and insertion of modules into theswitch 12 while theswitch 12 is operational. - In the illustrated CPM24 of FIG. 9, the
main CPU 170 is a Pentium III processor, although the invention herein is not so limited, and any processor or CPU or device capable of performing the functions described herein may be substituted without departing from the scope of the invention, wherein multiple processors or CPUs may additionally be utilized. In the illustrated CPM 24, a 440BX Accelerated Graphics Port (AGPset) 172 provides host/processor support for theCPU 170. The FIG. 9 AGP 172 supports a PCI interface to connect to miscellaneous hardware devices. - Three
fast Ethernet controllers 174 a, 174 b, 174 c also reside on the PCI bus of the 440 BX 172. One of these three fast Ethernet controllers 174 a provides external communications and multiplexes with the fast Ethernet on the other CPM 24. The other twofast Ethernet controllers 174 b, 174 c provide dedicated communications paths to theNPMs 14 andFPMs 22. In the illustrated system of FIG. 9, the fast Ethernet controller is an Intel 82559ER, fully integrated 10BASE-T/100BASE-TX LAN solution combining the MAC and PHY into a single component, although such embodiment is merely provided as an illustration. In the illustrated system, the fast Ethernet controllers 174 b, 174 cinterface to anEthernet switch 176 that provides fourteen dedicated communication paths to the control plane for up to ten FPMs 22 and twoNPMs 14. - Data packets move into and out of the illustrated CPM24 using a sixteen-bit wide 100 MHz FOCUS bus. In the illustrated system, there is one full-duplex FOCUS bus coupling each CPM 24 to each
NPM 14, wherein for the illustrated system of FIGS. 2 and 4 having dual redundant NPMs 14 a, 14 b, each CPM 24 couples to two NPMs 14 a, 14 b. Serdes devices 178 a, 178 b convert incoming serial stream data from the backplane, to parallel data for forwarding to aFocus Connect device 180. Similarly, the Serdes 178 a, 178 b convert parallel data from theFocus Connect 180 to serial data before placing it on the backplane. The illustratedFocus Connect 180 is a switch used by the CPM 24 to direct packets to thecorrect NPM 14. In the FIG. 9 system, packets are moved into and out of theCPU memory 182 through a FPGA 184 andInput Output Processor 186 that interface theFocus Connect 180 to the AGP 172. - Referring again to the systems of FIGS. 2 and 4, the CPMs24 coordinate the different components of the switch, including the NPMs and FPMs, and similarly support access to a
local storage device 30 that can also be referred to as a local memory device. - In one embodiment, the
local storage device 30 can store images, configuration files, and databases for executing applications on theFPMs 22. For example, thelocal device 30 may store subscriber profiles that can be retrieved for use by either theNPM 14 orFPMs 22. In an embodiment, a configuration file for a particular application or subscriber can be retrieved and copied tomultiple FPMs 22, for example, thereby providing increased efficiency in a scenario wherein multiple, identically configuredFPMs 22 are desired. In such an embodiment,FPMs 22 may be grouped for a subscriber. Thelocal storage device 30 can be any well-known memory component that may be removable or resident on the CPMs 24, including but not limited to a floppy disk, compact disc (CD), digital video device (DVD), etc. In the illustrated system, there is at least one local storage device for each CPM 24. Similarly, in the illustrated system, thelocal storage device 30 can be divided into several partitions to accommodate and protect certain processor's needs, including the processors on thevarious FPMs 22. In one embodiment, thelocal storage device 30 can include two identical disk partitions that allow dynamic software upgrades. In an embodiment, two disk partitions can include identical groups of partitions that can include swap partitions, common partitions for use by all processors, and specific partitions for different module processors (i.e., NPMs, FPMs, CPMs). - The illustrated CPMs24 can also access a
remote storage device 32, wherein such remote storage can store services, database, etc., that may not be efficiently stored in thelocal memory device 30. Theremote storage device 32 can be any compilation of memory components that can be physically or logically partitioned depending upon the application, and those with ordinary skill in the art will recognize that the invention herein is not limited by the actual memory components utilized to create theremote storage device 32. - The FIG. 2 CPMs24 also couple to at least one management server (MS)
module 28. In the illustrated embodiment, the connection is a 100Base-T Ethernet connection. In the FIG. 2 system, theMS 28 can receive and aggregate health and status information from theswitch modules MS 28 through the CPMs 24. In an embodiment whereinNPMs 14,FPMs 22, and CPMs 24 are redundantly provided, for example, theMS 28 can activate or inactivate aparticular apparatus 12 module. In the illustrated embodiments, theMS 28 communicates with theapparatus 12 modules through the CPM 24. In an embodiment, theMS 28 may be a PC, Sun Workstation, or other similarly operational microprocessor controlled device, that can be equipped with microprocessor executable instructions for monitoring and controlling theapparatus 12 modules. In an embodiment, the MS 38 can include an executable that provides a graphical user interface (GUI) for display ofapparatus 12 monitoring and control information. In one embodiment, the MS 38 can be a separate device from the CPM 24, while in another embodiment, theMS 28 functionality can be incorporated into the CPM 24, for example, by utilizing a separate processor on the CPM 24 for MS 38 functionality. - In an embodiment, the well-known Linux operating system can be installed on the
FPM 22 and CPM 24 processors, thereby providing an open architecture that allows installation and modification of, for example, applications residing on theFPMs 22. In the illustrated systems, the management and control of applications on the switch modules can be performed using theMS 28. In the illustrated embodiments, theMS 28 management can be performed using the CPM 24. Applications such as firewall applications, etc., in the illustrated embodiments can therefore be downloaded, removed, modified, transferred betweenFPMs 22, etc. using theMS 28. - In an embodiment, the
NPMs 14 can execute the well-known Vxworks operating system on the MIPS processor and a small executable on the IQ2000 processor 42. Those with ordinary skill in the art will recognize that the methods and systems disclosed herein are not limited to the choice of operating systems on the various switch modules, and that any operating system allowing an open architecture can be substituted while remaining within the scope of the invention. - One advantage of the present invention over the prior art is that a switch architecture is disclosed with multiple processor modules having an open architecture wherein applications may be distributed to and throughout the multiple processors for efficient servicing by applications throughout a network, and wherein a distinct processor module can interface to the network and appropriately direct data from the network, to one of the multiple processor modules in part as a function of the multiple processor processing loads, and hence return the processed data to the network.
- What has thus been described are an apparatus and method to distribute applications and services in and throughout a network. The apparatus includes the functionality of a switch with the ability to apply applications and services to received data according to respective subscriber profiles. Front-end processors, or Network Processor Modules (NPMs), receive and recognize data flows from subscribers, extract profile information for the respective subscribers, utilize flow scheduling techniques to forward the data to applications processors, or Flow Processor Modules (FPMs). The FPMs utilize resident applications to process data received from the NPMs. A Control Processor Module (CPM) facilitates applications processing and maintains connections to the NPMs, FPMs, local and remote storage devices, and a Management Server (MS) module that can monitor the health and maintenance of the various modules. In an embodiment, the MS can download and otherwise control applications on the FPMs that execute the Linux operating system to provide an open architecture for downloading, executing, modifying, and otherwise managing applications.
- Although the present invention has been described relative to a specific embodiment thereof, it is not so limited. Obviously many modifications and variations of the present invention may become apparent in light of the above teachings. For example, although the illustrated systems divided the modules into various components, the functionality of components may be combined into a single module where appropriate, without affecting the invention. For example, the management server module may be incorporated in the control processor module. Additionally, the processors and supporting components of the different modules may be replaced with other, similarly functioning components. In some embodiments, additional supporting components may be desired, while in other embodiments, some of the illustrated supporting components can be omitted. The connections between components, although in the illustrated embodiments include Ethernet connections, may include wired or wireless Ethernet, for example, or may include any combination of communicative channel and protocol, wherein examples of wired or wireless communicative channels may be bus configurations, cabling, infrared, spread spectrum, or other communicative channels or connections, and examples of protocols may include pseudo noise modulation, Frame Relay, Asynchronous Transfer Mode (ATM), etc., wherein such combinations of communicative channel and protocol may herein be described and defined as electrical connections. Although the illustrated systems utilized Gigabit Ethernet connections, 100Base T, etc., any other high-speed data link can be substituted therein without departing from the scope of the invention.
- Many additional changes in the details, materials, steps and arrangement of parts, herein described and illustrated to explain the nature of the invention, may be made by those skilled in the art within the principle and scope of the invention. Accordingly, it will be understood that the invention is not to be limited to the embodiments disclosed herein, may be practiced otherwise than specifically described, and is to be understood from the following claims, that are to be interpreted as broadly as allowed under the law.
Claims (45)
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/790,434 US20020165947A1 (en) | 2000-09-25 | 2001-02-21 | Network application apparatus |
US11/173,923 US7836443B2 (en) | 2000-09-25 | 2005-07-01 | Network application apparatus |
US11/877,819 US8402540B2 (en) | 2000-09-25 | 2007-10-24 | Systems and methods for processing data flows |
US11/926,292 US8010469B2 (en) | 2000-09-25 | 2007-10-29 | Systems and methods for processing data flows |
US12/539,175 US20100042565A1 (en) | 2000-09-25 | 2009-08-11 | Mezzazine in-depth data analysis facility |
US13/216,739 US8135657B2 (en) | 2000-09-25 | 2011-08-24 | Systems and methods for processing data flows |
US15/137,492 US20160366160A1 (en) | 2000-09-25 | 2016-04-25 | Systems and Methods for Processing Data Flows |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US23528100P | 2000-09-25 | 2000-09-25 | |
US09/790,434 US20020165947A1 (en) | 2000-09-25 | 2001-02-21 | Network application apparatus |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/840,945 Continuation US20020059424A1 (en) | 2000-09-25 | 2001-04-24 | Flow scheduling for network application apparatus |
US11/173,923 Continuation US7836443B2 (en) | 2000-09-25 | 2005-07-01 | Network application apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
US20020165947A1 true US20020165947A1 (en) | 2002-11-07 |
Family
ID=22884848
Family Applications (9)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/790,434 Abandoned US20020165947A1 (en) | 2000-09-25 | 2001-02-21 | Network application apparatus |
US09/840,945 Abandoned US20020059424A1 (en) | 2000-09-25 | 2001-04-24 | Flow scheduling for network application apparatus |
US11/173,923 Expired - Lifetime US7836443B2 (en) | 2000-09-25 | 2005-07-01 | Network application apparatus |
US11/174,181 Expired - Fee Related US8046465B2 (en) | 2000-09-25 | 2005-07-01 | Flow scheduling for network application apparatus |
US12/980,768 Expired - Fee Related US9244739B2 (en) | 2000-09-25 | 2010-12-29 | Applications processing in a network apparatus |
US12/980,822 Abandoned US20110238783A1 (en) | 2000-09-25 | 2010-12-29 | Source-based data flow processing network apparatus |
US12/980,714 Abandoned US20110231925A1 (en) | 2000-09-25 | 2010-12-29 | Firewall network application apparatus |
US12/980,906 Abandoned US20110231513A1 (en) | 2000-09-25 | 2010-12-29 | Application distribution control network apparatus |
US14/995,594 Abandoned US20160191571A1 (en) | 2000-09-25 | 2016-01-14 | Applications processing in a network apparatus |
Family Applications After (8)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/840,945 Abandoned US20020059424A1 (en) | 2000-09-25 | 2001-04-24 | Flow scheduling for network application apparatus |
US11/173,923 Expired - Lifetime US7836443B2 (en) | 2000-09-25 | 2005-07-01 | Network application apparatus |
US11/174,181 Expired - Fee Related US8046465B2 (en) | 2000-09-25 | 2005-07-01 | Flow scheduling for network application apparatus |
US12/980,768 Expired - Fee Related US9244739B2 (en) | 2000-09-25 | 2010-12-29 | Applications processing in a network apparatus |
US12/980,822 Abandoned US20110238783A1 (en) | 2000-09-25 | 2010-12-29 | Source-based data flow processing network apparatus |
US12/980,714 Abandoned US20110231925A1 (en) | 2000-09-25 | 2010-12-29 | Firewall network application apparatus |
US12/980,906 Abandoned US20110231513A1 (en) | 2000-09-25 | 2010-12-29 | Application distribution control network apparatus |
US14/995,594 Abandoned US20160191571A1 (en) | 2000-09-25 | 2016-01-14 | Applications processing in a network apparatus |
Country Status (9)
Country | Link |
---|---|
US (9) | US20020165947A1 (en) |
EP (1) | EP1381937A2 (en) |
JP (1) | JP2004524598A (en) |
KR (1) | KR20040005824A (en) |
CN (1) | CN1316366C (en) |
AU (1) | AU2001291227A1 (en) |
CA (1) | CA2423475A1 (en) |
IL (8) | IL155068A0 (en) |
WO (1) | WO2002027469A2 (en) |
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Also Published As
Publication number | Publication date |
---|---|
WO2002027469A2 (en) | 2002-04-04 |
US20110238783A1 (en) | 2011-09-29 |
US20020059424A1 (en) | 2002-05-16 |
US7836443B2 (en) | 2010-11-16 |
IL219560A0 (en) | 2012-06-28 |
IL219562A0 (en) | 2012-06-28 |
US20160191571A1 (en) | 2016-06-30 |
IL155068A (en) | 2012-06-28 |
US20060143499A1 (en) | 2006-06-29 |
IL219557A0 (en) | 2012-06-28 |
IL219557A (en) | 2013-11-28 |
IL219559A0 (en) | 2012-06-28 |
EP1381937A2 (en) | 2004-01-21 |
KR20040005824A (en) | 2004-01-16 |
WO2002027469A3 (en) | 2003-11-06 |
AU2001291227A1 (en) | 2002-04-08 |
IL219560A (en) | 2014-04-30 |
US8046465B2 (en) | 2011-10-25 |
CN1316366C (en) | 2007-05-16 |
IL219561A0 (en) | 2012-06-28 |
JP2004524598A (en) | 2004-08-12 |
US20110231513A1 (en) | 2011-09-22 |
US20110231925A1 (en) | 2011-09-22 |
IL219558A (en) | 2014-03-31 |
IL219559A (en) | 2014-03-31 |
US20110238839A1 (en) | 2011-09-29 |
IL155068A0 (en) | 2003-10-31 |
US20060010207A1 (en) | 2006-01-12 |
US9244739B2 (en) | 2016-01-26 |
CA2423475A1 (en) | 2002-04-04 |
CN1518694A (en) | 2004-08-04 |
IL219558A0 (en) | 2012-06-28 |
IL219561A (en) | 2013-09-30 |
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