US20020117683A1 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
- Publication number
- US20020117683A1 US20020117683A1 US10/133,407 US13340702A US2002117683A1 US 20020117683 A1 US20020117683 A1 US 20020117683A1 US 13340702 A US13340702 A US 13340702A US 2002117683 A1 US2002117683 A1 US 2002117683A1
- Authority
- US
- United States
- Prior art keywords
- semiconductor
- aluminum nitride
- substrate
- grooves
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Definitions
- the present invention relates to a semiconductor device equipped with a heat sink and having a large amount of heat generation and a manufacturing method thereof, and more particularly, to a GaAs semiconductor device and a manufacturing method thereof.
- Japanese Patent No. 2762987 discloses a technique for a semiconductor device in which, a heat sink made of a high thermal conductivity insulator having a thermal expansion coefficient which is substantially equal to that of the GaAs substrate is adhered to the back surface of the GaAs substrate.
- the GaAs substrate is cut together with the high thermal conductivity insulator to yield pieces of a pellet size.
- Japanese Patent Laid-open Publication No. Hei6-349983 also discloses a technique in which a heat releasing plate (heat sink) is adhered to the back surface of the semiconductor wafer, and the semiconductor wafer is cut together with the heat releasing plate.
- this technique also has a drawback in which it requires a cumbersome cut-work, resulting in a low efficiency.
- there is another drawback in which, because the high thermal conductivity insulator has a plate-like shape, its surface area is small, and a sufficient heat release performance cannot be achieved.
- An object of the present invention is to provide a semiconductor device which is capable of preventing its performance degradation and generation of cracks in a semiconductor substrate, in particular, a GaAs substrate, which are caused by a stress accompanied by a temperature increase, and a manufacturing method thereof which is superior in mass productivity and low cost.
- a manufacturing method of a semiconductor device comprises the steps of forming a plurality of semiconductor elements at a predetermined interval on a surface of a semiconductor substrate; working the semiconductor substrate to a predetermined thickness; preparing a plate member having a flat surface and a groove-shape surface, grooves being formed in the groove-shape surface at an interval which is substantially equal to the interval of the semiconductor elements; arranging the plate member and the semiconductor substrate so as to align positions between the semiconductor elements with the grooves; adhering the flat surface of the plate member to a surface of the semiconductor substrate on which the semiconductor elements are not formed; and breaking these adhered semiconductor substrate and the plate member along the grooves, thereby obtaining a plurality of semiconductor devices in which the plate member is adhered to the semiconductor substrate having the semiconductor element formed thereon.
- the plate member in which grooves are formed in advance at an interval which is substantially equal to the interval between the semiconductor elements, and the semiconductor substrate are arranged so as to align the positions between the semiconductor elements with the positions of the grooves, and they are adhered together using, for example, a bonding resin or an AuSn alloy. Then, by breaking the semiconductor substrate and the plate member together at the grooves, it becomes possible to manufacture the semiconductor devices equipped with a heat sink made of the plate member in mass production and at a low cost.
- the flatness of the flat surface of the plate member may be tolerated as long as the flatness does not cause problems upon adhering the plate member to the semiconductor substrate.
- the positional relationship between the grooves and the semiconductor elements needs to be adjusted so as to prevent the cut-out faces of the semiconductor substrate from entering the interior of the semiconductor elements.
- the interval of the grooves may be substantially equal to the interval of the semiconductor elements to the extent which enables the positional relationship between the grooves and the semiconductor elements to be maintained throughout the entire semiconductor substrate before breaking.
- the semiconductor substrate is made of a III-V group semiconductor, for example. In particular, it may be made of GaAs.
- the thermal expansion coefficient of the plate member is substantially equal to the thermal expansion coefficient of the semiconductor substrate.
- the plate member is formed of aluminum nitride, for example.
- an aluminum nitride plate which has a thermal expansion coefficient of about 6 ppm/, which is consistent with the thermal expansion coefficient of the GaAs substrate, even when the semiconductor device is mounted on a base member which has a thermal expansion coefficient different from that of the GaAs substrate, the aluminum nitride plate functions as a cushioning material, thereby relaxing a stress the GaAs substrate receiving from the base member due to thermal expansion and thermal contraction.
- a semiconductor device comprises a semiconductor element; a semiconductor substrate made of a III-V group material, the semiconductor element being formed on the semiconductor substrate; and a heat sink made of a plate member adhered to the semiconductor substrate, the thermal expansion coefficient of the plate member being substantially equal to the thermal expansion coefficient of the semiconductor substrate, wherein irregularity is formed in a surface of the plate member to which the semiconductor substrate is not adhered.
- a heat sink made of a plate member having a thermal expansion coefficient which is substantially equal to the thermal expansion coefficient of the semiconductor substrate is adhered to the III-V group semiconductor substrate. Accordingly, temperature elevation of the semiconductor device is suppressed, and the deterioration of the performance of the semiconductor device and the generation of cracks in the semiconductor device due to temperature elevation and thermal stresses can be prevented, thereby improving the performance and the reliability of the semiconductor device. Also, because irregularity is formed on a surface of the plate member which is not adhered to the semiconductor substrate, the surface area of the plate member can be made large and heat releasing performance can be improved.
- the III-V group semiconductor substrate may be made of GaAs, for example.
- the plate member may be made of aluminum nitride, for example.
- FIG. 1A is a cross-sectional view showing a manufacturing method of a semiconductor device according to an embodiment of the present invention
- FIG. 1B is a cross-sectional view showing the manufacturing method of a semiconductor device according to the embodiment, which is the next step to the step shown in FIG. 1A;
- FIG. 1C is a cross-sectional view showing the manufacturing method of a semiconductor device according to the embodiment, which is the next step to the step shown in FIG. 1B;
- FIG. 2 is a cross-sectional view showing a semiconductor device according to another embodiment of the present invention.
- FIGS. 1A to 1 C are cross-sectional views showing a manufacturing method of a semiconductor device according to an embodiment of the present invention in the order of steps.
- a plurality of semiconductor elements 10 are formed at a constant interval on the upper surface of a GaAs substrate 1 , which is a semiconductor substrate.
- the semiconductor elements 10 may be arranged in the form of matrix, for example.
- the GaAs substrate 1 on which the plurality of semiconductor elements 10 have been formed, is worked to a predetermined thickness.
- the thickness is 20 to 80 m, for example.
- the grooves 20 also are formed so as to extend in the vertical and horizontal directions at the same pitch as that of the semiconductor elements 10 , i.e., in a lattice manner.
- a bonding resin 3 is sandwiched between the GaAs substrate 1 , which has been worked to the predetermined thickness, and the aluminum nitride plate 2 having the grooves 20 formed thereon.
- the semiconductor substrate 1 , the bonding resin 3 , and the aluminum nitride plate 2 are stacked so that the positions between the semiconductor elements 10 are aligned with the positions of the grooves 20 .
- the bonding resin 3 the upper surface of the aluminum nitride plate 2 and the lower surface of the GaAs substrate 1 are adhered. This completes bonding of the GaAs substrate 1 , which has been worked to the predetermined thickness, and the aluminum nitride plate 2 having the grooves 20 formed thereon.
- the adhered body 4 of the GaAs substrate 1 and the aluminum nitride plate 2 are broken along the grooves 20 .
- the GaAs substrate 1 and the aluminum nitride plate 2 are thus cut at cutting faces 21 in the grooves 20 . Accordingly, the GaAs substrate 1 is divided into pieces by every semiconductor element 10 .
- pellets 5 are the semiconductor devices according to this embodiment.
- a single semiconductor element 10 is provided on the GaAs substrate 1 .
- the aluminum nitride plate 2 is adhered via the bonding resin 3 .
- the traces of the grooves 20 remain, forming notches (irregularity) 20 a.
- the aluminum nitride plate 2 functions as a heat sink, which absorbs heat from the semiconductor element 10 .
- the semiconductor device equipped with a heat sink made of the aluminum nitride plate 2 can efficiently be manufactured at a low cost.
- the semiconductor device of this embodiment is equipped with the heat sink made of the aluminum nitride plate 2 , it can absorb the heat generated from the semiconductor element 10 , thereby providing high performance and reliability. Since the traces of the grooves 20 remain on the lower surface of the aluminum nitride plate 2 , these traces become notches (irregularity) 20 a, thereby increasing the surface area of the aluminum nitride plate 2 and improving the heat releasing performance. Moreover, since the thermal expansion coefficient of the aluminum nitride plate 2 is substantially equal to the thermal coefficient of the GaAs substrate 1 , the performance degradation of the semiconductor device (pellet 5 ) and generation of cracks within the semiconductor device due to a thermal stress accompanied by temperature changes can be prevented.
- FIG. 2 is a cross-sectional view showing a construction of a semiconductor device according to the another embodiment.
- the GaAs substrate 1 and the aluminum nitride plate 2 are adhered by the bonding resin 3
- the another embodiment uses, instead of the bonding resin 3 , an AuSn alloy plate 6 having a thickness of 1 to 10 m to adhere the aluminum nitride plate 2 to the GaAs substrate 1 .
- the AuSn alloy plate 6 having a thickness of 1 to 10 m is sandwiched between the GaAs substrate 1 and the aluminum nitride plate 2 , and the GaAs substrate 1 , AuSn alloy plate 6 , and the aluminum nitride plate 2 are stacked and heated to a temperature of 310 to 350.
- the AuSn alloy plate 6 accordingly is melted, and the GaAs substrate 1 and the aluminum nitride plate 2 are adhered each other by the melted and solidified AuSn alloy.
- the semiconductor devices pelletlets 5 a
- each pellet 5 a a single semiconductor element 10 is provided on the GaAs substrate 1 . Also, on the lower surface of the GaAs substrate 1 , i.e., on a surface which does not have the semiconductor element 10 provided thereon, the aluminum nitride plate 2 is adhered to the GaAs substrate 1 via the AuSn alloy plate 6 . On the lower surface of the aluminum nitride plate 2 , the traces of the grooves 20 remain, forming notches (irregularity) 20 a. The aluminum nitride plate 2 functions as a heat sink, which absorbs heat from the semiconductor element 10 .
Abstract
A plurality of semiconductor elements are formed at a predetermined interval on a surface of a GaAs substrate, and the semiconductor substrate is worked to a predetermined thickness. On the other hand, an aluminum nitride plate having a flat upper surface and a lower surface, where a plurality of grooves are formed on at an interval which is substantially the same as the interval between the semiconductor elements, is prepared. Next, the semiconductor substrate, a bonding resin, and the aluminum nitride plate are stacked so as to align positions of grooves with positions between the semiconductor elements. Then, the lower surface of the semiconductor substrate is adhered to the upper surface of the plate member using a bonding resin. The thus adhered body of the GaAs substrate and the aluminum nitride plate is broken along the grooves into a plurality of pellets, thereby manufacturing semiconductor devices.
Description
- This application is a division of Application No. 09/678,309, filed Oct. 3, 2000, now pending, and based on Japanese Patent Application No. 11-283072, filed Oct. 4, 1999, by Toshiharu TAKEUCHI. This application claims only subject matter disclosed in the parent application and therefore presents no new matter.
- 1. Field of the Invention
- The present invention relates to a semiconductor device equipped with a heat sink and having a large amount of heat generation and a manufacturing method thereof, and more particularly, to a GaAs semiconductor device and a manufacturing method thereof.
- 2. Description of the Related Art
- Semiconductor devices having a superior high frequency performance, for example, a Schottky gate field effect transistor (FET) using a III-V group semiconductor, such as GaAs, have been widely used in the fields of satellite communication, mobile communication, microwave base communication and the like. Accordingly, there has been a considerable demand for improvement of their performance.
- For improvements of the high frequency performance and reliability, it is essential for those semiconductor devices to efficiently release heat generated due to an increase of the output power.
- In particular, in the case of GaAs devices, suppression of the temperature increase of the element due to heat generation of the semiconductor element is an important key to realization of their full performance as well as a high reliability of the semiconductor device.
- Also, because a temperature increase during the manufacturing process, such as mount process or the like, and during actual usage of the semiconductor device causes a stress to the GaAs element, a technique for alleviating such a temperature increase has been sought.
- As such conventional technique, a heat sink having a thermal expansion coefficient substantially equal to that of the GaAs element is adhered to the GaAs element. However, there has been disclosed no methods, which realize this effect with mass production and at a low cost. Japanese Patent No. 2762987 discloses a technique for a semiconductor device in which, a heat sink made of a high thermal conductivity insulator having a thermal expansion coefficient which is substantially equal to that of the GaAs substrate is adhered to the back surface of the GaAs substrate. However, in this technique, after the high thermal conductivity insulator is adhered to the GaAs substrate, the GaAs substrate is cut together with the high thermal conductivity insulator to yield pieces of a pellet size. Accordingly, there is a drawback in which it requires a cumbersome cut-work, resulting in a low efficiency. Also, there is another drawback in which, because the high thermal conductivity insulator has a plate-like shape, its surface area is small, and a sufficient heat release performance cannot be achieved.
- Further, Japanese Patent Laid-open Publication No. Hei6-349983 also discloses a technique in which a heat releasing plate (heat sink) is adhered to the back surface of the semiconductor wafer, and the semiconductor wafer is cut together with the heat releasing plate. However, this technique also has a drawback in which it requires a cumbersome cut-work, resulting in a low efficiency. Also, there is another drawback in which, because the high thermal conductivity insulator has a plate-like shape, its surface area is small, and a sufficient heat release performance cannot be achieved.
- An object of the present invention is to provide a semiconductor device which is capable of preventing its performance degradation and generation of cracks in a semiconductor substrate, in particular, a GaAs substrate, which are caused by a stress accompanied by a temperature increase, and a manufacturing method thereof which is superior in mass productivity and low cost.
- A manufacturing method of a semiconductor device according to the present invention comprises the steps of forming a plurality of semiconductor elements at a predetermined interval on a surface of a semiconductor substrate; working the semiconductor substrate to a predetermined thickness; preparing a plate member having a flat surface and a groove-shape surface, grooves being formed in the groove-shape surface at an interval which is substantially equal to the interval of the semiconductor elements; arranging the plate member and the semiconductor substrate so as to align positions between the semiconductor elements with the grooves; adhering the flat surface of the plate member to a surface of the semiconductor substrate on which the semiconductor elements are not formed; and breaking these adhered semiconductor substrate and the plate member along the grooves, thereby obtaining a plurality of semiconductor devices in which the plate member is adhered to the semiconductor substrate having the semiconductor element formed thereon.
- In the present invention, the plate member, in which grooves are formed in advance at an interval which is substantially equal to the interval between the semiconductor elements, and the semiconductor substrate are arranged so as to align the positions between the semiconductor elements with the positions of the grooves, and they are adhered together using, for example, a bonding resin or an AuSn alloy. Then, by breaking the semiconductor substrate and the plate member together at the grooves, it becomes possible to manufacture the semiconductor devices equipped with a heat sink made of the plate member in mass production and at a low cost. The flatness of the flat surface of the plate member may be tolerated as long as the flatness does not cause problems upon adhering the plate member to the semiconductor substrate. Also, the positional relationship between the grooves and the semiconductor elements needs to be adjusted so as to prevent the cut-out faces of the semiconductor substrate from entering the interior of the semiconductor elements. Also, the interval of the grooves may be substantially equal to the interval of the semiconductor elements to the extent which enables the positional relationship between the grooves and the semiconductor elements to be maintained throughout the entire semiconductor substrate before breaking.
- The semiconductor substrate is made of a III-V group semiconductor, for example. In particular, it may be made of GaAs.
- Also, it is preferable that the thermal expansion coefficient of the plate member is substantially equal to the thermal expansion coefficient of the semiconductor substrate. The plate member is formed of aluminum nitride, for example. By making the thermal expansion coefficient of the plate member substantially equal to the thermal expansion coefficient of the semiconductor substrate, generation of a stress due to a difference in thermal expansion coefficient can be suppressed, and deterioration of the performance of the semiconductor device and generation of cracks can be prevented. In particular, by using, as a heat sink, an aluminum nitride plate which has a thermal expansion coefficient of about 6 ppm/, which is consistent with the thermal expansion coefficient of the GaAs substrate, even when the semiconductor device is mounted on a base member which has a thermal expansion coefficient different from that of the GaAs substrate, the aluminum nitride plate functions as a cushioning material, thereby relaxing a stress the GaAs substrate receiving from the base member due to thermal expansion and thermal contraction.
- A semiconductor device according to the present invention comprises a semiconductor element; a semiconductor substrate made of a III-V group material, the semiconductor element being formed on the semiconductor substrate; and a heat sink made of a plate member adhered to the semiconductor substrate, the thermal expansion coefficient of the plate member being substantially equal to the thermal expansion coefficient of the semiconductor substrate, wherein irregularity is formed in a surface of the plate member to which the semiconductor substrate is not adhered.
- According to the present invention, a heat sink made of a plate member having a thermal expansion coefficient which is substantially equal to the thermal expansion coefficient of the semiconductor substrate is adhered to the III-V group semiconductor substrate. Accordingly, temperature elevation of the semiconductor device is suppressed, and the deterioration of the performance of the semiconductor device and the generation of cracks in the semiconductor device due to temperature elevation and thermal stresses can be prevented, thereby improving the performance and the reliability of the semiconductor device. Also, because irregularity is formed on a surface of the plate member which is not adhered to the semiconductor substrate, the surface area of the plate member can be made large and heat releasing performance can be improved.
- The III-V group semiconductor substrate may be made of GaAs, for example. In that case, the plate member may be made of aluminum nitride, for example.
- The nature, principle, and utility of the invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings in which like parts are designated by like reference numerals or characters.
- In the accompanying drawings:
- FIG. 1A is a cross-sectional view showing a manufacturing method of a semiconductor device according to an embodiment of the present invention;
- FIG. 1B is a cross-sectional view showing the manufacturing method of a semiconductor device according to the embodiment, which is the next step to the step shown in FIG. 1A;
- FIG. 1C is a cross-sectional view showing the manufacturing method of a semiconductor device according to the embodiment, which is the next step to the step shown in FIG. 1B; and
- FIG. 2 is a cross-sectional view showing a semiconductor device according to another embodiment of the present invention.
- The embodiments of the present invention will now be described below with reference to the accompanying drawings. FIGS. 1A to1C are cross-sectional views showing a manufacturing method of a semiconductor device according to an embodiment of the present invention in the order of steps.
- The semiconductor manufacturing method of the embodiment is now explained. First, as shown in the FIG. 1A, a plurality of
semiconductor elements 10 are formed at a constant interval on the upper surface of aGaAs substrate 1, which is a semiconductor substrate. Thesemiconductor elements 10 may be arranged in the form of matrix, for example. - Next, the
GaAs substrate 1, on which the plurality ofsemiconductor elements 10 have been formed, is worked to a predetermined thickness. The thickness is 20 to 80 m, for example. - On the other hand, an
aluminum nitride plate 2 having a flat upper surface and a lower surface, where a plurality ofgrooves 20 are formed on at an interval which is substantially the same as the interval between thesemiconductor elements 10, is prepared. For example, when thesemiconductor elements 10 are arranged in the matrix form, thegrooves 20 also are formed so as to extend in the vertical and horizontal directions at the same pitch as that of thesemiconductor elements 10, i.e., in a lattice manner. - Next, a
bonding resin 3 is sandwiched between theGaAs substrate 1, which has been worked to the predetermined thickness, and thealuminum nitride plate 2 having thegrooves 20 formed thereon. - Next, as shown in FIG. 1B, the
semiconductor substrate 1, thebonding resin 3, and thealuminum nitride plate 2 are stacked so that the positions between thesemiconductor elements 10 are aligned with the positions of thegrooves 20. Then, by thebonding resin 3, the upper surface of thealuminum nitride plate 2 and the lower surface of theGaAs substrate 1 are adhered. This completes bonding of theGaAs substrate 1, which has been worked to the predetermined thickness, and thealuminum nitride plate 2 having thegrooves 20 formed thereon. - Next, the adhered
body 4 of theGaAs substrate 1 and thealuminum nitride plate 2 are broken along thegrooves 20. TheGaAs substrate 1 and thealuminum nitride plate 2 are thus cut at cutting faces 21 in thegrooves 20. Accordingly, theGaAs substrate 1 is divided into pieces by everysemiconductor element 10. - In this way, a plurality of
pellets 5, as shown in FIG. 1C, are manufactured. Thepellets 5 are the semiconductor devices according to this embodiment. In each of thepellets 5, asingle semiconductor element 10 is provided on theGaAs substrate 1. Also, on the lower surface of theGaAs substrate 1, i.e., on a surface which does not have thesemiconductor element 10 provided thereon, thealuminum nitride plate 2 is adhered via thebonding resin 3. On the lower surface of thealuminum nitride plate 2, the traces of thegrooves 20 remain, forming notches (irregularity) 20 a. Thealuminum nitride plate 2 functions as a heat sink, which absorbs heat from thesemiconductor element 10. - In this embodiment, by adhering the
aluminum nitride plate 2, on which thegrooves 20 have been formed in advance, to theGaAs substrate 1 having thesemiconductor elements 10 formed thereon, and by breaking thealuminum nitride plate 2 and theGaAs substrate 1 together along thegrooves 20, the semiconductor device equipped with a heat sink made of thealuminum nitride plate 2 can efficiently be manufactured at a low cost. - Also, since the semiconductor device of this embodiment is equipped with the heat sink made of the
aluminum nitride plate 2, it can absorb the heat generated from thesemiconductor element 10, thereby providing high performance and reliability. Since the traces of thegrooves 20 remain on the lower surface of thealuminum nitride plate 2, these traces become notches (irregularity) 20 a, thereby increasing the surface area of thealuminum nitride plate 2 and improving the heat releasing performance. Moreover, since the thermal expansion coefficient of thealuminum nitride plate 2 is substantially equal to the thermal coefficient of theGaAs substrate 1, the performance degradation of the semiconductor device (pellet 5) and generation of cracks within the semiconductor device due to a thermal stress accompanied by temperature changes can be prevented. - Next, another embodiment of the present invention will be explained. FIG. 2 is a cross-sectional view showing a construction of a semiconductor device according to the another embodiment. In the embodiment shown in FIGS. 1A to1C, the
GaAs substrate 1 and thealuminum nitride plate 2 are adhered by thebonding resin 3, the another embodiment uses, instead of thebonding resin 3, an AuSn alloy plate 6 having a thickness of 1 to 10 m to adhere thealuminum nitride plate 2 to theGaAs substrate 1. - Specifically, the AuSn alloy plate6 having a thickness of 1 to 10 m is sandwiched between the
GaAs substrate 1 and thealuminum nitride plate 2, and theGaAs substrate 1, AuSn alloy plate 6, and thealuminum nitride plate 2 are stacked and heated to a temperature of 310 to 350. The AuSn alloy plate 6 accordingly is melted, and theGaAs substrate 1 and thealuminum nitride plate 2 are adhered each other by the melted and solidified AuSn alloy. Next, by breaking theGaAs substrate 1 andaluminum nitride plate 2, which have been adhered by the melted and solidified AuSn alloy, along thegrooves 20, the semiconductor devices (pellets 5 a) can be manufactured. - In each
pellet 5 a, asingle semiconductor element 10 is provided on theGaAs substrate 1. Also, on the lower surface of theGaAs substrate 1, i.e., on a surface which does not have thesemiconductor element 10 provided thereon, thealuminum nitride plate 2 is adhered to theGaAs substrate 1 via the AuSn alloy plate 6. On the lower surface of thealuminum nitride plate 2, the traces of thegrooves 20 remain, forming notches (irregularity) 20 a. Thealuminum nitride plate 2 functions as a heat sink, which absorbs heat from thesemiconductor element 10. - By this construction, as compared with the case where the
bonding resin 3 is used, GaAs semiconductor devices which have even higher heat releasing characteristics can be manufactured. - While there has been described what are at present considered to be preferred embodiments of the invention, it will be understood that various modifications may be made thereto, and it is intended that the appended claims cover all such modifications as fall within the true spirit and scope of the invention.
Claims (4)
1. A semiconductor device comprising:
a semiconductor element;
a semiconductor substrate made of a III-V group material, the semiconductor element being formed on the semiconductor substrate; and
a heat sink made of a plate member adhered to said semiconductor substrate, the thermal expansion coefficient of the plate member being substantially equal to the thermal expansion coefficient of said semiconductor substrate,
wherein irregularity is formed in a surface of said plate member to which said semiconductor substrate is not adhered.
2. The semiconductor device according to claim 1 , wherein said plate member is made of aluminum nitride.
3. The semiconductor device according to claim 1 , wherein said III-V group semiconductor substrate is made of GaAs.
4. The semiconductor device according to claim 1 , wherein said semiconductor device is a pellet having said semiconductor element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/133,407 US20020117683A1 (en) | 1999-10-04 | 2002-04-29 | Semiconductor device |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28307299A JP3339572B2 (en) | 1999-10-04 | 1999-10-04 | Semiconductor device and manufacturing method thereof |
JP11-283072 | 1999-10-04 | ||
US09/678,309 US6383895B1 (en) | 1999-10-04 | 2000-10-03 | Method of forming a plurality of semiconductor devices |
US10/133,407 US20020117683A1 (en) | 1999-10-04 | 2002-04-29 | Semiconductor device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/678,309 Division US6383895B1 (en) | 1999-10-04 | 2000-10-03 | Method of forming a plurality of semiconductor devices |
Publications (1)
Publication Number | Publication Date |
---|---|
US20020117683A1 true US20020117683A1 (en) | 2002-08-29 |
Family
ID=17660853
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/678,309 Expired - Fee Related US6383895B1 (en) | 1999-10-04 | 2000-10-03 | Method of forming a plurality of semiconductor devices |
US10/133,407 Abandoned US20020117683A1 (en) | 1999-10-04 | 2002-04-29 | Semiconductor device |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/678,309 Expired - Fee Related US6383895B1 (en) | 1999-10-04 | 2000-10-03 | Method of forming a plurality of semiconductor devices |
Country Status (2)
Country | Link |
---|---|
US (2) | US6383895B1 (en) |
JP (1) | JP3339572B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008128944A1 (en) * | 2007-04-24 | 2008-10-30 | Ceramtec Ag | Component having a ceramic base the surface of which is metalized |
WO2008128945A1 (en) * | 2007-04-24 | 2008-10-30 | Ceramtec Ag | Component having a ceramic base with a metalized surface |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020173077A1 (en) * | 2001-05-03 | 2002-11-21 | Ho Tzong Da | Thermally enhanced wafer-level chip scale package and method of fabricating the same |
US9034695B2 (en) * | 2012-04-11 | 2015-05-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated thermal solutions for packaging integrated circuits |
US9054063B2 (en) | 2013-04-05 | 2015-06-09 | Infineon Technologies Ag | High power single-die semiconductor package |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06349983A (en) | 1993-06-14 | 1994-12-22 | Hitachi Ltd | Manufacture of semiconductor device |
MY118036A (en) * | 1996-01-22 | 2004-08-30 | Lintec Corp | Wafer dicing/bonding sheet and process for producing semiconductor device |
JP2762987B2 (en) | 1996-02-19 | 1998-06-11 | 日本電気株式会社 | Semiconductor device and manufacturing method thereof |
-
1999
- 1999-10-04 JP JP28307299A patent/JP3339572B2/en not_active Expired - Fee Related
-
2000
- 2000-10-03 US US09/678,309 patent/US6383895B1/en not_active Expired - Fee Related
-
2002
- 2002-04-29 US US10/133,407 patent/US20020117683A1/en not_active Abandoned
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008128944A1 (en) * | 2007-04-24 | 2008-10-30 | Ceramtec Ag | Component having a ceramic base the surface of which is metalized |
WO2008128945A1 (en) * | 2007-04-24 | 2008-10-30 | Ceramtec Ag | Component having a ceramic base with a metalized surface |
US20100089625A1 (en) * | 2007-04-24 | 2010-04-15 | Claus Peter Kluge | Component having a ceramic base with a metalized surface |
US20100112372A1 (en) * | 2007-04-24 | 2010-05-06 | Claus Peter Kluge | Component having a ceramic base the surface of which is metalized |
US8980398B2 (en) | 2007-04-24 | 2015-03-17 | CeramTee GmbH | Component having a ceramic base with a metalized surface |
Also Published As
Publication number | Publication date |
---|---|
US6383895B1 (en) | 2002-05-07 |
JP3339572B2 (en) | 2002-10-28 |
JP2001110753A (en) | 2001-04-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101956996B1 (en) | Power module of double-side cooling | |
EP0746022B1 (en) | Hybrid multi-chip module and method of fabricating | |
US7892882B2 (en) | Methods and apparatus for a semiconductor device package with improved thermal performance | |
US8375576B2 (en) | Method for manufacturing wafer scale heat slug system | |
US20070145555A1 (en) | Semiconductor Structure with a Plastic Housing and Separable Carrier Plate | |
US20120248631A1 (en) | Method for manufacturing semiconductor devices having a glass substrate | |
US8796843B1 (en) | RF and milimeter-wave high-power semiconductor device | |
US5583371A (en) | Resin-sealed semiconductor device capable of improving in heat radiation characteristics of resin-sealed semiconductor elements | |
CN108305837B (en) | Method for producing semiconductor device | |
US10957656B2 (en) | Integrated circuit packages with patterned protective material | |
KR20090092292A (en) | High thermal performance packaging for circuit dies | |
US20140339694A1 (en) | Semiconductor Devices Having a Glass Substrate, and Method for Manufacturing Thereof | |
CN101079467A (en) | Covered devices in a semiconductor package | |
JP2011187877A (en) | Semiconductor device, and method of manufacturing the same | |
CN110047763B (en) | Chip device and method for forming the same, and chip assembly and method for forming the same | |
US20220208637A1 (en) | Structure and method related to a power module using a hybrid spacer | |
US20240096734A1 (en) | Leadframe spacer for double-sided power module | |
US11303009B2 (en) | Packages for advanced antenna systems | |
US6383895B1 (en) | Method of forming a plurality of semiconductor devices | |
US20190122955A1 (en) | Semiconductor device and method for manufacturing same | |
US11594510B2 (en) | Assembly processes for semiconductor device assemblies including spacer with embedded semiconductor die | |
US20220102305A1 (en) | Singulation of microelectronic components with direct bonding interfaces | |
US20110024775A1 (en) | Methods for and devices made using multiple stage growths | |
KR101165784B1 (en) | Epitaxial wafer package and manufacturing method therefor | |
CN101026134A (en) | Semiconductor device and semiconductor module therewith |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: NEC ELECTRONICS CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NEC CORPORATION;REEL/FRAME:013755/0392 Effective date: 20021101 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |