US20020022347A1 - Selective epitaxial growth method in semiconductor device - Google Patents

Selective epitaxial growth method in semiconductor device Download PDF

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US20020022347A1
US20020022347A1 US09/880,912 US88091201A US2002022347A1 US 20020022347 A1 US20020022347 A1 US 20020022347A1 US 88091201 A US88091201 A US 88091201A US 2002022347 A1 US2002022347 A1 US 2002022347A1
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gas
source gas
layer
introducing
silicon
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Jung-Woo Park
Jong-Ryul Yoo
Jung-min Ha
Si-Young Choi
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Samsung Electronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/933—Germanium or silicon or Ge-Si on III-V

Definitions

  • the present invention relates to a method of fabricating a semiconductor device. More particularly, the present invention relates to a method of selective epitaxial growth for a semiconductor device.
  • the selective epitaxial growth technique is mainly used to grow a semiconductor layer such as a silicon layer or a germanium layer on a predetermined region of a semiconductor substrate.
  • Japanese Laid-open Patent No. 4139819 discloses a method of selectively growing a silicon layer by alternately and repeatedly injecting disilane (Si 2 H 6 ) gas and chlorine (Cl 2 ) gas into a chamber in which a silicon substrate is loaded.
  • the disilane gas is used as a silicon source gas
  • the chlorine gas is used as an etching gas for removing silicon nuclei on an insulating layer.
  • a selective epitaxial growth method in fabrication of a semiconductor device comprises loading a semiconductor substrate having an insulating layer pattern on a predetermined region of the semiconductor substrate into a chamber and repeatedly (at least two times) performing the growth process, wherein each of the growth processes includes three steps of sequentially injecting a source gas, an etching gas and a reducing gas.
  • the insulating layer pattern may correspond to an isolation layer formed at a predetermined region of the semiconductor substrate.
  • the insulating layer may further include a capping layer covering a top surface and a spacer covering a sidewall of a gate electrode.
  • the chamber is evacuated using a vacuum pump, to maintain a pressure lower than atmospheric pressure, and then the semiconductor substrate is heated and maintained at a predetermined temperature.
  • the source gas is then injected into the chamber.
  • the source gas comprises a gas for growing a semiconductor layer.
  • the source gas comprises a silicon source gas, germanium source gas or combination gas thereof.
  • the source gas is decomposed by heat energy in the chamber, thereby generating silicon nuclei, germanium nuclei or silicon germanium (Si—Ge) nuclei.
  • Si—Ge silicon germanium
  • the injection of the source gas is stopped and the etching gas, e.g., chlorine gas, is injected into the chamber.
  • the etching gas reacts with the atoms of the semiconductor layer and a by-product gas compound is vented out of the chamber.
  • the semiconductor layer formed on the insulating layer pattern is selectively removed.
  • the semiconductor layer formed on the exposed semiconductor substrate still exists. This is because the adsorption coefficient at the surface of the insulating layer pattern is different from that of the exposed semiconductor substrate.
  • the surface of the semiconductor layer that exists on the exposed semiconductor substrate may be passivated with atoms of the etching gas during injection of the etching gas. That is to say, the atoms of the etching gas may be bonded with the atoms of the semiconductor layer.
  • the reducing gas such as hydrogen gas is injected into the chamber.
  • the reducing gas reacts with the atoms of the passivation layer, thereby removing the passivation layer.
  • a new semiconductor layer may be easily grown on the previous semiconductor layer during injection of the source gas in a subsequent step.
  • a dopant gas may be additionally injected into the chamber during at least one process of the processes of injecting the source gas, the etching gas and the reducing gas.
  • the dopant gas may be a phosphine (PH 3 ) gas, a diborane (B 2 H 6 ) gas or an arsine (AsH 3 ) gas.
  • FIG. 1 illustrates a timing diagram for a method of selective epitaxial growth according to the present invention
  • FIGS. 2 illustrates a process flowchart for a method of selective epitaxial growth according to the present invention.
  • Korean Patent Application No. 2000-46680 filed on Aug. 11, 2000, and entitled: “Selective Epitaxial Growth Method in Semiconductor Device,” is incorporated by reference herein in its entirety.
  • an insulating layer pattern is formed on a semiconductor substrate, thereby exposing a predetermined region of the semiconductor substrate.
  • the semiconductor substrate having the insulating layer pattern is loaded into a reaction chamber of an epitaxial apparatus 1 .
  • An “N” value allocated in a first register of a controller in the expitaxial apparatus is initialized to “0”, and a “K” value allocated in a second register thereof is set to a predetermined number of process cycles 3.
  • the “N” value indicates the number of cycle of the process that is actually performed in the reaction chamber.
  • the “K” value indicates the desirable number of cycles, which is required by an operator to obtain a particular epitaxial layer thickness.
  • the air in the chamber is then evacuated by the vacuum pump, thereby lowering the pressure in the chamber. At this time, it is preferable that the pressure in the chamber is controlled to 10 ⁇ 8 Torr or lower 5.
  • the semiconductor substrate is then heated to a predetermined temperature, e.g., 450 C to 800° C. 7.
  • a source gas is injected into the chamber containing the heated semiconductor substrate for a first duration T1, e.g., 8 to 12 seconds 9. Accordingly, the source gas is decomposed by heat energy. Atoms decomposed from the source gas are bonded to the dangling bonds of the exposed semiconductor substrate and the insulating layer pattern. Thus, a thin semiconductor layer is formed on the entire surface of the substrate.
  • silane (SiH 4 ) gas, disilane (Si 2 H 6 ) gas or dichlorosilane (SiH 2 Cl 2 ) gas is used as the source gas and a silicon substrate is used as the semiconductor substrate, silicon atoms are adsorbed on the entire surface of the silicon substrate having the insulating layer pattern.
  • a thin silicon layer is formed on the entire surface of the substrate. At this time, the silicon layer grown on the exposed silicon substrate has the same crystal orientation as the silicon substrate.
  • a silicon source gas is used as the source gas in order to form a silicon layer
  • a germanium source gas is used as the source gas in order to form a germanium layer
  • the source gas may comprise the silicon source gas and the germanium source gas in order to form Ge—Si layer.
  • the silicon source gas comprises silane (SiH 4 ) gas, disilane (Si 2 H 6 ) gas or dichlorosilane (SiH 2 Cl 2 ) gas
  • the germanium source gas comprises GeH 4 gas.
  • a compound semiconductor layer may be formed by using other source gases except for the above source gases.
  • an etching gas is injected into the chamber for a second duration T2, e.g., 6 to 15 seconds 11.
  • the etching gas comprises a gas that reacts highly with the atoms of the semiconductor layer on the insulating layer pattern. That is to say, it is preferable that the etching gas is a chlorine gas.
  • the silicon layer on the insulating layer pattern reacts with the chlorine gas, thereby generating a by-product (gas compound) such as a SiCl 4 gas.
  • the germanium layer on the insulating layer pattern reacts with the chlorine gas, thereby generating a byproduct (gas compound) such as a GeCl 4 gas.
  • the gas compound is then vented out of the chamber. As a result, the semiconductor layer on the insulating layer is selectively removed.
  • the etching gas does not generate a volatile gas compound such as the SiCl 4 gas or the GeCl 4 gas with the semiconductor layer on the exposed semiconductor substrate. Rather, atoms of the etching gas are adsorbed at the surface of the semiconductor layer on the exposed semiconductor substrate, thereby forming a passivation layer on the semiconductor layer. This occurs because the bonding energy between the atoms of the semiconductor layer is much stronger than the reaction energy between the etching gas and the semiconductor layer.
  • the growth rate of a new semiconductor layer on the previous semiconductor layer becomes much slower or the new semiconductor layer may not be grown at all, even though the source gas is provided in a subsequent step. In other words, it is difficult to obtain a uniform growth rate throughout the substrate.
  • the surface roughness of the semiconductor layer, including rectangular shaped grooves is remarkably increased. The grooves are formed due to the local presence of the passivation layer.
  • a reducing gas is introduced in the chamber for a third duration T3, e.g., 6 to 15 seconds 13.
  • the reducing gas is a hydrogen gas.
  • the hydrogen gas easily reacts with the passivation layer (chlorine layer), thereby generating HCl gas to remove the passivation layer on the semiconductor layer.
  • the “N” value is increased by “1” 15.
  • the increased “N” is compared to the “K” 17.
  • the steps 9, 11, 13 of injecting the source gas, the etching gas and the reducing gas are repeatedly performed until the “N” value is equal to the “K” value, thereby forming a semiconductor layer having a desirable thickness.
  • a dopant gas may be additionally injected in the chamber during at least one step of the first to third durations T1, T2, T3.
  • the semiconductor layer can be doped with the impurities by introducing the dopant gas in the chamber during the first duration (T1) as illustrated in FIG. 1.
  • the dopant gas may comprise a phophine (PH 3 ) gas, diborane (B 2 H 6 ) gas or arsine (AsH 3 ) gas.
  • PH 3 phophine
  • B 2 H 6 diborane
  • AsH 3 arsine
  • a silicon layer was selectively grown on a predetermined region of a semiconductor substrate according to an embodiment of the present invention as described above. Also, a conventional silicon layer was selectively grown on a predetermined region of another semiconductor substrate in order to compare with the present invention.
  • the semiconductor substrate was provided by forming an isolation layer at a predetermined region of a single crystalline silicon substrate to define an active region and forming a plurality of gate patterns crossing over the active region.
  • the isolation layer was formed of a silicon oxide layer using a trench isolation technique, and the gate patterns were formed by successively patterning a doped polysilicon layer, a tungsten silicide layer and a high temperature oxide layer, which have been sequentially stacked.
  • a spacer composed of silicon nitride was formed on the sidewalls of the gate patterns. As a result, the isolation layer, the gate patterns, and the spacer expose a portion of the semiconductor substrate such as a source/drain region.
  • the pressure in the chamber was reduced to 2 ⁇ 10 ⁇ 8 Torr.
  • the substrate was then heated to a temperature of 700° C.
  • disilane (Si 2 H 6 ) gas as a silicon source gas was introduced into the chamber at a flow rate of 10 sccm (standard cubic centimeter per minute) for 10 seconds.
  • chlorine gas as an etching gas was introduced in the chamber at a flow rate of 1 sccm for 12 seconds.
  • hydrogen gas as a reducing gas was introduced in the chamber at a flow rate of 25 sccm for 12 seconds.
  • this reducing gas was not supplied during the growth of the semiconductor layer using the conventional technology.
  • the source gas injection process, the etching gas injection process and the reducing gas injection process were repeatedly and sequentially performed for 30 cycles. Also, in case of the conventional technology, the source gas injection process and the etching gas injection process were repeatedly and alternately performed for 30 cycles.
  • the growth rate of the silicon layer according to the present invention was faster than that of the conventional technology. More particularly, in the case of the present invention, the thickness of the silicon layer grown on the source/drain region in a cell array region was 2060 angstrom, and the thickness of the silicon layer grown on the source/drain region in a peripheral circuit region having a relatively low pattern density was 2600 angstrom. On the contrary, in case of the conventional technology, the thickness of the silicon layer grown on the source/drain region in the cell array region was 1650 angstrom, and the thickness of the silicon layer grown on the source/drain region in a peripheral circuit region was 2000 angstrom.
  • the root mean square (RMS) value to the surface roughness of the silicon layer according to the present invention was 10 angstrom
  • the root mean square (RMS) value to the surface roughness of the conventional silicon layer was 21.7 angstrom
  • the groove density (per length) of the silicon layer according to the present invention was 1.4/um to 1.8/um
  • the groove density (per length) of the conventional silicon layer was 2.4/um to 3.0/um.
  • the present invention it is possible to remarkably improve the growth rate, the surface roughness and the groove density of the epitaxial layer by sequentially introducing the source gas, the etching gas and the reducing gas in the chamber. Also, it is possible to obtain the excellent growth selectivity of the epitaxial process.

Abstract

A method of selective epitaxial growth performed by sequentially and repeatedly introducing a source gas, an etching gas, and a reducing gas in the reaction chamber, wherein controlled epitaxial layer doping may be obtained by introducing a dopant source gas during introducing any one of the source gas, an etching gas, and a reducing gas, and thereby producing a smooth and uniform epitaxial layer on a predetermined region of a semiconductor substrate.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention relates to a method of fabricating a semiconductor device. More particularly, the present invention relates to a method of selective epitaxial growth for a semiconductor device. [0002]
  • 2. Description of the Related Art [0003]
  • As integrated circuit devices become more highly integrated and include finer geometries, the width and spacing between interconnections have also been reduced. In order to avoid misalignment problems associated with highly integrated circuit devices, a self-alignment technology has been required. selective epitaxial growth technique has been suggested as one of the self-alignment techniques. The selective epitaxial growth technique is mainly used to grow a semiconductor layer such as a silicon layer or a germanium layer on a predetermined region of a semiconductor substrate. [0004]
  • Japanese Laid-open Patent No. 4139819 discloses a method of selectively growing a silicon layer by alternately and repeatedly injecting disilane (Si[0005] 2H6) gas and chlorine (Cl2) gas into a chamber in which a silicon substrate is loaded. Here, the disilane gas is used as a silicon source gas, and the chlorine gas is used as an etching gas for removing silicon nuclei on an insulating layer.
  • According to the Japanese Laid-open Patent No. 4139819, chlorine atoms are adsorbed on a surface of the silicon layer grown on the silicon substrate during injection of the chlorine gas. Accordingly, the silicon layer is passivated with chlorine atoms. As a result, the silicon layer is grown very slowly, even though the silicon source gas is injected in a subsequent step. [0006]
    • SUMMARY OF THE INVENTION
  • It is therefore a feature of an embodiment of the present invention to provide a selective epitaxial growth method, which is capable of improving a growth selectivity as well as a growth rate. [0007]
  • It is another feature of an embodiment of the present invention to provide a selective epitaxial growth method, which is capable of removing defects due to the etching gas. [0008]
  • It is still another feature of an embodiment of the present invention to provide a selective epitaxial growth method, which is capable of easily adjusting a doping concentration of impurities by using an in-situ doping method. [0009]
  • These features can be provided by a selective epitaxial growth method in fabrication of a semiconductor device. This method comprises loading a semiconductor substrate having an insulating layer pattern on a predetermined region of the semiconductor substrate into a chamber and repeatedly (at least two times) performing the growth process, wherein each of the growth processes includes three steps of sequentially injecting a source gas, an etching gas and a reducing gas. The insulating layer pattern may correspond to an isolation layer formed at a predetermined region of the semiconductor substrate. Also, the insulating layer may further include a capping layer covering a top surface and a spacer covering a sidewall of a gate electrode. [0010]
  • After loading the semiconductor substrate into the chamber, the chamber is evacuated using a vacuum pump, to maintain a pressure lower than atmospheric pressure, and then the semiconductor substrate is heated and maintained at a predetermined temperature. The source gas is then injected into the chamber. Here, the source gas comprises a gas for growing a semiconductor layer. For example, the source gas comprises a silicon source gas, germanium source gas or combination gas thereof. At this time, the source gas is decomposed by heat energy in the chamber, thereby generating silicon nuclei, germanium nuclei or silicon germanium (Si—Ge) nuclei. Thus, the silicon nuclei, the germanium nuclei or the silicon germanium nuclei are bonded with dangling bonds at the surface of the semiconductor substrate. As a result, a semiconductor layer is formed on the entire surface of the semiconductor substrate. [0011]
  • After formation of the semiconductor layer, the injection of the source gas is stopped and the etching gas, e.g., chlorine gas, is injected into the chamber. The etching gas reacts with the atoms of the semiconductor layer and a by-product gas compound is vented out of the chamber. Thus, the semiconductor layer formed on the insulating layer pattern is selectively removed. On the contrary, the semiconductor layer formed on the exposed semiconductor substrate still exists. This is because the adsorption coefficient at the surface of the insulating layer pattern is different from that of the exposed semiconductor substrate. Meanwhile, the surface of the semiconductor layer that exists on the exposed semiconductor substrate may be passivated with atoms of the etching gas during injection of the etching gas. That is to say, the atoms of the etching gas may be bonded with the atoms of the semiconductor layer. [0012]
  • After stopping the injection of the etching gas, the reducing gas such as hydrogen gas is injected into the chamber. The reducing gas reacts with the atoms of the passivation layer, thereby removing the passivation layer. As a result, a new semiconductor layer may be easily grown on the previous semiconductor layer during injection of the source gas in a subsequent step. [0013]
  • In addition, a dopant gas may be additionally injected into the chamber during at least one process of the processes of injecting the source gas, the etching gas and the reducing gas. Thus, it is easy to separately control the doping concentrations of the semiconductor layers. As a result, it is possible to obtain a desirable doping profile as per the depth of the total semiconductor layers. The dopant gas may be a phosphine (PH[0014] 3) gas, a diborane (B2H6) gas or an arsine (AsH3) gas.
  • These and other features of the present invention will be readily apparent to those of ordinary skill in the art upon review of the detailed description that follows.[0015]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • Other features of the present invention will be more readily understood from the following detailed description of specific embodiments thereof when read in conjunction with the accompanying drawings, in which: [0016]
  • FIG. 1 illustrates a timing diagram for a method of selective epitaxial growth according to the present invention; and [0017]
  • FIGS. [0018] 2 illustrates a process flowchart for a method of selective epitaxial growth according to the present invention.
    • DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
  • Korean Patent Application No. 2000-46680, filed on Aug. 11, 2000, and entitled: “Selective Epitaxial Growth Method in Semiconductor Device,” is incorporated by reference herein in its entirety. [0019]
  • The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those of ordinary skill in the art. [0020]
  • Referring concurrently to FIGS. 1 and 2, an insulating layer pattern is formed on a semiconductor substrate, thereby exposing a predetermined region of the semiconductor substrate. The semiconductor substrate having the insulating layer pattern is loaded into a reaction chamber of an [0021] epitaxial apparatus 1. An “N” value allocated in a first register of a controller in the expitaxial apparatus is initialized to “0”, and a “K” value allocated in a second register thereof is set to a predetermined number of process cycles 3. Here, the “N” value indicates the number of cycle of the process that is actually performed in the reaction chamber. On the contrary, the “K” value indicates the desirable number of cycles, which is required by an operator to obtain a particular epitaxial layer thickness. The air in the chamber is then evacuated by the vacuum pump, thereby lowering the pressure in the chamber. At this time, it is preferable that the pressure in the chamber is controlled to 10−8 Torr or lower 5. The semiconductor substrate is then heated to a predetermined temperature, e.g., 450 C to 800° C. 7.
  • A source gas is injected into the chamber containing the heated semiconductor substrate for a first duration T1, e.g., 8 to 12 [0022] seconds 9. Accordingly, the source gas is decomposed by heat energy. Atoms decomposed from the source gas are bonded to the dangling bonds of the exposed semiconductor substrate and the insulating layer pattern. Thus, a thin semiconductor layer is formed on the entire surface of the substrate. For example, in the event that silane (SiH4) gas, disilane (Si2H6) gas or dichlorosilane (SiH2Cl2) gas is used as the source gas and a silicon substrate is used as the semiconductor substrate, silicon atoms are adsorbed on the entire surface of the silicon substrate having the insulating layer pattern. A thin silicon layer is formed on the entire surface of the substrate. At this time, the silicon layer grown on the exposed silicon substrate has the same crystal orientation as the silicon substrate.
  • Selecting the source gas depends on the semiconductor layer to be formed. For example, a silicon source gas is used as the source gas in order to form a silicon layer, and a germanium source gas is used as the source gas in order to form a germanium layer. Also, the source gas may comprise the silicon source gas and the germanium source gas in order to form Ge—Si layer. The silicon source gas comprises silane (SiH[0023] 4) gas, disilane (Si2H6) gas or dichlorosilane (SiH2Cl2) gas, and the germanium source gas comprises GeH4 gas. In addition, a compound semiconductor layer may be formed by using other source gases except for the above source gases.
  • After stopping the injection of the source gas, an etching gas is injected into the chamber for a second duration T2, e.g., 6 to 15 [0024] seconds 11. The etching gas comprises a gas that reacts highly with the atoms of the semiconductor layer on the insulating layer pattern. That is to say, it is preferable that the etching gas is a chlorine gas. For example, in the event that the semiconductor layer is a silicon layer, the silicon layer on the insulating layer pattern reacts with the chlorine gas, thereby generating a by-product (gas compound) such as a SiCl4 gas. Alternatively, in the event that the semiconductor layer is a germanium layer, the germanium layer on the insulating layer pattern reacts with the chlorine gas, thereby generating a byproduct (gas compound) such as a GeCl4 gas. The gas compound is then vented out of the chamber. As a result, the semiconductor layer on the insulating layer is selectively removed.
  • Unlike the reaction of the etching gas with the atoms of the semiconductor layer on the insulating layer pattern, the etching gas does not generate a volatile gas compound such as the SiCl[0025] 4 gas or the GeCl4 gas with the semiconductor layer on the exposed semiconductor substrate. Rather, atoms of the etching gas are adsorbed at the surface of the semiconductor layer on the exposed semiconductor substrate, thereby forming a passivation layer on the semiconductor layer. This occurs because the bonding energy between the atoms of the semiconductor layer is much stronger than the reaction energy between the etching gas and the semiconductor layer. Once the passivation layer is formed, the growth rate of a new semiconductor layer on the previous semiconductor layer becomes much slower or the new semiconductor layer may not be grown at all, even though the source gas is provided in a subsequent step. In other words, it is difficult to obtain a uniform growth rate throughout the substrate. As a result, in the case when a passivation layer is present, the surface roughness of the semiconductor layer, including rectangular shaped grooves, is remarkably increased. The grooves are formed due to the local presence of the passivation layer.
  • After stopping the injection of the etching gas, a reducing gas is introduced in the chamber for a third duration T3, e.g., 6 to 15 [0026] seconds 13. Preferably, the reducing gas is a hydrogen gas. The hydrogen gas easily reacts with the passivation layer (chlorine layer), thereby generating HCl gas to remove the passivation layer on the semiconductor layer.
  • After stopping the injection of the reducing gas, the “N” value is increased by “1” 15. The increased “N” is compared to the “K” 17. The [0027] steps 9, 11, 13 of injecting the source gas, the etching gas and the reducing gas are repeatedly performed until the “N” value is equal to the “K” value, thereby forming a semiconductor layer having a desirable thickness.
  • In the meantime, a dopant gas may be additionally injected in the chamber during at least one step of the first to third durations T1, T2, T3. For instance, the semiconductor layer can be doped with the impurities by introducing the dopant gas in the chamber during the first duration (T1) as illustrated in FIG. 1. The dopant gas may comprise a phophine (PH[0028] 3) gas, diborane (B2H6) gas or arsine (AsH3) gas. Thus, it is possible to form an in-situ doped semiconductor layer. In addition, it is easy to form the in-situ doped semiconductor layer having a desirable doping profile by appropriately varying the flow rate of the dopant gas as per each process cycle.
    • EXAMPLES
  • A silicon layer was selectively grown on a predetermined region of a semiconductor substrate according to an embodiment of the present invention as described above. Also, a conventional silicon layer was selectively grown on a predetermined region of another semiconductor substrate in order to compare with the present invention. Here, the semiconductor substrate was provided by forming an isolation layer at a predetermined region of a single crystalline silicon substrate to define an active region and forming a plurality of gate patterns crossing over the active region. The isolation layer was formed of a silicon oxide layer using a trench isolation technique, and the gate patterns were formed by successively patterning a doped polysilicon layer, a tungsten silicide layer and a high temperature oxide layer, which have been sequentially stacked. Also, a spacer composed of silicon nitride was formed on the sidewalls of the gate patterns. As a result, the isolation layer, the gate patterns, and the spacer expose a portion of the semiconductor substrate such as a source/drain region. [0029]
  • After loading the substrate into the chamber, the pressure in the chamber was reduced to 2×10[0030] −8 Torr. The substrate was then heated to a temperature of 700° C. Then, disilane (Si2H6) gas as a silicon source gas was introduced into the chamber at a flow rate of 10 sccm (standard cubic centimeter per minute) for 10 seconds. Next, chlorine gas as an etching gas was introduced in the chamber at a flow rate of 1 sccm for 12 seconds. Subsequently, hydrogen gas as a reducing gas was introduced in the chamber at a flow rate of 25 sccm for 12 seconds. However, this reducing gas was not supplied during the growth of the semiconductor layer using the conventional technology. In the case of the present invention, the source gas injection process, the etching gas injection process and the reducing gas injection process were repeatedly and sequentially performed for 30 cycles. Also, in case of the conventional technology, the source gas injection process and the etching gas injection process were repeatedly and alternately performed for 30 cycles.
  • As a result of the above experiment, the growth rate of the silicon layer according to the present invention was faster than that of the conventional technology. More particularly, in the case of the present invention, the thickness of the silicon layer grown on the source/drain region in a cell array region was 2060 angstrom, and the thickness of the silicon layer grown on the source/drain region in a peripheral circuit region having a relatively low pattern density was 2600 angstrom. On the contrary, in case of the conventional technology, the thickness of the silicon layer grown on the source/drain region in the cell array region was 1650 angstrom, and the thickness of the silicon layer grown on the source/drain region in a peripheral circuit region was 2000 angstrom. [0031]
  • Also, the root mean square (RMS) value to the surface roughness of the silicon layer according to the present invention was 10 angstrom, and the root mean square (RMS) value to the surface roughness of the conventional silicon layer was 21.7 angstrom. In addition, the groove density (per length) of the silicon layer according to the present invention was 1.4/um to 1.8/um, and the groove density (per length) of the conventional silicon layer was 2.4/um to 3.0/um. [0032]
  • As described above, according to the present invention, it is possible to remarkably improve the growth rate, the surface roughness and the groove density of the epitaxial layer by sequentially introducing the source gas, the etching gas and the reducing gas in the chamber. Also, it is possible to obtain the excellent growth selectivity of the epitaxial process. [0033]
  • While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made without departing from the spirit and scope of the invention. [0034]

Claims (18)

What is claimed is:
1. A method of selective epitaxial growth comprises:
forming an insulating layer pattern on a semiconductor substrate, the insulating layer pattern exposing a predetermined region of the semiconductor substrate;
loading the semiconductor substrate having the insulating layer pattern into a reaction chamber;
introducing a source gas into the reaction chamber for a first duration to form a semiconductor layer on the exposed semiconductor substrate and the insulating layer pattern;
introducing an etching gas into the reaction chamber for a second duration to selectively remove the semiconductor layer on the insulating layer pattern; and
introducing a reducing gas into the reaction chamber for a third duration to remove atoms of the etching gas adsorbed on the surface of the semiconductor layer,
wherein introducing the source gas, the etching gas and the reducing gas is repeatedly performed for at least 2 cycles.
2. The method of claim 1 further comprises reducing a pressure in the reaction chamber to 10−8 Torr or lower, prior to introducing the source gas.
3. The method of claim 1 further comprises heating the semiconductor substrate to a temperature of 450° C. to 800° C., prior to introducing the source gas.
4. The method of claim 1, wherein the semiconductor layer is a silicon layer.
5. The method of claim 4, wherein the source gas is a silicon source gas.
6. The method of claim 5, wherein the silicon source gas is a silane (SiH4) gas, a disilane (Si2H6) gas or a dichlorosilane (SiH2Cl2) gas.
7. The method of claim 1, wherein the semiconductor layer is a germanium layer.
8. The method of claim 7, wherein the source gas is a germanium source gas.
9. The method of claim 8, wherein the germanium source gas is a GeH4 gas.
10. The method of claim 1, wherein the semiconductor layer is a Ge—Si layer.
11. The method of claim 10, wherein the source gas comprises a silicon source gas and a germanium source gas.
12. The method of claim 1, wherein the first duration is in the range of 8 to 12 seconds.
13. The method of claim 1, wherein the etching gas is a chlorine (Cl) gas.
14. The method of claim 1, wherein the second duration is in the range of 6 to 15 seconds.
15. The method of claim 1, wherein the reducing gas is a hydrogen gas.
16. The method of claim 1, wherein the third duration is in the range of 6 to 15 seconds.
17. The method of claim 1 further comprises introducing a dopant gas into the chamber during introducing any one of the source gas, the etching gas and the reducing gas.
18. The method of claim 17, wherein the dopant gas is a phosphine (PH3) gas, a diborane (B2H6) gas or an arsine (AsH3) gas.
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Cited By (199)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6713371B1 (en) * 2003-03-17 2004-03-30 Matrix Semiconductor, Inc. Large grain size polysilicon films formed by nuclei-induced solid phase crystallization
US6723622B2 (en) * 2002-02-21 2004-04-20 Intel Corporation Method of forming a germanium film on a semiconductor substrate that includes the formation of a graded silicon-germanium buffer layer prior to the formation of a germanium layer
US20050153551A1 (en) * 2004-01-09 2005-07-14 Blomiley Eric R. Methods for deposition of semiconductor material
US20060115933A1 (en) * 2004-12-01 2006-06-01 Applied Materials, Inc. Use of CL2 and/or HCL during silicon epitaxial film formation
US20070048956A1 (en) * 2005-08-30 2007-03-01 Tokyo Electron Limited Interrupted deposition process for selective deposition of Si-containing films
EP1829086A2 (en) * 2004-12-01 2007-09-05 Applied Materials, Inc. Selective epitaxy process with alternating gas supply
US20070259112A1 (en) * 2006-04-07 2007-11-08 Applied Materials, Inc. Gas manifolds for use during epitaxial film formation
US20070287272A1 (en) * 2006-06-07 2007-12-13 Asm America, Inc. Selective epitaxial formation of semiconductor films
US20070286956A1 (en) * 2006-04-07 2007-12-13 Applied Materials, Inc. Cluster tool for epitaxial film formation
US20080026549A1 (en) * 2006-07-31 2008-01-31 Applied Materials, Inc. Methods of controlling morphology during epitaxial layer formation
US20080022924A1 (en) * 2006-07-31 2008-01-31 Applied Materials, Inc. Methods of forming carbon-containing silicon epitaxial layers
US20080044932A1 (en) * 2006-03-24 2008-02-21 Samoilov Arkadii V Carbon precursors for use during silicon epitaxial film formation
US20110117732A1 (en) * 2009-11-17 2011-05-19 Asm America, Inc. Cyclical epitaxial deposition and etch
US20130149846A1 (en) * 2010-09-01 2013-06-13 Hitachi Kokusai Electric Inc. Method of manufacturing semiconductor device and substrate processing apparatus
US8809170B2 (en) 2011-05-19 2014-08-19 Asm America Inc. High throughput cyclical epitaxial deposition and etch process
WO2017011097A1 (en) * 2015-07-15 2017-01-19 Applied Materials, Inc. Method of selective epitaxy
US9620356B1 (en) * 2015-10-29 2017-04-11 Applied Materials, Inc. Process of selective epitaxial growth for void free gap fill
CN107275183A (en) * 2016-04-07 2017-10-20 株式会社日立国际电气 The manufacture method and lining processor of semiconductor devices
US11164955B2 (en) 2017-07-18 2021-11-02 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US11171025B2 (en) 2019-01-22 2021-11-09 Asm Ip Holding B.V. Substrate processing device
US11168395B2 (en) 2018-06-29 2021-11-09 Asm Ip Holding B.V. Temperature-controlled flange and reactor system including same
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11227789B2 (en) 2019-02-20 2022-01-18 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11233133B2 (en) 2015-10-21 2022-01-25 Asm Ip Holding B.V. NbMC layers
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11242598B2 (en) 2015-06-26 2022-02-08 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US11251040B2 (en) 2019-02-20 2022-02-15 Asm Ip Holding B.V. Cyclical deposition method including treatment step and apparatus for same
US11251035B2 (en) 2016-12-22 2022-02-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11251068B2 (en) 2018-10-19 2022-02-15 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11274369B2 (en) 2018-09-11 2022-03-15 Asm Ip Holding B.V. Thin film deposition method
US11282698B2 (en) 2019-07-19 2022-03-22 Asm Ip Holding B.V. Method of forming topology-controlled amorphous carbon polymer film
US11289326B2 (en) 2019-05-07 2022-03-29 Asm Ip Holding B.V. Method for reforming amorphous carbon polymer film
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US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
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US11767589B2 (en) 2020-05-29 2023-09-26 Asm Ip Holding B.V. Substrate processing device
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US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
US11891696B2 (en) 2020-11-30 2024-02-06 Asm Ip Holding B.V. Injector configured for arrangement within a reaction chamber of a substrate processing apparatus
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US11923181B2 (en) 2019-11-29 2024-03-05 Asm Ip Holding B.V. Substrate processing apparatus for minimizing the effect of a filling gas during substrate processing
US11923190B2 (en) 2018-07-03 2024-03-05 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11929251B2 (en) 2019-12-02 2024-03-12 Asm Ip Holding B.V. Substrate processing apparatus having electrostatic chuck and substrate processing method
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US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
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US11961741B2 (en) 2020-03-12 2024-04-16 Asm Ip Holding B.V. Method for fabricating layer structure having target topological profile
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US11967488B2 (en) 2022-05-16 2024-04-23 Asm Ip Holding B.V. Method for treatment of deposition reactor

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4695824B2 (en) * 2003-03-07 2011-06-08 富士電機ホールディングス株式会社 Manufacturing method of semiconductor wafer
KR20050119662A (en) * 2003-03-28 2005-12-21 코닌클리즈케 필립스 일렉트로닉스 엔.브이. Method of epitaxial deposition of an n-doped silicon layer
US7361563B2 (en) 2004-06-17 2008-04-22 Samsung Electronics Co., Ltd. Methods of fabricating a semiconductor device using a selective epitaxial growth technique
US7855126B2 (en) 2004-06-17 2010-12-21 Samsung Electronics Co., Ltd. Methods of fabricating a semiconductor device using a cyclic selective epitaxial growth technique and semiconductor devices formed using the same
KR100593736B1 (en) 2004-06-17 2006-06-28 삼성전자주식회사 Methods of selectively forming an epitaxial semiconductor layer on a single crystal semiconductor and semiconductor devices manufactured using the same
JP4490760B2 (en) * 2004-08-17 2010-06-30 株式会社日立国際電気 Semiconductor device manufacturing method and substrate processing apparatus
US7560352B2 (en) * 2004-12-01 2009-07-14 Applied Materials, Inc. Selective deposition
KR100642646B1 (en) * 2005-07-08 2006-11-10 삼성전자주식회사 Methods of selectively forming an epitaxial semiconductor layer using a ultra high vacuum chemical vapor deposition technique and batch-type ultra high vacuum chemical vapor deposition apparatus used therein
KR100630767B1 (en) 2005-09-08 2006-10-04 삼성전자주식회사 Method of fabricating mos transistor having epitaxial region
KR100707882B1 (en) * 2005-12-14 2007-04-13 삼성전자주식회사 Method of selective growing a epitaxial
US7678631B2 (en) * 2006-06-06 2010-03-16 Intel Corporation Formation of strain-inducing films
US9064960B2 (en) * 2007-01-31 2015-06-23 Applied Materials, Inc. Selective epitaxy process control
US7655543B2 (en) * 2007-12-21 2010-02-02 Asm America, Inc. Separate injection of reactive species in selective formation of films
KR101714003B1 (en) 2010-03-19 2017-03-09 삼성전자 주식회사 Method of forming semiconductor device having faceted semiconductor pattern and related device
US20150087140A1 (en) * 2012-04-23 2015-03-26 Tokyo Electron Limited Film forming method, film forming device, and film forming system
WO2016164152A1 (en) 2015-04-10 2016-10-13 Applied Materials, Inc. Method to enhance growth rate for selective epitaxial growth
JP7010179B2 (en) * 2018-09-03 2022-01-26 株式会社Sumco Single crystal manufacturing method and equipment and silicon single crystal ingot
KR102098572B1 (en) 2018-12-26 2020-04-08 한국세라믹기술원 Substrate Material Searching Apparatus and Method for Epitaxy Growth and Record Media Recorded Program for Realizing the Same
JP7203670B2 (en) * 2019-04-01 2023-01-13 東京エレクトロン株式会社 Film forming method and film forming apparatus
TW202248476A (en) 2021-05-17 2022-12-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 Method and system for depositing boron containing silicon germanium layers and field effect transistor including boron containing silicon germanium layer

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5683046A (en) * 1979-12-11 1981-07-07 Seiko Instr & Electronics Ltd Manufacture of integrated circuit
US4578142A (en) * 1984-05-10 1986-03-25 Rca Corporation Method for growing monocrystalline silicon through mask layer
US5037775A (en) * 1988-11-30 1991-08-06 Mcnc Method for selectively depositing single elemental semiconductor material on substrates
EP0416774B1 (en) * 1989-08-28 2000-11-15 Hitachi, Ltd. A method of treating a sample of aluminium-containing material
WO1991003834A1 (en) * 1989-09-05 1991-03-21 Mcnc Method for selectively depositing material on substrates
JPH0715888B2 (en) 1990-10-01 1995-02-22 日本電気株式会社 Method and apparatus for selective growth of silicon epitaxial film
JP3412173B2 (en) * 1991-10-21 2003-06-03 セイコーエプソン株式会社 Method for manufacturing semiconductor device
US5221424A (en) * 1991-11-21 1993-06-22 Applied Materials, Inc. Method for removal of photoresist over metal which also removes or inactivates corosion-forming materials remaining from previous metal etch
US5425843A (en) * 1993-10-15 1995-06-20 Hewlett-Packard Corporation Process for semiconductor device etch damage reduction using hydrogen-containing plasma
US6204136B1 (en) * 1999-08-31 2001-03-20 Advanced Micro Devices, Inc. Post-spacer etch surface treatment for improved silicide formation

Cited By (252)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6723622B2 (en) * 2002-02-21 2004-04-20 Intel Corporation Method of forming a germanium film on a semiconductor substrate that includes the formation of a graded silicon-germanium buffer layer prior to the formation of a germanium layer
US6713371B1 (en) * 2003-03-17 2004-03-30 Matrix Semiconductor, Inc. Large grain size polysilicon films formed by nuclei-induced solid phase crystallization
KR100743336B1 (en) * 2004-01-09 2007-07-26 마이크론 테크놀로지, 인크 Methods for deposition of semiconductor material
US20050153551A1 (en) * 2004-01-09 2005-07-14 Blomiley Eric R. Methods for deposition of semiconductor material
WO2005071719A1 (en) * 2004-01-09 2005-08-04 Micron Technology, Inc. Methods for deposition of semiconductor material
US6987055B2 (en) 2004-01-09 2006-01-17 Micron Technology, Inc. Methods for deposition of semiconductor material
CN100454489C (en) * 2004-01-09 2009-01-21 美光科技公司 Methods for deposition of semiconductor material
US7253085B2 (en) 2004-01-09 2007-08-07 Micron Technology, Inc. Deposition methods
EP1829086A4 (en) * 2004-12-01 2009-07-01 Applied Materials Inc Selective epitaxy process with alternating gas supply
WO2006060543A2 (en) * 2004-12-01 2006-06-08 Applied Materials, Inc. Use of cl2 and/or hcl during silicon epitaxial film formation
US20060260538A1 (en) * 2004-12-01 2006-11-23 Applied Materials, Inc. Use of Cl2 and/or HCl during silicon epitaxial film formation
WO2006060543A3 (en) * 2004-12-01 2006-08-31 Applied Materials Inc Use of cl2 and/or hcl during silicon epitaxial film formation
EP1829086A2 (en) * 2004-12-01 2007-09-05 Applied Materials, Inc. Selective epitaxy process with alternating gas supply
US7732305B2 (en) 2004-12-01 2010-06-08 Applied Materials, Inc. Use of Cl2 and/or HCl during silicon epitaxial film formation
US20060115933A1 (en) * 2004-12-01 2006-06-01 Applied Materials, Inc. Use of CL2 and/or HCL during silicon epitaxial film formation
US20100221902A1 (en) * 2004-12-01 2010-09-02 Applied Materials, Inc. Use of cl2 and/or hcl during silicon epitaxial film formation
US8586456B2 (en) 2004-12-01 2013-11-19 Applied Materials, Inc. Use of CL2 and/or HCL during silicon epitaxial film formation
US7682940B2 (en) 2004-12-01 2010-03-23 Applied Materials, Inc. Use of Cl2 and/or HCl during silicon epitaxial film formation
US20110230036A1 (en) * 2004-12-01 2011-09-22 Applied Materials, Inc. Use of cl2 and/or hcl during silicon epitaxial film formation
US7960256B2 (en) 2004-12-01 2011-06-14 Applied Materials, Inc. Use of CL2 and/or HCL during silicon epitaxial film formation
US20070048956A1 (en) * 2005-08-30 2007-03-01 Tokyo Electron Limited Interrupted deposition process for selective deposition of Si-containing films
US20080044932A1 (en) * 2006-03-24 2008-02-21 Samoilov Arkadii V Carbon precursors for use during silicon epitaxial film formation
US7598178B2 (en) 2006-03-24 2009-10-06 Applied Materials, Inc. Carbon precursors for use during silicon epitaxial film formation
US20070286956A1 (en) * 2006-04-07 2007-12-13 Applied Materials, Inc. Cluster tool for epitaxial film formation
US20070259112A1 (en) * 2006-04-07 2007-11-08 Applied Materials, Inc. Gas manifolds for use during epitaxial film formation
US7674337B2 (en) 2006-04-07 2010-03-09 Applied Materials, Inc. Gas manifolds for use during epitaxial film formation
US8278176B2 (en) 2006-06-07 2012-10-02 Asm America, Inc. Selective epitaxial formation of semiconductor films
WO2007145758A2 (en) * 2006-06-07 2007-12-21 Asm America, Inc. Selective epitaxial formation of semiconductor films
US20070287272A1 (en) * 2006-06-07 2007-12-13 Asm America, Inc. Selective epitaxial formation of semiconductor films
US9312131B2 (en) 2006-06-07 2016-04-12 Asm America, Inc. Selective epitaxial formation of semiconductive films
WO2007145758A3 (en) * 2006-06-07 2008-02-07 Asm Inc Selective epitaxial formation of semiconductor films
US20080022924A1 (en) * 2006-07-31 2008-01-31 Applied Materials, Inc. Methods of forming carbon-containing silicon epitaxial layers
US8029620B2 (en) 2006-07-31 2011-10-04 Applied Materials, Inc. Methods of forming carbon-containing silicon epitaxial layers
US20080026549A1 (en) * 2006-07-31 2008-01-31 Applied Materials, Inc. Methods of controlling morphology during epitaxial layer formation
US7588980B2 (en) 2006-07-31 2009-09-15 Applied Materials, Inc. Methods of controlling morphology during epitaxial layer formation
US8367528B2 (en) 2009-11-17 2013-02-05 Asm America, Inc. Cyclical epitaxial deposition and etch
US20110117732A1 (en) * 2009-11-17 2011-05-19 Asm America, Inc. Cyclical epitaxial deposition and etch
US20130149846A1 (en) * 2010-09-01 2013-06-13 Hitachi Kokusai Electric Inc. Method of manufacturing semiconductor device and substrate processing apparatus
US20150126021A1 (en) * 2010-09-01 2015-05-07 Hitachi Kokusai Electric Inc. Method of manufacturing semiconductor device and substrate processing apparatus
US9666430B2 (en) * 2010-09-01 2017-05-30 Hitachi Kokusai Electric Inc. Method of manufacturing semiconductor device and substrate processing apparatus
US8809170B2 (en) 2011-05-19 2014-08-19 Asm America Inc. High throughput cyclical epitaxial deposition and etch process
US11725277B2 (en) 2011-07-20 2023-08-15 Asm Ip Holding B.V. Pressure transmitter for a semiconductor processing environment
US11501956B2 (en) 2012-10-12 2022-11-15 Asm Ip Holding B.V. Semiconductor reaction chamber showerhead
US11795545B2 (en) 2014-10-07 2023-10-24 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US11742189B2 (en) 2015-03-12 2023-08-29 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US11242598B2 (en) 2015-06-26 2022-02-08 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
WO2017011097A1 (en) * 2015-07-15 2017-01-19 Applied Materials, Inc. Method of selective epitaxy
US11233133B2 (en) 2015-10-21 2022-01-25 Asm Ip Holding B.V. NbMC layers
US9620356B1 (en) * 2015-10-29 2017-04-11 Applied Materials, Inc. Process of selective epitaxial growth for void free gap fill
US11956977B2 (en) 2015-12-29 2024-04-09 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US11676812B2 (en) 2016-02-19 2023-06-13 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on top/bottom portions
US20190189440A1 (en) * 2016-04-07 2019-06-20 Kokusai Electric Corporation Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
US11164744B2 (en) * 2016-04-07 2021-11-02 Kokusai Electric Corporation Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
CN107275183A (en) * 2016-04-07 2017-10-20 株式会社日立国际电气 The manufacture method and lining processor of semiconductor devices
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US11749562B2 (en) 2016-07-08 2023-09-05 Asm Ip Holding B.V. Selective deposition method to form air gaps
US11649546B2 (en) 2016-07-08 2023-05-16 Asm Ip Holding B.V. Organic reactants for atomic layer deposition
US11694892B2 (en) 2016-07-28 2023-07-04 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11610775B2 (en) 2016-07-28 2023-03-21 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US11810788B2 (en) 2016-11-01 2023-11-07 Asm Ip Holding B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
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US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
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US11410851B2 (en) 2017-02-15 2022-08-09 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
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US11970766B2 (en) 2023-01-17 2024-04-30 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus

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