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Publication numberUS20010004790 A1
Publication typeApplication
Application numberUS 09/778,641
Publication date28 Jun 2001
Filing date7 Feb 2001
Priority date27 Jan 1993
Also published asDE69430405D1, DE69430405T2, EP0609081A2, EP0609081A3, EP0609081B1, US5348894, US6215650, US6275370
Publication number09778641, 778641, US 2001/0004790 A1, US 2001/004790 A1, US 20010004790 A1, US 20010004790A1, US 2001004790 A1, US 2001004790A1, US-A1-20010004790, US-A1-2001004790, US2001/0004790A1, US2001/004790A1, US20010004790 A1, US20010004790A1, US2001004790 A1, US2001004790A1
InventorsBruce Gnade, Scott Summerfelt
Original AssigneeGnade Bruce E., Summerfelt Scott R.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Electrical connections to dielectric materials
US 20010004790 A1
Abstract
A preferred embodiment of this invention comprises an oxidizable layer (e.g. tantalum 48), an oxygen gettering layer (e.g. platinum/tantalum mixture 34) overlaying the oxidizable layer, a noble metal layer (e.g. platinum 36) overlaying the oxygen gettering layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlaying the noble metal layer. The novel structures presented provide electrical connection to high-dielectric-constant materials without the disadvantages of current structures. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the lower electrode or at the lower electrode/substrate interface. The oxygen gettering layer acts as a gettering site for oxygen, where the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides/suboxides (e.g. tantalum pentoxide 40) that are formed are resistive, they are dispersed within the noble metal matrix, leaving a conductive path from the top of the layer to the bottom. This invention provides a stable and electrically conductive electrode for high-dielectric-constant materials while using standard integrated circuit materials to facilitate and economize the manufacturing process.
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Claims(19)
What is claimed is:
1. A method of forming a microelectronic structure, said method comprising:
(a) forming an oxidizable layer;
(b) forming an oxygen gettering layer on said oxidizable layer;
(c) forming a noble metal layer on said oxygen gettering layer; and
(d) forming a layer of a high-dielectric-constant material on said noble metal layer, whereby said oxygen gettering layer getters diffusing oxygen, thus minimizing the formation of a oxidized resistive layer either in or on said oxidizable layer.
2. The method according to
claim 1
, wherein said oxygen gettering layer is part of a final structure and is at least partially oxidized.
3. The method according to
claim 1
, wherein said oxygen gettering layer is part of an intermediate structure and is not substantially oxidized.
4. The method according to
claim 1
, said method further comprising forming a electrically conductive layer on said high-dielectric-constant material layer.
5. The method according to
claim 4
, wherein said electrically conductive layer is selected from the group consisting of: titanium nitride, ruthenium dioxide, YBa2Cu3O7−x, platinum, palladium, rhodium, gold, iridium, silver, and combinations thereof.
6. The method according to
claim 1
, wherein said oxygen gettering layer comprises a mixture of at least one noble metal and at least one reactive component, wherein the ratio of said noble metal to said reactive component is between 99:1 and 1:3.
7. The method according to
claim 6
, wherein said noble metal is selected from the group consisting of: platinum, palladium, rhodium, gold, iridium, silver, and combinations thereof.
8. The method according to
claim 6
, wherein said reactive component is selected from the group consisting of: tantalum, tungsten, titanium, molybdenum, titanium nitride, zirconium nitride, titanium silicide, tantalum silicide, tungsten silicide, molybdenum silicide, tantalum carbide, titanium boride, boron carbide, silicon, germanium, carbon, GaAs, and combinations thereof.
9. The method according to
claim 1
, wherein said oxygen gettering layer comprises a graded mixture of at least one noble metal and at least one reactive component, wherein said reactive component constitutes greater than 99% of said oxygen gettering layer near said oxidizable layer, and said reactive component transitions to constitute less than 1% of said oxygen gettering layer near said noble metal layer.
10. The method according to
claim 1
, wherein said oxidizable layer is selected from the group consisting of: tantalum, tungsten, titanium, molybdenum, titanium nitride, zirconium nitride, titanium silicide, tantalum silicide, tungsten silicide, molybdenum silicide, tantalum carbide, titanium boride, boron carbide, silicon, germanium, carbon, GaAs, and combinations thereof.
11. The method according to
claim 1
, wherein said noble metal layer is selected from the group consisting of: platinum, palladium, rhodium, gold, iridium, silver, and combinations thereof.
12. The method according to
claim 1
, wherein said high-dielectric-constant material is selected from the group consisting of: barium strontium titanate, barium titanate, strontium titanate, lead zirconium titanate, lead zinc niobate, tantalum pentoxide, and combinations thereof.
13. A method of forming a microelectronic capacitor comprising:
forming a first tantalum layer;
forming a layer of a platinum/tantalum mixture, wherein the ratio of said platinum to said tantalum is between 99:1 and 1:3, overlaying said first tantalum layer;
forming a layer of platinum overlaying said platinum/tantalum mixture layer;
forming a layer of high-dielectric-constant material overlaying said platinum layer; and
forming an electrically conductive layer overlaying said high-dielectric-constant material layer.
14. A microelectronic structure comprising:
an oxidizable layer;
an oxygen gettering layer overlaying said oxidizable layer;
a noble metal layer overlaying said oxygen gettering layer; and
a layer of a high-dielectric-constant material overlaying said noble metal layer, whereby said oxygen gettering layer getters diffusing oxygen, thus minimizing the formation of a oxidized resistive layer either in or on said oxidizable layer.
15. The structure of
claim 14
, wherein said oxygen gettering layer is part of a final structure and is at least partially oxidized.
16. The structure of
claim 14
, wherein said oxygen gettering layer is part of an intermediate structure and is not substantially oxidized.
17. The structure of
claim 14
, wherein said structure further comprises an electrically conductive layer overlaying said high-dielectric-constant material layer.
18. The structure of
claim 14
, wherein said oxygen gettering layer comprises a mixture of at least one noble metal and at least one reactive component wherein the ratio of said noble metal to said reactive component is between 99:1 and 1:3.
19. The structure of
claim 14
, wherein said oxygen gettering layer comprises a graded mixture of at least one noble metal and at least one reactive component, wherein said reactive component constitutes greater than 99% of said oxygen gettering layer near said oxidizable layer, and said reactive component transitions to constitute less than 1% of said oxygen gettering layer near said noble metal layer.
Description
    FIELD OF THE INVENTION
  • [0001]
    This invention generally relates to improving electrical connections to materials with high-dielectric-constants, such as in the construction of capacitors.
  • BACKGROUND OF THE INVENTION
  • [0002]
    Without limiting the scope of the invention, its background is described in connection with current methods of forming electrical connections to high-dielectric-constant materials, as an example.
  • [0003]
    The increasing density of integrated circuits (e.g. DRAMs) is increasing the need for materials with high-dielectric-constants to be used in electrical devices such as capacitors. The current method generally utilized to achieve higher capacitance per unit area is to increase the surface area/unit area by increasing the topography, such as in trench and stack capacitors using SiO2 or SiO2/Si3N4 as the dielectric. This approach becomes very difficult in terms of manufacturability for devices such as the 256 Mbit and 1 Gbit DRAMs.
  • [0004]
    An alternative approach is to use a high permittivity dielectric material. To be useful in electronic devices, however, reliable electrical connections should generally be constructed which do not diminish the beneficial properties of these high-dielectric-constant materials.
  • [0005]
    Heretofore, in this field, single and multiple metal layers are generally used to form electrical contacts to high-dielectric-constant materials. For example, to provide an electrical connection to a high-dielectric-constant material which makes up a capacitor on the surface of a semiconductor substrate, the following techniques are among those now employed: (a) dielectric/platinum/substrate, (b) dielectric/platinum/tantalum/substrate, and (c) dielectric/platinum/titanium/substrate. The layering sequence in these examples is from the top down to the substrate (e.g. silicon). A similar metallization scheme may be used for the top of the dielectric film to complete the capacitor structure.
  • SUMMARY OF THE INVENTION
  • [0006]
    As used herein the term high-dielectric-constant (hereafter abbreviated HDC) means a dielectric constant greater than about 20. HDC materials are useful for the fabrication of many electrical devices, such as capacitors. However, HDC materials are generally not chemically stable when deposited directly on a semiconductor substrate, so one or more additional layers are required to provide the electrical connection between the HDC material-and the substrate. The additional layer or layers should generally be chemically stable when in contact with the substrate and also when in contact with the high-dielectric-constant material.
  • [0007]
    Current methods provide for using platinum as the noble layer to contact the high-dielectric-constant material, along with tantalum or titanium as the sticking layer to contact the substrate. However, HDC materials (e.g. ferroelectrics) are generally deposited at elevated temperatures (greater than about 500 C.) in an O2 atmosphere. It has been discovered that, in this environment, oxygen diffuses through the platinum and forms a resistive layer of Ta2O5 or TiO2 when it comes in contact with the Ta or Ti, causing high contact resistance. Further, the substrate (e.g. silicon) itself can become oxidized during the deposition of the HDC material. As used herein, the term oxidizable layer refers to the underlying sticking layer, or substrate, which becomes more insulating when oxidized.
  • [0008]
    The disclosed structures generally provide electrical connection to HDC materials without the disadvantages of the current structures. One embodiment of this invention comprises an oxidizable layer, an oxygen gettering layer overlaying the oxidizable layer, a noble metal layer overlaying the oxygen gettering layer, and a high-dielectric-constant material layer overlaying the noble metal layer. A method of forming an embodiment of this invention comprises the steps of forming a oxygen gettering layer on an oxidizable layer, forming a noble metal layer on the oxygen gettering layer, and forming a high-dielectric-constant material layer on the noble metal layer. Examples of processes for depositing the lower electrode materials are sputtering, evaporation, and chemical vapor deposition. Examples of processes for depositing the high-dielectric-constant material are ion-beam sputtering, chemical vapor deposition, and pulsed laser deposition.
  • [0009]
    These are apparently the first structures wherein an electrical connection to high-dielectric-constant materials comprises an oxygen gettering layer. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the oxidizable layer or at the oxidizable layer/oxygen gettering layer interface. The oxygen gettering layer acts as a gettering site for oxygen, wherein the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides or suboxides that are formed are resistive, they are dispersed within the noble metal matrix, leaving a conductive path from the top of the layer to the bottom. The oxygen gettering layer should generally contain enough reactive metal to successfully combine with most or all of the diffused oxygen, but not so much that there is not a conductive path remaining via the noble metal component of the layer. Generally, the required thickness and composition of the oxygen gettering layer depend on the specific deposition parameters (temperature, O2 pressure, etc.) of the high-dielectric-constant material. If enough oxygen reaches the oxidizable layer (e.g. the sticking layer or the substrate), a resistive layer will be formed, significantly increasing the contact resistance. The noble metal layer between the high-dielectric-constant material layer and the oxygen gettering layer is desirable, as it both minimizes undesirable reduction of the high-dielectric-constant material layer and lowers the amount of oxygen which enters the oxygen gettering layer. This invention generally provides a stable electrode for HDC materials while using standard integrated circuit materials to facilitate and economize the manufacturing process.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0010]
    The novel features believed characteristic of the invention are set forth in the appended claims. The invention itself, however, as well as other features and advantages thereof, will be best understood by reference to the detailed description which follows, read in conjunction with the accompanying drawings, wherein:
  • [0011]
    FIGS. 1-5 are cross-sectional views of a method for constructing a metal/high-dielectric-constant material/metal capacitor on a semiconductor substrate;
  • [0012]
    FIGS. 6-9 are cross-sectional views of metal/high-dielectric-constant material/metal capacitors formed on the surface of a semiconductor substrate;
  • [0013]
    [0013]FIG. 10 is a cross-sectional view of an intermediate structure, a lower electrode formed on the surface of a semiconductor substrate, before the deposition of a high-dielectric-constant material layer;
  • [0014]
    [0014]FIG. 11 is a cross-sectional view of an oxygen gettering layer providing electrical connection between a high-dielectric-constant material layer and an oxidizable layer;
  • [0015]
    [0015]FIG. 12 is a cross-sectional view of a metal/high-dielectric-constant material/metal capacitor formed on the surface of a semiconductor substrate; and
  • [0016]
    [0016]FIG. 13 is a cross-sectional view of a lower electrode providing electrical connection between a high-dielectric-constant material and a semiconductor substrate.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • [0017]
    With reference to FIGS. 1-5, there is shown a method of forming a preferred embodiment of this invention, a capacitor comprising a high-dielectric-constant material and an oxygen gettering layer. FIG. 1 illustrates a tantalum sticking layer 32 deposited on the surface of a semiconductor body 30. FIG. 2 illustrates a platinum/tantalum mixture layer 34 deposited on the tantalum sticking layer 32. The ratio of platinum to tantalum in the platinum/tantalum mixture layer 34 is, in this example, between 3:1 and 1:1.5. A method of forming this oxygen gettering layer 34 involves depositing the platinum and tantalum in the same process chamber using two sputter guns, so that the desired percentages of each metal are deposited, forming a mixture of the two metals. Other processes such as evaporation or chemical vapor deposition could also be used to deposit the two metals. FIG. 3 illustrates a platinum noble layer 36 deposited on the oxygen gettering layer 34. The three layers 32, 34, and 36 constitute the lower electrode of the capacitor. FIG. 4 illustrates a barium strontium titanate layer 38 deposited on the platinum layer 36, and also the tantalum oxide particles 40 that are formed in the oxygen gettering layer 34 as a consequence of the barium strontium titanate layer 38 being deposited in a high temperature oxygen atmosphere. The lower electrode, comprising layers 32, 34, and 36, remains electrically conductive after the barium strontium titanate deposition since the oxide particles 40 are spread throughout the oxygen gettering layer 34. The barium strontium titanate layer 38 constitutes the dielectric of the capacitor. FIG. 5 illustrates a titanium nitride layer 42 deposited on the barium strontium titanate layer 38, forming the upper electrode of the capacitor. Although FIG. 5 illustrates a planar geometry for all of the elements of the capacitor, this invention applies equally well to the construction of capacitor structures of more complicated geometries, including capacitors built into depressions in the semiconductor surface.
  • [0018]
    In an alternate embodiment, with reference to FIG. 6, such a capacitor structure may be formed without the tantalum layer 32 of FIG. 5, and thus the oxygen gettering layer is preventing the oxidation of the top of the substrate. In another alternate embodiment, with reference to FIG. 7, such a capacitor structure may be formed without the platinum layer 36 of FIG. 5. In another alternate embodiment, with reference to FIG. 8, such a capacitor structure may be formed without either the tantalum layer 32 or the platinum layer 36 of FIG. 5.
  • [0019]
    In another alternate embodiment, with reference to FIG. 9, such a capacitor structure may be formed with a lower electrode comprising a graded layer 44 in which the amounts of each metal vary with respect to depth in the layer. The graded layer 44 is formed such that primarily tantalum is deposited near the semiconductor substrate, and then as the layer continues to be formed, the amount of platinum deposited is increased while the amount of tantalum deposited is decreased. Near the top of the layer, primarily platinum is deposited.
  • [0020]
    In another alternate embodiment, with reference to FIG. 10, such a capacitor may be formed with a lower electrode comprising a stratified region 46 between the tantalum layer 32 and the platinum layer 36. This stratified region 46 comprises relatively thin alternating layers of platinum and tantalum, which will intermix when heated, dispersing the tantalum into the platinum. The number and thickness of the layers in the stratified region 46 can be varied, depending on the amounts of tantalum and platinum required. FIG. 10 depicts the lower electrode before application of the HDC material.
  • [0021]
    In another alternate embodiment, with reference to FIG. 11, the oxygen gettering layer 34 may be formed on an oxidizable layer 48. A platinum noble layer 36 is formed on the oxygen gettering layer 34, and a barium strontium titanate layer 38 is formed on the platinum layer 36, which causes the oxide particles 40 to form.
  • [0022]
    In another alternate embodiment, with reference to FIG. 12, the tantalum sticking layer 32 may be formed on a titanium nitride barrier layer 52, which is itself formed on a titanium silicide contact layer 50. The titanium nitride layer 52 and titanium silicide layer 50 are formed by depositing a thin layer of titanium on the silicon substrate 30, and then annealing in an NH3 atmosphere. The titanium silicide layer 50 forms a low resistance contact to the underlying silicon substrate 30, while the titanium nitride layer 52 prevents the formation of insulating tantalum silicide between the silicon substrate 30 and the tantalum sticking layer 32.
  • [0023]
    In yet another alternate embodiment, with reference to FIG. 13, a tantalum plug 56 is formed through a silicon dioxide insulating layer 54, connecting the platinum/tantalum mixture layer 34 to the underlying silicon substrate 30.
  • [0024]
    The sole Table, below, provides an overview of some embodiments and the drawings.
    TABLE
    Drawing Generic Preferred or Other Alternate
    Element Term Specific Examples Examples
    30 Semiconductor Silicon Other single component
    Substrate semiconductors
    (e.g. germanium)
    Compound
    semiconductors (e.g.
    GaAs, Si/Ge, Si/C)
    May be the oxidizable
    layer
    (e.g. if no sticking layer
    is used)
    32 Sticking layer Tantalum Other reactive metals
    (when used, is (e.g. tungsten, titanium,
    generally the molybdenum)
    oxidizable Reactive metal
    layer) compounds (e.g.
    nitrides: titanium
    nitride, zirconium
    nitride; silicides:
    titanium silicide,
    tantalum silicide,
    tungsten silicide,
    molybdenum silicide;
    carbides: tantalum
    carbide; borides:
    titanium boride)
    Conductive carbides
    and borides
    (e.g. boron carbide)
    34 Oxygen Platinum/tantalum Noble metal/reactive
    gettering mixture wherein the metal mixtures wherein
    layer ratio of platinum to the ratio of noble metal
    tantalum is between to reactive metal is
    3:1 and 1:1.5 between 99:1 and 1:3
    (e.g. other
    platinum/tantalum
    mixtures,
    platinum/tungsten
    mixtures,
    platinum/titanium
    mixtures)
    Noble metal/reactive
    metal compound
    mixtures wherein the
    ratio of noble metal to
    reactive metal
    compound is between
    99:1 and 1:3
    (e.g. platinum/titanium
    nitride mixtures)
    Other combinations of
    above mentioned
    materials
    (e.g.
    platinum/tantalum/tung
    sten mixture)
    Other combinations of
    materials selected from
    Drawing Element 32
    above and Drawing
    Element 36 below
    (e.g.
    palladium/molybdenum
    mixtures)
    36 Noble layer Platinum Other noble metals
    (e.g. palladium,
    rhodium, gold, iridium,
    silver)
    38 High- Barium strontium Other transition metal
    dielectric- titanate titanates, tantalates,
    constant niobates, and zirconates
    material (e.g. barium titanate,
    strontium titanate, lead
    zirconate titanate, lead
    zinc niobate)
    Other high dielectric
    constant oxides
    (e.g. tantalum
    pentoxide)
    40 Oxide Tantalum pentoxide Other oxides/suboxides
    particles of reactive metals and
    reactive metal
    compounds
    (e.g. other tantalum
    oxides, tungsten oxides,
    titanium oxides)
    42 Upper Titanium nitride Other metal nitrides
    electrode Ruthenium dioxide
    YBa2Cu3O7-x
    Noble metals
    (e.g. platinum,
    palladium, rhodium,
    gold, iridium, silver)
    Other common
    semiconductor
    electrodes
    (e.g. silicides,
    aluminum)
    44 Graded layer Platinum/tantalum Other noble
    mixture wherein the metal/reactive metal
    mixture is 100% mixtures wherein the
    tantalum near the mixture is 100%
    substrate and reactive metal near the
    transitions to 100% substrate and
    platinum near the transitions to 100%
    HDC material noble metal near the
    HDC material
    (e.g. platinum/tungsten
    mixture,
    platinum/titanium
    mixture)
    Noble metal/reactive
    metal compound
    mixtures wherein the
    mixture is 100%
    reactive metal
    compound near the
    substrate and
    transitions to 100%
    noble metal near the
    HDG material
    (e.g. platinum/titanium
    nitride mixture)
    Other combinations of
    above mentioned
    materials
    (e.g.
    platinum/tantalum/tung
    sten mixture)
    Other combinations of
    materials selected from
    Drawing Element 32
    above and Drawing
    Element 36 above
    (e.g.
    palladium/molybdenum
    mixtures)
    46 Stratified Alternating layers of Alternating layers of
    region platinum and tantalum other noble and reactive
    wherein the thickness metals wherein the
    ratio of the platinum thickness ratio of the
    layers to the tantalum noble metal layers to
    layers is between the reactive metal
    3:1 and 1:1.5 layers is between 99:1
    and 1:3
    (e.g. platinum/tantalum,
    platinum/tungsten,
    platinum/titanium)
    Alternating layers of
    noble metal and
    reactive metal
    compound wherein the
    thickness ratio of the
    noble metal layers to
    the reactive metal
    compound layers is
    between 99:1 and 1:3
    (e.g. platinum/titanium
    nitride)
    Other combinations of
    above mentioned
    materials
    (e.g.
    platinum/tantalum/tung
    sten)
    Other combinations of
    materials selected from
    Drawing Element 32
    above and Drawing
    Element 36 above
    (e.g.
    palladium/molybdenum)
    48 Oxidizable Tantalum Other reactive metals
    layer (e.g. tungsten, titanium,
    molybdenum)
    Reactive metal
    compounds (e.g.
    nitrides: titanium
    nitride, zirconium
    nitride; silicides:
    titanium silicide,
    tantalum silicide,
    tungsten silicide,
    molybdenum silicide;
    carbides: tantalum
    carbide; borides:
    titanium boride)
    Conductive carbides
    and borides
    (e.g. boron carbide)
    Single component
    semiconductors
    (e.g. single crystalline
    and polycrystalline
    silicon, germanium)
    Compound
    semiconductors (e.g.
    GaAs, Si/Ge, Si/C)
    50 Contact layer Titanium silicide Other conductive
    silicides
    52 Barrier layer Titanium nitride Other conductive
    nitrides
    Other high-temperature
    conductive diffusion
    barriers
    54 Insulator Silicon dioxide Other insulators
    (e.g. silicon nitride)
    56 Conductive Tantalum Other reactive metals
    Plug (e.g. tungsten, titanium,
    molybdenum)
    Reactive metal
    compounds (e.g.
    nitrides: titanium
    nitride, zirconium
    nitride; silicides:
    titanium silicide,
    tantalum silicide,
    tungsten silicide,
    molybdenum silicide;
    carbides: tantalum
    carbide; borides:
    titanium boride)
    Conductive carbides
    and borides
    (e.g. boron carbide)
    Single component
    semiconductors
    (e.g. single crystalline
    and polycrystalline
    silicon, germanium)
    Compound
    semiconductors (e.g.
    GaAs, Si/Ge, Si/C)
  • [0025]
    A few preferred embodiments have been described in detail hereinabove. It is to be understood that the scope of the invention also comprehends embodiments different from those described, yet within the scope of the claims. With reference to the structures described, electrical connections to such structures can be ohmic, rectifying, capacitive, direct or indirect, via intervening circuits or otherwise. Implementation is contemplated in discrete components or fully integrated circuits in silicon, germanium, gallium arsenide, or other electronic materials families. In general the preferred or specific examples are preferred over the other alternate examples. Unless otherwise stated, all composition ratios or percentages are in relation to composition by weight. In some intermediate structures, and in the final product, the oxygen gettering layer will generally be at least partially oxidized.
  • [0026]
    While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US767867828 Jul 200616 Mar 2010Micron Technology, Inc.Method to chemically remove metal impurities from polycide gate sidewalls
US793563322 Mar 20073 May 2011Micron Technology, Inc.Poly etch without separate oxide decap
US20050032335 *30 Aug 200410 Feb 2005Micron Technology, Inc.Method to chemically remove metal impurities from polycide gate sidewalls
US20060261415 *27 Jul 200623 Nov 2006Micron Technology, Inc.Method to chemically remove metal impurities from polycide gate sidewalls
US20060261500 *28 Jul 200623 Nov 2006Micron Technology, Inc.Method to chemically remove metal impurities from polycide gate sidewalls
US20070163997 *22 Mar 200719 Jul 2007Micron Technology, Inc.Poly etch without separate oxide decap
CN103545355A *12 Jul 201229 Jan 2014中芯国际集成电路制造(上海)有限公司半导体器件及其制作方法
WO2002054457A3 *14 Nov 20013 Apr 2003Infineon Technologies CorpMulti-layer pt electrode for dram and fram with high k dielectric materials
Classifications
U.S. Classification29/25.42, 257/E21.295, 257/E21.011, 29/831, 257/E21.009, 257/E21.01, 257/E21.021
International ClassificationH01L27/04, H01L27/108, H01L21/8242, H01L27/10, H01L21/822, H01L21/3205, H01L21/02
Cooperative ClassificationY10T29/49128, Y10T29/435, Y10S505/818, H01L28/56, H01L28/55, H01L21/32051, H01L28/60, H01L28/75
European ClassificationH01L28/60, H01L28/75, H01L21/3205M
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