EP1523829A4 - Efficient packet processing pipeline device and method - Google Patents
Efficient packet processing pipeline device and methodInfo
- Publication number
- EP1523829A4 EP1523829A4 EP03726675A EP03726675A EP1523829A4 EP 1523829 A4 EP1523829 A4 EP 1523829A4 EP 03726675 A EP03726675 A EP 03726675A EP 03726675 A EP03726675 A EP 03726675A EP 1523829 A4 EP1523829 A4 EP 1523829A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- packet processing
- processing pipeline
- pipeline device
- efficient packet
- efficient
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3072—Packet splitting
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3063—Pipelined operation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB0209670.9A GB0209670D0 (en) | 2002-04-26 | 2002-04-26 | Efficient packet processing pipelining device and method |
GB0209670 | 2002-04-26 | ||
PCT/US2003/014259 WO2003091857A2 (en) | 2002-04-26 | 2003-04-25 | Efficient packet processing pipeline device and method |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1523829A2 EP1523829A2 (en) | 2005-04-20 |
EP1523829A4 true EP1523829A4 (en) | 2007-12-19 |
Family
ID=9935632
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP03726675A Withdrawn EP1523829A4 (en) | 2002-04-26 | 2003-04-25 | Efficient packet processing pipeline device and method |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1523829A4 (en) |
CN (1) | CN100450050C (en) |
AU (1) | AU2003228900A1 (en) |
GB (1) | GB0209670D0 (en) |
WO (1) | WO2003091857A2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012015388A1 (en) * | 2010-07-26 | 2012-02-02 | Hewlett-Packard Development Company, L. P. | Mitigation of detected patterns in a network device |
WO2018188738A1 (en) * | 2017-04-11 | 2018-10-18 | NEC Laboratories Europe GmbH | Packet handling method and apparatus for network service functions |
CN113364685B (en) * | 2021-05-17 | 2023-03-14 | 中国人民解放军国防科技大学 | Distributed MAC table item processing device and method |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4755986A (en) * | 1985-09-13 | 1988-07-05 | Nec Corporation | Packet switching system |
US4899333A (en) * | 1988-03-31 | 1990-02-06 | American Telephone And Telegraph Company At&T Bell Laboratories | Architecture of the control of a high performance packet switching distribution network |
US5341369A (en) * | 1992-02-11 | 1994-08-23 | Vitesse Semiconductor Corp. | Multichannel self-routing packet switching network architecture |
WO1999031580A1 (en) * | 1997-12-16 | 1999-06-24 | Intel Corporation | Processor having multiple program counters and trace buffers outside an execution pipeline |
WO2000068780A2 (en) * | 1999-05-11 | 2000-11-16 | Sun Microsystems, Inc. | Thread switch logic in a multiple-thread processor |
WO2001048606A2 (en) * | 1999-12-28 | 2001-07-05 | Intel Corporation | Allocation of data to threads in multi-threaded network processor |
US6286027B1 (en) * | 1998-11-30 | 2001-09-04 | Lucent Technologies Inc. | Two step thread creation with register renaming |
WO2002005499A1 (en) * | 2000-01-30 | 2002-01-17 | Celox Networks, Inc. | Device and method for packet formatting |
JP2002116908A (en) * | 2000-10-05 | 2002-04-19 | Arm Ltd | Mutual calling between native and nonnative instruction sets |
-
2002
- 2002-04-26 GB GBGB0209670.9A patent/GB0209670D0/en not_active Ceased
-
2003
- 2003-04-25 EP EP03726675A patent/EP1523829A4/en not_active Withdrawn
- 2003-04-25 WO PCT/US2003/014259 patent/WO2003091857A2/en not_active Application Discontinuation
- 2003-04-25 AU AU2003228900A patent/AU2003228900A1/en not_active Abandoned
- 2003-04-25 CN CNB038145227A patent/CN100450050C/en not_active Expired - Fee Related
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4755986A (en) * | 1985-09-13 | 1988-07-05 | Nec Corporation | Packet switching system |
US4899333A (en) * | 1988-03-31 | 1990-02-06 | American Telephone And Telegraph Company At&T Bell Laboratories | Architecture of the control of a high performance packet switching distribution network |
US5341369A (en) * | 1992-02-11 | 1994-08-23 | Vitesse Semiconductor Corp. | Multichannel self-routing packet switching network architecture |
WO1999031580A1 (en) * | 1997-12-16 | 1999-06-24 | Intel Corporation | Processor having multiple program counters and trace buffers outside an execution pipeline |
US6286027B1 (en) * | 1998-11-30 | 2001-09-04 | Lucent Technologies Inc. | Two step thread creation with register renaming |
WO2000068780A2 (en) * | 1999-05-11 | 2000-11-16 | Sun Microsystems, Inc. | Thread switch logic in a multiple-thread processor |
WO2001048606A2 (en) * | 1999-12-28 | 2001-07-05 | Intel Corporation | Allocation of data to threads in multi-threaded network processor |
WO2002005499A1 (en) * | 2000-01-30 | 2002-01-17 | Celox Networks, Inc. | Device and method for packet formatting |
JP2002116908A (en) * | 2000-10-05 | 2002-04-19 | Arm Ltd | Mutual calling between native and nonnative instruction sets |
US20020108103A1 (en) * | 2000-10-05 | 2002-08-08 | Nevill Edward Colles | Intercalling between native and non-native instruction sets |
Also Published As
Publication number | Publication date |
---|---|
EP1523829A2 (en) | 2005-04-20 |
WO2003091857A2 (en) | 2003-11-06 |
WO2003091857A3 (en) | 2003-12-11 |
GB0209670D0 (en) | 2002-06-05 |
CN100450050C (en) | 2009-01-07 |
CN1663188A (en) | 2005-08-31 |
AU2003228900A1 (en) | 2003-11-10 |
WO2003091857A9 (en) | 2007-12-13 |
AU2003228900A8 (en) | 2003-11-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1475825A4 (en) | Processing device and processing method | |
TWI315966B (en) | Plasma processing device and plasma processing method | |
AU2003242104A1 (en) | Processing device and processing method | |
AU2003244310A8 (en) | Inter-authentication method and device | |
GB2404748B (en) | Computing device and method | |
EP1484853A4 (en) | Reception device and reception method | |
AU2003260323A8 (en) | Data processing method and device | |
EP1432130A4 (en) | Decoding device and decoding method | |
IL172852A0 (en) | Substrate processing method and substrate processing device | |
EP1591875A4 (en) | Handwriting-input device and method | |
EP1536460A4 (en) | Substrate processing device and substrate processing method | |
EP1679739A4 (en) | Sheet-peeling device and method | |
EP1521210A4 (en) | Similarity calculation method and device | |
GB0318417D0 (en) | Method and device | |
GB0313032D0 (en) | Device and method | |
AU2003246171A1 (en) | Processing device and processing method | |
EP1641127A4 (en) | Packet processing device and method | |
AU2003289409A1 (en) | Processing method and device | |
GB0217248D0 (en) | Device and method | |
HK1064159A1 (en) | File-delivering method and file-delivering device | |
EP1388992A4 (en) | Rate matching device and rate matching method | |
EP1643356A4 (en) | Parallel processing device and parallel processing method | |
GB2397963B (en) | Noise reducing device and noise reducing method | |
AU2003242099A1 (en) | Processing device and processing method | |
AU2003228900A8 (en) | Efficient packet processing pipeline device and method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20041124 |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR |
|
AX | Request for extension of the european patent |
Extension state: AL LT LV MK |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H04L 12/56 20060101ALI20070907BHEP Ipc: H04L 12/28 20060101AFI20041206BHEP |
|
A4 | Supplementary search report drawn up and despatched |
Effective date: 20071119 |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: G06F 9/38 20060101ALI20071113BHEP Ipc: H04L 12/56 20060101ALI20071113BHEP Ipc: H04L 12/28 20060101AFI20041206BHEP |
|
R17D | Deferred search report published (corrected) |
Effective date: 20071213 |
|
17Q | First examination report despatched |
Effective date: 20080327 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 20081007 |