EP0923154A2 - Method for controlling a phase controlled antenna - Google Patents

Abstract

The method involves controlling a phase-controlled antenna consisting of transmitter/receiver modules containing a control logic, with which the phase- and amplitude controls in each module are adjusted in a pre-settable way. The control logic is directly connected with only one calibration memory which contains at least all phase- and amplitude correction values for the corresponding module. The method involves controlling a phase-controlled antenna consisting of transmitter/receiver modules, whereby each module contains a control logic, with which the phase- and amplitude controls in each module are adjusted in pre-settable way. The control logic is directly connected with only one calibration memory, which is preferably formed as E2>PROM in a SOIC casing, and which contains at least all phase- and amplitude correction values for the corresponding module. The phase- and amplitude controls are thereby controlled directly by the control logic.

Description

The invention is based on a control method a phase controlled antenna according to the generic term of Claim 1.

A phase-controlled antenna consists of a large number transmit or receive radiator elements arranged in a line or matrix. These are about a distance apart λ / 2, where λ is the wavelength of the transmitted and / or received Wave is. To each transmit / receive radiator element is a transmit / receive module, also called the T / R module is connected immediately. Each T / R module contains at least one transmission / reception switch to which the transmission / reception radiating element is connected, a transmission and a receive path, which also to the send / receive switch are connected, a send / receive switch to switch from transmit to receive mode, a phase adjuster and an amplitude adjuster ("voltage gain amplifier ", VGA), for adjusting the phase and the Amplitude of the transmit and receive signals, and one digital working control logic. This has a definable effect Way at least on the transmit / receive switch and the Phase and amplitude adjuster (VGA). Using the control logic it is possible to switch from the send to the receive case and predeterminable transmission and / or reception directional diagrams set by a predefinable setting the phase and amplitude adjuster. The (Main) beam direction of the antenna lobe (directional diagram) the phase adjuster and the shape of the antenna lobe, for example a so-called pencil beam (pencil directional diagram), itself set via the amplitude adjuster. Furthermore, it is possible with each T / R module phase and / or amplitude errors generally present, which, for example, on temperature-dependent and / or manufacturing-related electrical tolerances are based on a calibration process (calibration and adjustment process) as a phase and / or belonging to each T / R module Amplitude correction values in a calibration memory to save. This makes it possible to find the one that occurs for everyone Operating state of the antenna necessary phase and / or amplitude settings to execute with predeterminable accuracy.

A predeterminable number of such lines or matrices arranged transmit / receive radiator elements, each is directly coupled to an associated T / R module, is now combined into one unit, the so-called front end. Such a front end can be rotated, for example arranged in an elevated position, for example on a high building (tower). Such a front end is on a central unit connected, in particular a Setting of the send / receive directional diagrams and an evaluation the reception signals is caused.

The central unit and the front end are electrical Connection lines connected to each other. These include essentially an energy supply for the active components within the frontend, at least one radio frequency line, especially for the transmission of the transmit / receive signals, and a control line for the transmission of Control signals from the central unit to the control logic within the T / R modules.

It can be seen that in such a system the T / R modules also in that of the selected wavelength λ dependent (grid) distance must be arranged.

The invention now relates in particular to T / R modules which are designed for the highest possible transmit / receive frequency range, for example greater than or equal to 10 GHz. In this frequency range, there is a (raster) distance of less than or equal to 15 mm for the T / R modules. It follows from this that the electrical components and / or assemblies mentioned at the outset must be very small within a T / R module, that is to say they must have a base area which is in the mm ² range.

For some applications, for example in surveillance the surface of the earth by means of satellite technology, whereby a phased antenna is in a satellite, it is necessary to be as accurate and reliable as possible working frontend to use. That is, the transmit / receive directional diagrams must be within a predefined temperature range and in a predeterminable phase and amplitude range in a reliable and reproducible way be adjustable.

The requirements for phase and amplitude accuracy the active components of the T / R modules over a larger one Temperature ranges are at best very difficult to meet, in particular also in that phase and amplitude adjusters generally affect each other, that is, a phase adjuster generates amplitude errors and an amplitude adjuster generates phase errors.

Furthermore, the electrical component tolerances complicate compliance with the active GaAs components and / or GaAs assemblies the required electrical accuracies. By Use of at least one calibration memory attached to the the control logic available in each T / R module is coupled , both the temperature-dependent and the component-specific phase and amplitude errors individually for each T / R module can be compensated.

For this purpose, each manufactured T / R module must go through electrical calibration measurements fully characterized become. The electrical measurements are for everyone required conditions such as temperature, phase and amplitude carried out in both transmit (S) and receive (E) mode and the resulting electrical settings, which characterize the T / R module in the calibration memory saved.

The invention has for its object a generic To optimize the process so that depending predeterminable states, in particular temperature, Phase and amplitude in both transmit and receive modes, the resulting electrical settings for a T / R module in a space that is as small as possible and Calibration memory that works electrically as quickly as possible be stored within the T / R module and that only a calibration memory with as little as possible Storage capacity is needed.

This problem is solved by the in the characterizing part of claim 1 specified features. Beneficial Refinements and / or further developments are the others Removable claims.

A first advantage of the invention is that at a specified number of settings to be saved compared to the prior art only one by a high Factor less storage space is required.

A second advantage is that, due to the small Storage space requirements within the T / R module very small calibration memory can be used which is then due to the resulting very small spatial volume optionally through a housing that in particular shields electromagnetic radiation, protects can be. This increases the service life of the calibration memory and they are particularly reliable Front ends can be used in satellites.

A third advantage is that the control logic is a very quick switchover to different phases and / or Amplitude states enabled, for example with a switching time of less than 50 ns (nanoseconds). Thereby can, for example, rapidly changing transmission and / or Reception directional diagrams are generated so that for example, quick detection and / or monitoring of a predeterminable spatial area becomes possible.

Further advantages result from the description below.

Fig.1 bis Fig.4

schematisch dargestellte Diagramme zur Erläuterung der Erfindung.

The invention is explained in more detail below on the basis of exemplary embodiments with reference to schematically illustrated drawings. Show it

Fig.1 to Fig.4

schematically illustrated diagrams to explain the invention.

• 20 Temperaturzustände in einem vorgebbarem Temperaturbereich, wobei zwischen zwei benachbarten Temperaturständen eine Temperaturdifferenz von 4K liegt,
• 64 Phasenzustände im Sendemode S in einem vorgebbaren Phasenbereich, wobei zwischen benachbarten Phasenzuständen eine Phasendifferenz von 5,6 Grad liegt,
• 64 Phasenzustände im Empfangsmode E in einem vorgebbaren Phasenbereich, wobei zwischen benachbarten Phasenzuständen eine Phasendifferenz von 5,6 Grad liegt,
• 1 Amplitudenzustand im Sendemode S aus einem vorgebbarem Amplituderbereich und
• 32 Amplitudenzustände im Empfangsmode E in einem vorgebbaren Amplitudenbereich, wobei zwischen benachbarten Amplitudenzuständen eine Amplitudendifferenz von 0,5 dB liegt.

The invention is explained below for an example in which the phase and amplitude settings for the following states are to be stored in a T / R module:

• 20 temperature states in a predeterminable temperature range, with a temperature difference of 4K between two neighboring temperature levels,
• 64 phase states in transmit mode S in a predeterminable phase range, with a phase difference of 5.6 degrees between adjacent phase states,
• 64 phase states in receive mode E in a predeterminable phase range, a phase difference of 5.6 degrees between adjacent phase states,
• 1 amplitude state in transmit mode S from a predeterminable amplitude range and
• 32 amplitude states in receive mode E in a predeterminable amplitude range, with an amplitude difference of 0.5 dB between adjacent amplitude states.

Sendemode S :

• T/R Modul Phase = Funktion(Soll-Phase, Temperatur); Soll-Amplitude = konstant
• T/R Modul Amplitude = Funktion(Soll-Phase, Temperatur); Soll-Amplitude = konstant.

Empfangsmode E :

• T/R Modul Phase = Funktion(Soll-Phase, Soll-Amplitude, Temperatur)
• T/R Modul Amplitude = Funktion(Soll-Phase, Soll-Amplitude, Temperatur).

As a result of the calibration measurements, the following tables are then available for each T / R module:

Send mode S:

• T / R module phase = function (target phase, temperature); Target amplitude = constant
• T / R module amplitude = function (target phase, temperature); Target amplitude = constant.

Receive mode E:

• T / R module phase = function (target phase, target amplitude, temperature)
• T / R module amplitude = function (target phase, target amplitude, temperature).

Generate obvious calibration concepts with special software programs from these tables a calibration table (look-up table) for the phase adjuster PHS and the amplitude adjuster VGA, for everyone a possible value of the possible states of the input variables have ready for the phase and amplitude adjuster, phase and amplitude with the required accuracy to be able to adjust. The setting values stored in a table disadvantageously correspond to that with the Sum of the individual errors corrected setpoint. The charts are stored in so-called EPROMs and / or PROMs, the corresponding to Figure 2 in the signal path of the digital control signals are arranged. That is, the calibration table for the phase (look-up table PHS) is between the control logic and the phaser PHS arranged, and the calibration table for the amplitude (look-up table VGA) arranged between the control logic and the amplitude adjuster VGA. Amplitude and phase adjusters VGA, PHS are in this example as a series connection within an RF path, which is labeled with "RF in" and "RF out" within of the T / R module.

With such an arrangement, the transmission and / or reception mode from the control logic to the one to be set Sending and / or receiving directional diagram required setpoints for the phase and the amplitude as input values to the calibration tables (Look-Up Table PHS, Look-Up Table VGA). Then in the calibration tables the one belonging to each (phase or amplitude) setpoint (Phase or amplitude) actual value which corresponds to that with the Sum of the individual errors corresponds to the corrected target value, searched and directly to the phase or amplitude adjuster headed. These are then set accordingly.

With such an arrangement are also disadvantageously a large number of line connections required. Because the control of the calibration memory and the Phase and amplitude adjuster takes place in the so-called parallel mode, that is, there is one for each bit of a data word Control line required.

• Max. Speichergröße für die Tabelle Phasenschieber: 64 Phasen * 32 Amplituden * 20 Temperaturen * 2 Betriebsmodi[S/E] = 81920 * 8 Bit; das heißt, es wird ein Phasen-Kalibrationsspeicher von 128 kByte benötigt,
• Max. Speichergröße für die Tabelle Amplitudensteller: 64 Phasen * 32 Amplituden * 20 Temperaturen * 2 Betriebsmodi[S/E] = 81920 * 8 Bit; das heißt, es wird ein Amplituden-Kalibrationsspeicher von ebenfalls 128 kByte benötigt.

The memory size required for this arrangement of the calibration memories is calculated from the product of the input states (memory addresses) and the digital word width, here for example 8 bits, of the setting values according to the following representation:

• Max. Memory size for the phase shifter table: 64 phases * 32 amplitudes * 20 temperatures * 2 operating modes [S / E] = 81920 * 8 bits; that means a phase calibration memory of 128 kByte is required,
• Max. Memory size for the table amplitude adjuster: 64 phases * 32 amplitudes * 20 temperatures * 2 operating modes [S / E] = 81920 * 8 bits; that is, an amplitude calibration memory of 128 kbytes is also required.

A total of 2 * 128 kByte = 256 kByte of real storage capacity must be provided in each of the T / R modules, of which only 123,520 bytes, i.e. 47.1%, are actually used, i.e. less than half. The unused memory space arises, on the one hand, from the fact that the memory size must be rounded up to the next possible 2 ⁿ value (here 2 ¹⁷ ) and, on the other hand, from the fact that the amplitude controller VGA in transmit mode S is only operated with a predeterminable constant amplitude state, but for the reception mode E must be able to call up all amplitude states from the (amplitude) memory module (look-up table VGA).

The smallest possible currently commercially available housing sizes for 128 kbyte EPROMs or PROMs are 32-pin so-called TSOP housings, which require an area of at least 400mm ² per T / R module. Since memory modules such as EPROMs and / or PROMs can only be programmed outside the calibration circuit in a special programming arrangement, the memory modules either have to be soldered into the circuits within the T / R modules after the programming or they are for the memory modules (EPROMs / PROMs) to provide this corresponding (plug-in) base, but this also disadvantageously takes up a larger area, a larger volume and a greater weight in each T / R module.

1 according to the invention, that is present in every T / R module differs from the known circuit (Fig.2) essentially in that for each T / R module only the the active actuators PHS, VGA (phase and Amplitude) individual errors as corresponding (storage) values in just a single and much smaller memory chip (Calibration memory look-up table T / R module) get saved. For example, for the Phase adjuster PHS only at a predeterminable target phase value the associated individual errors (correction values) for the phase and the amplitude are stored. For the amplitude adjuster VGA become a predefinable target amplitude value only the associated individual errors (correction values) stored for the amplitude as well as the phase.

The determination (calculation) of the necessary actual setting values for the phase and the amplitude of a T / R module in the control logic of the T / R module to a predefinable one Time, for example before switching from one Send or receive directional diagram to another.

• Der Kalibrationsspeicher (Look-Up Table T/R Modul in Fig. 1) ist unmittelbar an die Steuerlogik angeschlossen und liegt nicht mehr im Signalweg der digitalen Ansteuersignale, das heißt, entsprechend Fig.2 zwischen der Steuerlogik und den Amplituden- sowie Phasenstellern.
• Für den Kalibrationsspeicher ist eine Verwendung eines derzeit handelsüblichen elektrisch löschbaren, reprogrammierbaren sogenannten E²PROMs, das auch als EEPROM oder E2PROM bezeichnet wird, in einem sogenannten Space-Rad-Hard-Gehäuse möglich, das für elektromagnetische Strahlung, insbesondere derjenigen des Weltraums, eine gute Abschirmung bewirkt.
• Es ist ein Einsatz von fehlerkorrigierenden Codes zur Erhöhung der Datensicherheit bei Verwendung von E²PROMs möglich, insbesondere für Anwendungen in Satellitengestützten Systemen.
• Der als E²PROM ausgebildete Kalibrationsspeicher wird erst nach dessen Einbau (Montage) in die Schaltung des T/R-Moduls mit einer Kalibrationstabelle beschrieben.
• Schreiben und Lesen der in dem Kalibrationsspeicher zu speichernden Werte erfolgt über eine schnelle serielle Schnittstelle zwischen der Steuer-Logik und dem E²PROM, beispielsweise mit einer Übertragungsgeschwindigkeit größer 2 Mbit/s. Eine solche serielle Schnittstelle benötigt vorteilhafterweise eine wesentlich geringere Anzahl von Verbindungsleitungen zwischen der Steuerlogik und dem Kalibrationsspeicher als eine entsprechende parallele Schnittstelle.

Other essential advantageous features of this arrangement are:

• The calibration memory (look-up table T / R module in FIG. 1) is connected directly to the control logic and is no longer in the signal path of the digital control signals, that is, according to FIG. 2, between the control logic and the amplitude and phase adjusters.
• For the calibration memory, it is possible to use a currently commercially available, electrically erasable, reprogrammable so-called E ² PROM, which is also referred to as EEPROM or E2PROM, in a so-called space-wheel-hard housing, which is suitable for electromagnetic radiation, in particular that from space good shielding.
• Error-correcting codes can be used to increase data security when using E ² PROMs, especially for applications in satellite-based systems.
• The calibration memory designed as E ² PROM is only described with a calibration table after it has been installed in the circuit of the T / R module.
• The values to be stored in the calibration memory are written and read via a fast serial interface between the control logic and the E ² PROM, for example at a transmission speed greater than 2 Mbit / s. Such a serial interface advantageously requires a significantly smaller number of connecting lines between the control logic and the calibration memory than a corresponding parallel interface.

• für die Phasen-Stellwerte des Phasenschiebers PHS in Abhängigkeit von den Soll-Phasen ergeben sich : 64 Phasen * 20 Temperaturen * 2 Betriebsmodi(S/E) = 2560 * 8 Bit,
• für die Phasenfehler des Amplitudensteller VGA in Abhängigkeit von den Soll-Amplituden ergeben sich: (32 Amplituden + 1 Amplitude) * 20 Temperaturen = 660 * 8 Bit,
• für die Amplituden-Stellwerte des Amplitudensteller VGA in Abhängigkeit von den Soll-Amplituden ergeben sich: (32 Amplituden + 1 Amplitude) * 20 Temperaturen = 660 * 8 Bit,
• für die Amplitudenfehler des Phasenschiebers in Abhängigkeit von den Soll-Phasen ergeben sich: 64 Phasen * 20 Temperaturen * 2 Betriebsmodi[S/E] = 2560 * 8 Bit und
• für die daraus resultierende Summe ergibt sich ein Speicherbedarf von 6440 Bytes, wobei ein Byte acht Bit enthält. Es muß also das nächst größere derzeit handelsübliche Speicherbauelement mit einer Speicherkapazität von 8 kByte verwendet werden.

The maximum memory size for the E ² PROM according to FIG. 1 is calculated from the sum (product for the arrangement according to FIG. 2) of the individual errors according to the following representation:

• for the phase setting values of the phase shifter PHS depending on the target phases: 64 phases * 20 temperatures * 2 operating modes (S / E) = 2560 * 8 bits,
• for the phase errors of the amplitude adjuster VGA depending on the target amplitudes: (32 amplitudes + 1 amplitude) * 20 temperatures = 660 * 8 bits,
• for the amplitude control values of the amplitude adjuster VGA as a function of the target amplitudes, there are: (32 amplitudes + 1 amplitude) * 20 temperatures = 660 * 8 bits,
• for the amplitude errors of the phase shifter depending on the target phases, the following results: 64 phases * 20 temperatures * 2 operating modes [S / E] = 2560 * 8 bits and
• the resulting sum requires 6440 bytes of memory, one byte containing eight bits. The next largest memory component currently available with a memory capacity of 8 kbytes must therefore be used.

A real storage capacity of only 8 kbytes (compared to 256 kbytes corresponding to the arrangement according to FIG. 2) must therefore be provided in each T / R module, the proportion of the memory space used having a value of 78.6 due to the 2 ⁿ memory size % owns. Compared to the known circuit (FIG. 2), this means a reduction in the memory size by a factor of 32 and a reduction in the stressed component area by a factor of 13. In the arrangement according to FIG. 1, therefore, only a single 8-pin is used for the calibration memory so-called SOIC package required. This is advantageously very compact in space and therefore requires little circuit area. Only 6 connecting lines are advantageously required between the serial calibration memory and the control logic. In contrast, approximately 30 connecting lines are required in the arrangement according to FIG.

In the following, the mode of operation of the arrangement is corresponding Fig.1 described.

The corrected, for example, determined from measurements Setting values for the phase shifter PHS and the amplitude adjuster VGA must be used for both the transmit and the the receive mode in fast buffers (registers) be made available, as is currently the usual operational Operation of the T / R module very quickly, that is, with an access time of less than 50ns, for example, between the setting values for sending and receiving and / or different directional diagrams must be switched.

In the case of an intended, predefinable change in the beam direction and / or the club shape (directional diagram) of the active phased antenna are in a predetermined Period immediately before switching (change) to belonging to the new beam direction and / or the new club shape new setpoints for phase and amplitude from the Central unit transferred to and in each T / R module Control logic saved.

Using the control logic, the correction values corresponding to the setpoints and depending on the current temperature of the T / R module are now read out of the calibration memory (E ² PROM), from which the new actual setting values for the phase and the amplitude can be specified calculated and provided for the operational operating mode (S or E) in corresponding registers.

1. Berechnung einer ersten Speicheradresse (aus Temperatur und Soll-Amplitude) für den Ist-Amplituden-Wert (Ampl.-Wert), der an dem Amplitudensteller VGA einzustellen ist.

2. Auslesen von 4 Byte, wobei jedes Byte 8 Bit lang ist, nacheinander aus dem Kalibrationsspeicher mittels eines seriell/parallel-Wandlers (Schiebe-Register). Dabei enthalten die ersten beiden Bytes, das heißt Byte 1 und Byte 2, die Korrekturwerte für den im Sendemode benötigten Phasenwert (Byte 1) und den im Empfangsmode benötigten Phasenwert (Byte 2). Die nächsten beiden Bytes, das heißt Byte 3 und Byte 4, enthalten die Korrekturwerte für den im Sendemode benötigten Amplitudenwertwert (Byte 3) und den im Empfangsmode benötigten Amplitudenwert (Byte 2). Diese 4 Bytes werden nun in die Zwischenregister A bis D geschrieben, wobei in jedes der Zwischenregister lediglich ein Byte gelangt.

3. Berechnen einer zweiten Speicheradresse (aus einem Temperaturwert, der Soll-phase und einem vorgebbaren Speicheradressen-Offset-Wert ([1000h]) für den (Sende- oder Empfangs-)Phasen-Wert, der an dem Phasensteller PHS einzustellen ist.

4. Auslesen von Byte 1 (Phasenfehler Amplitudensteller, S), Bildung einer ersten Summe (Byte 1 + Register A (Korrekturwert Sende-Phase)) und speichern der ersten Summe in einem Ergebnisregister E (Istwert Sende-Phase).

5. Auslesen von Byte 2 (Phasenfehler Amplitudensteller, E), Bildung einer zweiten Summe (Byte 2 + Register B(Korrekturwert Empfangs-Phase)) und speichern der zweiten Summe in einem Ergebnisregister F (Istwert Empfangs-Phase).

6. Auslesen von Byte 3 (Sollwert Sende-Amplitude), Bildung einer dritten Summe (Byte 3 + Register C(Korrekturwert Sende-Amplitude)) und speichern der dritten Summe in einem Ergebnisregister G (Istwert Sende-Amplitude).

7. Auslesen von Byte 4(Amplitudenfehler Phasensteller, E), Bildung einer vierten Summe (Byte 4 + Register D(Korrekturwert Empfangs-Amplitude)) und speichern der vierten Summe in einem Ergebnisregister H (Istwert Empfangs-Amplitude).

Based on the control logic shown as an example in FIG. 3 and a possible memory division of the calibration memory, as shown in FIG. 4, the control logic processes the following sequences:

1. Calculation of a first memory address (from temperature and setpoint amplitude) for the actual amplitude value (amplitude value), which is to be set on the amplitude controller VGA.

2. Reading out 4 bytes, each byte being 8 bits long, one after the other from the calibration memory by means of a serial / parallel converter (shift register). The first two bytes, i.e. byte 1 and byte 2, contain the correction values for the phase value (byte 1) required in the send mode and the phase value (byte 2) required in the receive mode. The next two bytes, i.e. byte 3 and byte 4, contain the correction values for the amplitude value value (byte 3) required in the send mode and the amplitude value (byte 2) required in the receive mode. These 4 bytes are now written into the intermediate registers A to D, with only one byte going into each of the intermediate registers.

3. Calculate a second memory address (from a temperature value, the target phase and a specifiable memory address offset value ([1000h]) for the (transmit or receive) phase value to be set on the phase adjuster PHS.

4. Reading out byte 1 (phase error amplitude adjuster, S), forming a first sum (byte 1 + register A (correction value transmission phase)) and storing the first sum in a result register E (actual value transmission phase).

5. Read out byte 2 (phase error amplitude adjuster, E), form a second sum (byte 2 + register B (correction value reception phase)) and save the second sum in a result register F (actual value reception phase).

6. Read out byte 3 (setpoint transmit amplitude), form a third sum (byte 3 + register C (correction value transmit amplitude)) and store the third sum in a result register G (actual value transmit amplitude).

7. Read out byte 4 (amplitude error phase adjuster, E), form a fourth sum (byte 4 + register D (correction value receive amplitude)) and save the fourth sum in a result register H (actual value receive amplitude).

The contents of the result registers E to H are controlled by a takeover signal that can be specified by the central unit "Beam Valid", simultaneously in all T / R modules in the output register I to M and overwrite those there existing previous actual setting values. Two transmit / receive multiplexers each S / E-Mux, controlled by one of the central unit predeterminable transmit / receive switchover signal S / E, forward the determined actual setting values to the Phase and amplitude adjuster PHS, VGA of the T / R modules.

The sequence described advantageously has a high execution speed, since the memory address does not have to be transferred to the E ² PROM for each byte, but only the start address of a group of 4 (sequence 1 and sequence 3). In the E ² PROM, the memory address is advantageously incremented automatically in a predeterminable manner.

The invention is not based on the exemplary embodiments described limited, but applicable to others.

Claims (6)

Method for controlling a phase-controlled antenna, at least consisting of a predeterminable number of T / R modules, each T / R module at least contains a phase and an amplitude adjuster for setting a predeterminable transmission and / or reception directional diagram of the antenna, a control logic for setting the phase and amplitude adjuster of the T / R module depending on the predefinable transmission and / or reception directional diagram of the antenna and a calibration memory in which at least values necessary for setting the phase and / or amplitude adjuster are stored, characterized in that that initially for each T / R module of the antenna within predefinable temperature, phase and amplitude ranges the actual values for the phase and amplitude adjusters belonging to predefinable setpoints which lie within the ranges for the phase and amplitude adjuster (PHS, VGA) Amplitude settings are determined, that a correction value for the phase and the amplitude adjuster (PHS, VGA) are determined from each setpoint and the associated actual value in a predeterminable manner, that all correction values for a T / R module are stored in a common correction value memory, that the correction value memory is designed as a read / write memory and is linked to the control logic in such a way that read / write operations only take place via the control logic, that at least one associated correction value is read out from the correction value memory by the control logic for each predeterminable setpoint value and is linked to the setpoint value in a predeterminable manner so that an associated actual value is created and that the actual value is fed directly to the associated phase or amplitude adjuster by the control logic. Method for controlling a phased antenna according to claim 1, characterized in that the correction value memory designed as a serial read / write memory becomes. Method for controlling a phased antenna according to claim 1 or claim 2, characterized in that the correction value memory as electrically read and writable memory is formed. Method for controlling a phase-controlled antenna according to one of the preceding claims, characterized in that in the control logic at least one associated correction value is first read out from the correction value memory for a predefinable setpoint value and is stored in a predefinable register, the content of the register is added to the setpoint so that the actual value is created the actual value is transferred to a result register and saved there, the content of the result register is transferred to an output register as a function of a specifiable control signal, existing data being overwritten there and the content of the output register is transmitted to the phase and / or amplitude adjuster of the T / R module as a function of a further predeterminable control signal. Method for controlling a phase-controlled antenna according to one of the preceding claims, characterized in that that at least one setpoint for setting the phase adjuster (PHS) and one setpoint for setting the amplitude adjuster (VGA) are supplied to a T / R module, that in order to determine the actual value associated with the phase adjuster (PHS) from the correction value memory, the phase correction values belonging to the setpoint value of the phase adjuster (PHS) and the amplitude adjuster (VGA) are read out and stored as a sum in a register, that to determine the actual value belonging to the amplitude adjuster (VGA) from the correction value memory, the amplitude correction values belonging to the setpoint value of the phase adjuster (PHS) and the amplitude adjuster (VGA) are read out and stored as a sum in a further register and that the actual values for the phase adjuster and the amplitude adjuster are simultaneously sent to the phase adjuster and the amplitude adjuster as a function of the further control signal. Method for controlling a phase-controlled antenna according to one of the preceding claims, characterized in that that a T / R module for the transmission case and the reception case
one setpoint each for the phase adjuster and the amplitude adjuster are supplied, that the associated actual values for each setpoint are determined and saved in result registers, that the contents of the result registers are transferred to associated output registers as a function of a specifiable control signal, existing data being overwritten there and that the contents of the output register as a function of a further predeterminable control signal, which causes an optional switchover from the transmission case to the reception case by means of at least one transmission / reception switch, to the phase and / or amplitude adjuster of the T / R module be transmitted.

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