EP0903792B1 - Procédé pour la réalisation d'une pluralité de lasers semi-conducteurs - Google Patents

Procédé pour la réalisation d'une pluralité de lasers semi-conducteurs Download PDF

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Publication number
EP0903792B1
EP0903792B1 EP98117796A EP98117796A EP0903792B1 EP 0903792 B1 EP0903792 B1 EP 0903792B1 EP 98117796 A EP98117796 A EP 98117796A EP 98117796 A EP98117796 A EP 98117796A EP 0903792 B1 EP0903792 B1 EP 0903792B1
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EP
European Patent Office
Prior art keywords
semiconductor
mask layer
windows
layer
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP98117796A
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German (de)
English (en)
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EP0903792A3 (fr
EP0903792A2 (fr
Inventor
Volker Dr. Härle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams Osram International GmbH
Original Assignee
Osram Opto Semiconductors GmbH
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Filing date
Publication date
Priority claimed from DE1997141442 external-priority patent/DE19741442A1/de
Priority claimed from DE1998138810 external-priority patent/DE19838810B4/de
Application filed by Osram Opto Semiconductors GmbH filed Critical Osram Opto Semiconductors GmbH
Publication of EP0903792A2 publication Critical patent/EP0903792A2/fr
Publication of EP0903792A3 publication Critical patent/EP0903792A3/fr
Application granted granted Critical
Publication of EP0903792B1 publication Critical patent/EP0903792B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/0201Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Led Devices (AREA)
  • Semiconductor Lasers (AREA)
  • Drying Of Semiconductors (AREA)
  • Physical Vapour Deposition (AREA)
  • Weting (AREA)

Claims (9)

  1. Procédé de fabrication d'une pluralité de puces laser en semiconducteur (200) à émission par la tranche, selon lequel :
    - une couche de masque (4) est appliquée sur une galette substrat (19),
    - la couche de masque (4) est munie d'une pluralité de fenêtres (10) dans lesquelles est dégagée la surface principale (9) de la galette substrat (19),
    - une série de couches en semiconducteur (18) à base de Ga(Al, In)N est déposée sur la surface principale (9) de la galette substrat (19) dégagée par les fenêtres (10) de manière à produire dans les fenêtres (10) des structures laser à émission par la tranche identiques, et
    - la galette (24) ainsi produite étant divisée en puces laser en semiconducteur (200) à émission par la tranche individuelles par sectionnement entre les structures laser à émission par la tranche,
    la couche de masque (4) présentant au moins une épaisseur qui correspond à la zone de passage de la lumière des structures laser à émission par la tranche, de sorte que les surfaces miroirs à laser (8) des structures laser à émission par la tranche sont à chaque fois définies par deux surfaces latérales (7) opposées l'une à l'autre et à faces planes et parallèles de la fenêtre (10).
  2. Procédé selon la revendication 1, selon lequel la couche de masque (4) utilisée est une couche de SiO2 ou de SixN1-x.
  3. Procédé selon l'une des revendications 1 ou 2, selon lequel la galette substrat (19) présente au moins une couche en semiconducteur (6) appliquée par épitaxie sur laquelle la série de couches en semiconducteur (18) est déposée dans les fenêtres (10).
  4. Procédé selon la revendication 3, selon lequel la couche en semiconducteur (6) se compose pour l'essentiel de GaxAl1-xN (0 ≤ x ≤ 1).
  5. Procédé selon l'une des revendications 1 à 4, selon lequel la série de couches en semiconducteur présente au moins une couche en semiconducteur en Ga1-x-yInxAlyN, avec 0 ≤ x < 1, 0 ≤ y < 1 et x+y < 1.
  6. Procédé selon l'une des revendications 1 à 5, selon lequel un procédé de gravure anisotrope à sec est utilisé pour former les fenêtres (10).
  7. Procédé selon l'une des revendications 1 à 6, selon lequel la couche de masque (4) est retirée avant de sectionner la galette (24).
  8. Procédé selon la revendication 7, selon lequel la couche de masque (4) est retirée après la déposition des structures en semiconducteur (2) au moyen d'une étape de gravure (14) sélective pour les structures en semiconducteur (2).
  9. Procédé selon la revendication 8, selon lequel un procédé de gravure isotrope chimique mouillé est utilisé pour retirer la couche de masque (4) après la déposition des structures en semiconducteur (2).
EP98117796A 1997-09-19 1998-09-18 Procédé pour la réalisation d'une pluralité de lasers semi-conducteurs Expired - Lifetime EP0903792B1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE1997141442 DE19741442A1 (de) 1997-09-19 1997-09-19 Verfahren zum Herstellen einer Halbleitervorrichtung
DE19741442 1997-09-19
DE1998138810 DE19838810B4 (de) 1998-08-26 1998-08-26 Verfahren zum Herstellen einer Mehrzahl von Ga(In,Al)N-Leuchtdiodenchips
DE19838810 1998-08-26

Publications (3)

Publication Number Publication Date
EP0903792A2 EP0903792A2 (fr) 1999-03-24
EP0903792A3 EP0903792A3 (fr) 2000-03-22
EP0903792B1 true EP0903792B1 (fr) 2010-11-03

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP98117796A Expired - Lifetime EP0903792B1 (fr) 1997-09-19 1998-09-18 Procédé pour la réalisation d'une pluralité de lasers semi-conducteurs

Country Status (6)

Country Link
US (1) US6100104A (fr)
EP (1) EP0903792B1 (fr)
JP (1) JPH11154648A (fr)
CN (1) CN1218997A (fr)
DE (1) DE59814474D1 (fr)
TW (1) TW393785B (fr)

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DE19838810B4 (de) * 1998-08-26 2006-02-09 Osram Opto Semiconductors Gmbh Verfahren zum Herstellen einer Mehrzahl von Ga(In,Al)N-Leuchtdiodenchips
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US6051849A (en) 1998-02-27 2000-04-18 North Carolina State University Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer
US6608327B1 (en) 1998-02-27 2003-08-19 North Carolina State University Gallium nitride semiconductor structure including laterally offset patterned layers
US6265289B1 (en) * 1998-06-10 2001-07-24 North Carolina State University Methods of fabricating gallium nitride semiconductor layers by lateral growth from sidewalls into trenches, and gallium nitride semiconductor structures fabricated thereby
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CN102456778B (zh) * 2010-10-26 2014-11-05 展晶科技(深圳)有限公司 发光二极管芯片制造方法
CN102130230A (zh) * 2010-12-28 2011-07-20 中国科学院半导体研究所 发光二极管的制备方法
CN105720136B (zh) * 2014-12-02 2019-04-05 无锡极目科技有限公司 在复合玻璃基板上制造视频显示板用多色led的方法
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TW201933625A (zh) * 2018-01-19 2019-08-16 晶元光電股份有限公司 發光元件及其製造方法
CN111326948B (zh) * 2018-12-15 2023-04-07 深圳市中光工业技术研究院 激光器芯片的制备方法
CN110690106A (zh) * 2019-10-22 2020-01-14 北京大学东莞光电研究院 一种单晶金刚石芯片的制备方法
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Also Published As

Publication number Publication date
DE59814474D1 (de) 2010-12-16
US6100104A (en) 2000-08-08
TW393785B (en) 2000-06-11
EP0903792A3 (fr) 2000-03-22
CN1218997A (zh) 1999-06-09
JPH11154648A (ja) 1999-06-08
EP0903792A2 (fr) 1999-03-24

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