EP0758148A3 - Method and apparatus for forming electrical contacts in multi-layer integrated circuits - Google Patents

Method and apparatus for forming electrical contacts in multi-layer integrated circuits Download PDF

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Publication number
EP0758148A3
EP0758148A3 EP96305722A EP96305722A EP0758148A3 EP 0758148 A3 EP0758148 A3 EP 0758148A3 EP 96305722 A EP96305722 A EP 96305722A EP 96305722 A EP96305722 A EP 96305722A EP 0758148 A3 EP0758148 A3 EP 0758148A3
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EP
European Patent Office
Prior art keywords
carrier layer
contact
electrical contacts
trenches
flux
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP96305722A
Other languages
German (de)
French (fr)
Other versions
EP0758148A2 (en
Inventor
Zheng Xu
John Forster
Tse-Yong Yao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Applied Materials Inc
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Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of EP0758148A2 publication Critical patent/EP0758148A2/en
Publication of EP0758148A3 publication Critical patent/EP0758148A3/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53233—Copper alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The disclosure relates to a carrier layer (100) and a contact (118) enabled by the carrier layer which enables the fabrication of aluminium (including aluminum alloys and other conductive material having a similar melting point) electrical contacts in multilayer integrated circuit vias, through holes, or trenches (113) having an aspect ratio greater than one. In fact, the structure has been shown to enable such contact fabrication in vias, through holes, and trenches having aspect ratios as high as at least 5:1, and should be capable of filing apertures having aspect ratios up to about 12:1. The carrier layer (100) in addition to permitting the formation of a conductive contact at high aspect ratio, provides a diffusion barrier which prevents the aluminum from migrating into surrounding substrate material (110) which operates in conjunction with the electrical contact. The carrier layer preferably comprises a layer (112, 114, 116) formed by ionizing the flux of sputter deposition material, partially reacting the flux with a gas, and depositing the resulting material on a substrate.
EP96305722A 1995-08-07 1996-08-02 Method and apparatus for forming electrical contacts in multi-layer integrated circuits Withdrawn EP0758148A3 (en)

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US511825 1983-07-08
US08/511,825 US5962923A (en) 1995-08-07 1995-08-07 Semiconductor device having a low thermal budget metal filling and planarization of contacts, vias and trenches

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EP0758148A2 EP0758148A2 (en) 1997-02-12
EP0758148A3 true EP0758148A3 (en) 1999-08-18

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