EP0397995A3 - Mixed size data cache status fields - Google Patents

Mixed size data cache status fields Download PDF

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Publication number
EP0397995A3
EP0397995A3 EP19900105547 EP90105547A EP0397995A3 EP 0397995 A3 EP0397995 A3 EP 0397995A3 EP 19900105547 EP19900105547 EP 19900105547 EP 90105547 A EP90105547 A EP 90105547A EP 0397995 A3 EP0397995 A3 EP 0397995A3
Authority
EP
European Patent Office
Prior art keywords
data cache
memory
entry
data
dirty
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19900105547
Other languages
German (de)
French (fr)
Other versions
EP0397995A2 (en
Inventor
Robin Wayne Edenfield
William B. Ledbetter, Jr.
Russell A. Reininger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of EP0397995A2 publication Critical patent/EP0397995A2/en
Publication of EP0397995A3 publication Critical patent/EP0397995A3/en
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating

Abstract

A data cache (16) capable of operation in a write-back (copyback) mode. The data cache design provides a mechanism for making the data cache (16) coherent with memory (26), without writing the entire cache entry to memory (26), thereby reducing bus utilization. Each data cache entry is comprised of three items: data, a tag address, and a mixed size status field. The mixed size status fields provide one bit to indicate the validity of the data cache entry and multiple bits to indicate if the entry contains data that has not been written to memory (26) (dirtiness). Multiple dirty bits provide a data cache controller (14) with sufficient information to minimize the number of memory accesses used to unload a dirty entry. The data cache controller (14) uses the multiple dirty bits to determine the quantity and type of accesses required to write the dirty data to memory (26). The portions of the entry being replaced that are clean (unmodified) are not written to memory (26).
EP19900105547 1989-05-15 1990-03-23 Mixed size data cache status fields Withdrawn EP0397995A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/351,899 US5155824A (en) 1989-05-15 1989-05-15 System for transferring selected data words between main memory and cache with multiple data words and multiple dirty bits for each address
US351899 1994-12-08

Publications (2)

Publication Number Publication Date
EP0397995A2 EP0397995A2 (en) 1990-11-22
EP0397995A3 true EP0397995A3 (en) 1992-03-18

Family

ID=23382897

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19900105547 Withdrawn EP0397995A3 (en) 1989-05-15 1990-03-23 Mixed size data cache status fields

Country Status (3)

Country Link
US (1) US5155824A (en)
EP (1) EP0397995A3 (en)
JP (1) JPH036757A (en)

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Also Published As

Publication number Publication date
EP0397995A2 (en) 1990-11-22
JPH036757A (en) 1991-01-14
US5155824A (en) 1992-10-13

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