EP0295984A1 - On-board equipment for data processing and transmission - Google Patents

Abstract

Equipment intended to be loaded on board a vehicle in order to collect, store, process and remotely transmit data, characterised in that it is connected up to a radiophonic radio/transmitter (3) across an interface (7) which ensures conversions and levellings between on the one hand the said equipment (1) of terminal type and peripherals (8, 9, 11, 12), and on the other hand the transmitter/receiver (3). Application to transport companies and in particular to taxis. <IMAGE>

Description

The present invention relates to equipment intended to be taken on board a vehicle and to ensure the collection, storage, processing and transmission (transmission / reception) of data to be exchanged with one or more installations outside the vehicle.

Currently, the most common installations for communication between vehicles and external installations (most often fixed) are radio or radiotelephone installations. This is the case for land, sea, air and space vehicles. However, if in the field of marine, aviation or space, there are currently very widespread means to locate or guide vehicles due to the possible use of electromagnetic or other systems (and in particular radars ), it is obvious that the obstruction of the terrestrial ways singularly complicates the use to the point that only an on-board transmitter can make it possible to ensure a tracking.

When you want to monitor a large fleet of vehicles, you have to turn to solutions that are easy to implement if, on board the vehicle, there is only one responsible person, the driver as is the case on motor vehicles or railways. In the railway sector, it is fairly easy to obtain markings thanks to the signaling and switch sets which allow the recording of the passage of convoys at numerous points, which makes it possible to define the sections of tracks occupied or not.

With motor vehicles (including trucks, motorcycles or others), the problem is extremely complex and presents few practical solutions that are easy to implement in the short term.

In what follows, by way of example and for simplicity, reference will be made to a fleet of taxis, which represents the typical example of organization where it is useful to know at least approximately the instantaneous position of each vehicle, its destination and its approximate time of arrival, as well as its state of occupation or vacancy. By having all this data, it is possible to respond more easily and quickly to requests and possibly to direct too many vehicles in an area with low demand to areas where demand cannot be met.

However, at present, the only widespread means of communication is the radiophonic or radiotelephone transceiver and each operating frequency is congested not only by vehicle requests but also by the exchange of information on positions and destinations , if you want to control the distribution and availability of vehicles.

In the patent application filed on the same day by the applicant and entitled "data transmission between vehicles and fixed stations", a communication network with local stations is proposed limiting the congestion of frequencies, by not transmitting in an information zone concerning other zones which are too far away; it is also proposed to use the network to transmit on radio frequencies data relating to everything that may interest the organization of the network (vehicle requests, position, destination, estimated time of arrival, distance traveled, occupation or vacancy , speed, accounting data, technical condition of the vehicle, etc.). For this, this patent application presents an assembly that can constitute an interface between a radio transceiver and the equipment in accordance with the present invention.

The connection between such an interface or any equivalent and the equipment according to the invention being carried out by a certain number of electrical conductors preferably forming a ribbon, a cable or a bundle, it is possible to ensure by this same link the connection of other equipment forming peripherals.

The equipment according to the invention is organized around a transported terminal which must be extremely simple to use and read in order to be accessible to an active driver and therefore not to distract his attention. It must therefore be readable at a glance, like the traditional components of the dashboard and the data entry system of the keyboard type or equivalent, must be simple enough so that the driver can send his messages in a few seconds, for example, when stopping at a red traffic light.

According to the present invention, next to the conventional radio transceiver with microphone and speaker or earpiece, the driver can enter data for example by means of a keyboard and receive data by display, data which can also be automatically transmitted to the central station or to substations. Sensors placed on the vehicle can transmit indications concerning the speed, the distance traveled, the price of the races, the state of occupation or vacancy and other technical or practical data. Security and alarm data (failure, attack, accident, etc.) may also be transmitted.

The devices according to the invention which have been tested have limited dimensions (of the order of those of conventional radio receivers of series cars) with a keyboard whose number of keys is reduced and an alphanumeric display. A lighting system allows good readability whatever the lighting prevailing in the vehicle at the instant considered. Various other characteristics will appear in the description of the exemplary embodiment below analyzed.

It will be noted that due to the current evolution of the role of on-board electronics of vehicles, the equipment in accordance with the invention can easily be associated with the most varied systems, not only for the transmission of technical data but for example in the framework for locating and electronic mapping, in which case the display screen could also be used, at least in part, in the context of the present invention. To better understand the technical characteristics and advantages of the present invention, an embodiment will be described, it being understood that this is not limiting as to its mode of implementation and the applications that it can do it.

• - la figure 1 un synoptique de l'ensemble embarqué dans lequel s'intègre un équipement conforme à l'invention qui pour simplifier sera ci-après dénommé le terminal;
• - la figure 2 un synoptique du terminal;
• - la figure 3 le montage d'un exemple de microprocesseur en lui-même;
• - la figure 4 la commande du bus du microprocesseur;
• - la figure 5 l'ensemble des mémoires;
• - la figure 6 l'ensemble d'alimentation;
• - la figure 7 la commande de l'alimentation et du système marche/arrêt;
• - la figure 8 le système de détection de perte de cou­rant;
• - la figure 9 l'alimentation des équipements lumineux;
• - la figure 10 l'ensemble d'affichage;
• - la figure 11 l'interface avec l'imprimante;
• - la figure 12 l'interface avec le réseau local;
• - la figure 13 le capteur de température.

We will refer to the following figures which schematically represent:

• - Figure 1 a block diagram of the on-board assembly in which is integrated an equipment according to the invention which for simplicity will be hereinafter referred to as the terminal;
• - Figure 2 a block diagram of the terminal;
• - Figure 3 the assembly of an example of microprocessor in itself;
• - Figure 4 the control of the microprocessor bus;
• - Figure 5 all memories;
• - Figure 6 the power supply;
• - Figure 7 the control of the power supply and the on / off system;
• - Figure 8 the current loss detection system;
• - Figure 9 the supply of light equipment;
• - Figure 10 the display assembly;
• - Figure 11 the interface with the printer;
• - Figure 12 the interface with the local network;
• - Figure 13 the temperature sensor.

Figure 1 is intended to illustrate the association of a terminal according to the present invention with other equipment on board the vehicle and in particular with the radio transceiver.

The terminal 1 communicates by a certain number of conductors 2 with these other pieces of equipment and in particular with the transceiver 3 of any conventional type with microphone 4, loudspeaker 5 and antenna 6. An interface 7 ensures the transmission, the conversions and necessary upgrades between, on the one hand, signals from terminal 1, other peripherals such as 8 and on the other hand the transceiver 3. This interface 7 can be of the type which is the subject of the French patent application filed on the same day as the present application and mentioned above.

The terminal 1 for its part receives a certain amount of information by its keyboard 9 and by various inputs 10 connected for example to sensors, alarms, or the like. The display 11 makes it possible to read the data both on transmission and on reception. The whole can be completed by a printer 12. The present invention therefore essentially relates to the assembly 1, 9, 10, 11, 12 and the connection of the conductors 2. As has been described above, this assembly can be produced by practical in a simple form and small volume.

In FIG. 1, the roles of the conductors 2 have not been detailed except with regard to the mass.

In practice, as will be seen below, the transceiver 1 is connected to the following conductors indicated with the references which will be used below:
. stop / start 1/0
. RESET reset
. CLK clock
. reception of RX data
. TX data transmission

We can add mass and possibly a food. On the terminal side, we find the same connections. In FIG. 1, various auxiliaries have not been shown, in particular the power supplies of the various constituents which will be analyzed in more detail below.

Preferably, the connections are made via interfaces, for example of the open collector type, to allow interventions in parallel on each element (such as 8 for example) mounted on the network of conductors 2. This type of mounting is necessary for the RX line.

In Figure 2, is schematically shown the block diagram of the terminal 1 of Figure 1 (including keyboard 9, display 11 and printer 12).

This terminal is centered on a µP microprocessor including traditional devices (RAM, ROM or better REPROM, command, address and data bus, etc.). The microprocessor µP receives pulses from the clock CLK and is supplied with regulated voltage V _C and with voltage V _S backed up from the battery BAT, by the power supply unit POW. This µP microprocessor is also connected to the TEMP temperature control system, to the PRINT.CONT printer control, to the DISP.CONT display control, to the POW.CONT power control and to the heat loss detector. DET supply, under conditions and by means which will be analyzed below. The microprocessor µP is associated with an audible signal represented at 13 and receives alarm signals AL, for example from a pedal, and of occupation or vacancy of the vehicle OC from the starting or the 'stop distance and price counter.

The entire circuit of FIG. 2 is connected by the interface to the local network symbolized by the outputs 2. The POW supply system is itself supplied from the general supply of the vehicle V _B and from the battery BAT at voltage V _B reserved for backing up the circuit according to the invention. This supply system supplies the regulated voltage V _C to the logic components of said circuit and the backup voltage V _S to the microprocessor µP. It also provides a reference voltage V _ref to the analog components (POW.CONT power control, TEMP temperature control and INT interface with the local network). The POW power supply system is controlled by the POW.CONT device which is itself supplied with general voltage V _B of the vehicle by means of a switch 14 and communicates in both directions with POW power supply and microprocessor µP.

A DET supply loss detector connected to the general supply circuit V _B transmits the corresponding information to the µP microprocessor for loss compensation.

The CLK clock sends pulses not only to the µP microprocessor but to a light signal supply device LIT, to the INT interface and to the TEMP temperature control. This latter TEMP., Associated with a precision thermistor, sends signals to the microprocessor µP indicating that the temperature has been exceeded under the conditions which will be analyzed below.

The supply system also ensures the switching of a voltage V _P , hereinafter called switched voltage, which is supplied to the sound system 13 at the interface INT, to the print command PRINT.CONT and to the supply light devices, as well as the local network 2. The assembly 11 of FIG. 2 associated with the keyboard 9 is essentially constituted by the display itself DISP. and its DISP.CONT control both supplied by the power supply system of the LIT light devices. The latter supplies the necessary voltages V _A V _A ′, to the display and supplies the indicator lights and light bulbs 16 of the keyboard; it also supplies the display command DISP.CONT with a voltage V _M to which we will return below. This supply of LIT light devices is associated with a photoresistor 17 which takes account of the surrounding illumination.

The microprocessor µP is also in relation with the printing system 12 constituted essentially by the printer itself PRINT and its command PRINT.CONT.

The BUS ensures the transmission of data from the µP microprocessor to the DISP.CONT display and PRINT.CONT print commands as well as to the INT interface connected in 2 to the local network.

We will return below to the various components of the terminal in FIG. 2 but we can note a few important points.

The backup voltage V _S is of the order of that V _B ′ of the backup battery.

The switched voltage V _P is that V _B of the general supply of the vehicle after switching.

The CLK clock sends its pulses to the µP microprocessor, but also to the power supply system for LIT light devices to provide general alternative control, to the INT interface and to the TEMP temperature controller to ensure sampling.

FIG. 3 schematically represents the assembly of the microprocessor µP itself, that is to say without the bus and the memories. In the example considered, it is a CMOS type integrated circuit, reference 146805, manufactured by Motorola, which is an 8-bit microprocessor including, among other things, a random access memory and input and output, with the advantage of low energy consumption and a relatively low cost price, which is appreciable for on-board equipment.

Taking into consideration, successively the connections of the microprocessor, one meets the following elements: V _CC / RESET connection to the regulated voltage V _C of a trigger input hence the use of a simple RC set for the time constant.
GND mass.
PA0 to PA7 and PB0 to PB7 corresponding to entry and exit doors.
PB7 input of signal OC of figure 2 (occupation / vacancy).
PB6 INH.DISP .: inhibition of the display which is used to avoid the persistence of a previous character.
PB5 TEMP: input of signals indicating that the temperature has been exceeded, sent by the controller.
PB4 input of signal AL of figure 2 (alarm for example by pedal).
PB0 to 3 MAP.EPROM: change of addressing system allowing the nominal capacity of the EPROM read-only memory to be increased.
PA0 and 1 L0 and Ll: state of the keyboard matrix.
PA2 horn operating circuit (buzzer type, for example) mounted so that it is inactive as long as the µP microprocessor is out of service.
PA3 IT.PR: interrupt request signal from the printer command.
PA4 and 5 MAP.RAM: same system as for MAP.EPROM in order to increase the capacity of the RAM.
PA6 VL: voltage loss signal from the DET detector.
PA7 INH.PR: inhibition of the printer making it possible to check the status during RESET reset, and to guarantee the initial values for the electronics while waiting for the microprocessor to start up.
OSC1 and OSC2 correspond to oscillator inputs. In the case of using an external clock, the output A of the CLK clock is connected to OSC1.
B0 to 7 multiplexed MA data and address buses.
A8 to 12 non-multiplexed MA data and higher order address buses.
DS data output command.
AS address output command (address strobe).
IRQ interrupt request input.

In FIG. 4, which represents the control circuit of the microprocessor bus, we find the signals AS, DS, as well as those coming from the gates A₈ to A₁₂ and B₀ to B₇ of the microprocessor µP of FIG. 3, to which must be added the signal R / W read / write command from the microprocessor and the INH.RAM signal from the POW.CONT power command (Figure 2).

This bus command demultiplexes from B₀ to B₇, that is to say data and addresses of lower order, in D₀ to D₇ (data) and A′₀ to A′₇ (addresses). In addition, it ensures the decoding of the signals to give the various validation pulses:
CSRAM (for RAM),
CSEPRF and CSEPRM (for read only memories),
CSIMP (for the printer, and
CSSEG and CSCAR (for the segments and characters of the display to which we will return later).

This set is organized around the following main components:
A bus locking device (BL) ensuring demultiplexing. It can be constituted by any conventional system such as an integrated circuit of the HC 373 type.

It is connected on the one hand by its inputs I₀ to I₇ to the bus B₀ to B₇ of data and addresses of lower order, on the other hand by its input I to the validation of output of address address AS (address strobe) .

The signals conveyed in B₀ to B₇ give on the one hand the signals D₀ to D₇ in direct transmission, on the other hand the signals A′₀ and A′₇ through the lock BL controlled by the output signals of address AS. BL lock is grounded E and GND and supplied with V _DC at regulated voltage V _C.

R / read / write control signals W on the one hand are transmitted directly and on the other hand are reversed (for example by arriving at the two inputs of the NAND gate1, which allows with the other NAND gates used below to use the four gates of the same type of a single component such as an HCO3 circuit with open collectors).

The signal from this door OERAM is used to activate the RAM output and is also brought to one of the inputs of a second NON-ET2 gate whose other input receives the INH.RAM signals. It issues write authorization signals WERAM .

The DS data output control signals are firstly transmitted directly to E and secondly brought to an input of a third NON-ET3 gate receiving on its other input the signals INH.RAM. Its output is connected to the inputs E _a and E _b a decoder D (for example an integrated circuit of the LS 156 type). The higher order data and address bus A₈ to A₁₂ is connected, for A₈ and A₉ directly in A′₈ and A′₉ to the memory set, as will be seen below, for A₁₀ also in A ′ ₁₀ to the memory unit but also to input E _a and to a second input E _b of the decoder D, for A₁₁ and A₁₂ respectively at the inputs A₀ and A₁ of the decoder D.

Note in Figure 4, the series of booster resistors mounted between bus lines (on B₀ to B₇, A′₀ to A′₇, A₈ at A₁₀) and ground, that is to say on all the lines leading to the memory boxes. They are used to save the memory and avoid high level erratic presence when the system is not powered, which avoids high consumption.

The decoder D is also supplied with V _DC at a regulated voltage V _C. In addition, the entrances E _a and E _b of the decoder D connected to the output of the NON-ET3 gate and the outputs a₀ and b₀ receive the voltage supply V _S , that is to say that they are constantly energized. The outputs a₁, b₁, a₂, b₂, a₃ and b₃ of the decoder D are supplied with regulated voltage V _C. The outputs of NON-ET1 to 3 doors are all supplied with voltage V _S.

The permanently maintained power supplies ensure constant knowledge of all the signals exchanged with the memories.

The outputs of decoder D give the following validation pulses:
a₀ and b₀ CS.RAM for RAM;
a₁ CS.SEG for the display segments through an immersion provided by the NON-ET4 gate and the inputs of which are connected to each other and to the supply V₃, itself also supplying the output,
b₁ CS.CAR for display characters;
and CS.IMP for the printer;
a₂ and b₂ CSEPRM for EPROM memories.
a₃ and b₃ CSEPRF for an EPROM memory.

FIG. 5 schematically represents the memory assembly associated with the microprocessor μP of FIG. 3 and constituted by a combination of random access memory, preferably read-only read-only memory.

In the embodiment shown in this figure 5, the RAM can be constituted by an integrated circuit of type 6264 and the reprogrammable EPROM read-only memory for three EPROM integrated circuits 1, 2 and 3 which can be respectively: one of type 2716 and two of type 27128.

All these memories are connected to the data bus D₀ to D₇ and to the address bus A′₀ to A′₁₀ (see FIG. 4). The random access memory RAM supplied with regulated voltage V _C (in CS2) receives validation in CS1 CSRAM , in O E and in W E output activation commands EORAM and WERAM write authorization. The PA₄ and PA₅ signals from the µP microprocessor arriving at A₁₁ and A₁₂ ensure the increase addressing (mapping). The reprogrammable read-only memory EPROM1 also supplied with regulated voltage V _C (in V _PP ) receives in O E (exit authorization) control signals CSEPRF . As for the reprogrammable read only memories EPROM2 and 3, they receive in O E CSEPRM validation signals. The signals PB3 also control the memories, the transistor T inserted between the inputs of the two memories, ensuring the signal inversion to pass from one memory to the other; the set of signals PB0 to PB3 ensures the increase in addressing (mapping) of EPROMs 2 and 3.

Such memory arrangements allow in the case of the embodiment of Figure 5 to ensure in RAM 8 kilobytes and in read only memories 2 + 2 x 16 = 34 kilobytes, which can be increase to 42 kilobytes thanks to 8 kilobytes of addressing. In FIG. 6, an exemplary embodiment of the POW power supply unit of FIG. 2 is schematically represented.

Between the ± V _B terminals of the vehicle supply battery is mounted a varistor V which provides protection against possible overvoltages, followed by an inductive coupling system, one element C1 of which is between -V _B and ground, the other C₂ between + V _B and the rest of the power supply.

The block is controlled by the POW.CONT power supply control (figure 2) which acts on a relay R in parallel with a diode D1 when the power block is at rest, the light-emitting diode ELD is supplied; when the block is working, the ELD diode is off. The voltage V _B of the battery is then brought on the one hand directly downstream for the power supplies requiring no special precaution, on the other hand to the assembly which will be described and which supplies the various necessary voltages. A first set of skills tees K1, K2 dampens the operation of the voltage regulator to avoid the effects of unwanted signals.

We will find downstream of the regulator proper REG of the capacities K₃, K₄ which ensure a discharge current for a few tens of microseconds during the cut-off.

Diode D₁ prevents discharges and diode D₂ prevents voltage drops to ground.

It will be noted that if a relay R is used but with double input and output contacts, these diodes can be avoided. The REG regulator consists of an integrated circuit associated with the transistor T1.

The regulated voltage V _C is collected downstream of the capacities K₃, K₄ and by a voltage divider the reference voltage V _ref . A stage constituted around the transistor T2 of the diode D₂ and of the backup battery B _S provides the backup voltage supply V _S. The battery B _S is charged by the associated circuit in which a germanium diode D2 is preferably used to avoid voltage losses. The voltage V _P collected downstream of the capacities K₁, K₂ is a voltage equal to V _B but switched. FIG. 7 represents an exemplary embodiment of a power and stop / start control device (POW.CONT, FIG. 2).

A push-on start-up switch 14 puts this POW.CONT assembly under the battery voltage V _B which controls the relay R of FIG. 6.

The transistor T₃ is temporarily switched on by the push-button switch 14, and permanently by the comparator COMP .; the base voltage of transistor T₃ corresponds to V _B thanks to the set of resistors R₂ forming a voltage divider, with coefficient k associated with a diode D3 and with a capacitance K₅. The collector of transistor T₃ followed by diode D₄ provides the power control POW.CONT. The signals CSCAR taken from the bus described above make it possible to provide maintenance pulses to a monostable assembly of any conventional type such as that organized around the two NON.ET doors 5 and 6, which provide sawtooth signals by discharging the circuit RC that he understands. These signals never rising in principle to the level V _Ref , the comparator remains at the level and ensures the conduction of the transistor T₃.

If maintenance is no longer provided; the comparator stops the conduction of the transistor T₃.

The diodes D₅ and D₆ prevent accidental loss and unloading.

The small circuit organized around the diode D₇ ensures the start-up and makes it possible to inhibit the operation of the comparator COMP as long as the microprocessor is not in a condition to supply the maintenance signals.

These circuits are, as indicated in the figure, supplied with regulated voltage V _C At the output of the comparator, the INHRAM signals are collected inhibiting access to the random access memory during non-operation.

FIG. 8 represents an exemplary embodiment of the voltage loss detector DET (FIG. 2). It receives the battery voltage V _B as it is or switched V _P. It is compared (COMP2) to the reference voltage V _ref , which generates voltage loss signals VL sent to the microprocessor µP if V _B or V _P are less than V _ref . One can optionally give an INH inhibition order. It is also possible at the output of the comparator, after inversion, to obtain an interrupt request signal for the µP microprocessor.

FIG. 9 represents a diagram of an exemplary embodiment of the supply of the light circuits (LIT FIG. 2).

This assembly is supplied with switched voltage V _p and receives the clock signals CLK, B as well as the information on the ambient light on a sensor 17 such as a photoresistor. It must emit a DC voltage V _M towards the DISPCONT display command and high frequency voltages V _A TV ′ towards the DISP display proper (for example of the order of 150 kHz, 4V). It also supplies the lighting for the keyboard 16 taking into account the ambient lighting detected at 17. The DS assembly detects a lighting threshold and the RC assembly ensures a time constant for obtaining ignition and switching off without variation in the event of rapid variation of the light. The display is preferably of the fluorescent type.

This keyboard lighting control circuit 16 is supplied from V _H. The ignition itself is controlled by the transistor T₄, itself controlled from the photo-resistance 17 and associated with the input capacitance K₆ ensuring starting.

The supply V _A , V _{A ′} is obtained by a stage of transistors T5 to T8 coupled to follower transmitters, the base of which is controlled by inverters I₁ to I₆ by phase oppostion signals punctuated by the clock CLK, B; the power supply V _H is obtained thanks to the voltage tripler TR with fast diodes, Schotthy.

Figure 10 shows the display control (DISP, CONT, Figure 2). The information to be displayed comes from the µP microprosser via the BOS, namely the character-controlled signals CSCAR and segments CSSBG , the data signals D₀ to D₇ and of address A₃A₄ as well as those of inhibition INH. This set therefore constitutes the interface between the microprosser µP and the bus on the one hand and the 16-character display of 16 segments each. According to the example represented in FIG. 10, it essentially consists of two integrated locking circuits LTC1 and LTC2 for the SEG segments receiving the data signals D₀ / D₇, the address signals A₃ (for LTC1) and A₄ (for LTC2) and control signals CSSEG as well as the INH inhibition signals. They are also supplied with voltages V _c and V _H and their outputs are connected to the segment inputs SEG of the alphanumeric display of any conventional type. These locks ensure that the design of each character is memorized.

With regard to the characters CAR, the device essentially comprises two decoding registers SHR1 and SHR2 ensuring the sequential inputs of the 16 characters selected. These registers SHR1 and SHR2 receive the control signals CSCAR on their CLK clock inputs and data signals (in cascade) on their In inputs (D₄ on In of SHR1 and O sortie output of SHR1 on In of SHR2). The registers are supplied with voltage V _c . Their outputs O₀ to O₇ of SHRl and O′₀ and O′₁ of SHR2 are connected to the keyboard by diodes. Character selection signals are therefore used to scan the keyboard 9, the LEDs preventing the lighting of 2 characters. The row information L0, L1 is collected on the columns. The outputs O₀ to O₇ and O′₀ to O′₇ of the locks are connected to the character inputs CAR of the display by level LTl and LT2 translation devices supplied with V _C , V _M.

FIG. 11 represents an exemplary embodiment of the printer interface (PRINT CONT, FIG. 2).

This device is essentially constituted by an LTC3 locking circuit receiving from the bus the data signals D₀ to D₇, the address signals A₂, the print control signals CSIMP (on the STR input) and the INH muting signals (on the BLK input). It is supplied with voltage V _c and V _p . The LTC3 lock ensures the direct current supply for driving and braking the MOT motor of the printer; it also assumes by other circuits the supply of id solenoids with needle printing.

The controls are stabilized in voltage which requires a level translation from V _p thanks to the locking, and this by using DT transistors in discrete Darlington NPN mounting.

In the power supply to the motor, the capacity eliminates noise, the diode ensuring "freewheeling" operation. In addition, the LTC3 interlock provides RST DET reset detection and TIM DET time detection. The reset detection gives the information on the position of the "stock removal" (the point on the left corresponds to the start of the line while the time detection is necessary for the information on the operation of the solenoids).

The signal collected at the output S of the LTC3 latch controls the reset detection circuit, the RC circuit introducing a time constant to erase the relay bounces. At the exit from the NAND gate 7, 1 is collected at the start of the line, O when there is no change of state.

As regards the time detection at the output of the NAND gate 8, the signals received are transformed into square signals, to bring them to the flip-flop FF. A resistor and diodes limit the overload at the input of the NAND gate 8.

The FF flip-flop therefore gives information on the rising and falling edges. Q is 0 for a rising edge. The LTC lock 3 emits signals to inhibit the flip-flop complementary to the S signals.

The diodes at the Q output of the FF flip-flop constitute two OR gates giving the interrupt request signals IRQ and ITIMP printer interruption. The scale can be of any suitable type such as the HC74 circuit.

FIG. 12 schematically represents an exemplary embodiment of the local network interface (INT, FIG. 2). This device can be essentially organized around an integrated communication interface circuit, such as the MC 6850 produced by Motorola which is of the MOS type with N channel and silicon doors. This circuit is particularly suitable for cooperating with the microprocessor MC 146805 mentioned above. The role of this device is to ensure communication between the assembly which is the subject of the present invention and the radiocommunication device such as that forming the subject of the above-mentioned French patent application filed on the same day as this.

The interface circuit is connected as follows:
V _cc voltage V _c
E clock signals A
R / ω read / write signals
CS2 signals CSIMP
CS1 voltage V _c
CS0 A1 address signals
RS transmission of address signals A0
D₀ / D₇ data signals (in dividers)
IRQ interrupt request
RQ and IQ output Q of a flip-flop FF2 dividing by two the frequency of the clock signals CLICK
CTS and DCD mass
RTS reset
RD signals on reception (active in low state hence the detection point with hysteresis)
TD transmission with inversion due to multiple transmitters on the local network

This set also transmits the clock signals and allows the O / 1 on / off signals to pass incidentally.

FIG. 13 represents a COMPTH comparator temperature detector mounted between two bridge branches, one of which includes a TH thermistor operating as a sensor. Between two temperature thresholds the output switches at the rate of the clock. Depending on the temperatures, the system therefore goes from state 0 to state 1 and vice versa.

It will be noted that the equipment in accordance with the present invention and which operates in a private network ensures the management of the use of vehicles and in particular of taxis.

Claims (13)

1.- Equipment in a private network for the management of the use of vehicles, intended to be taken on board a vehicle for the collection, storage, processing and remote transmission of data, connected to a transmitter radio receiver through an interface ensuring conversions and upgrades between on the one hand said equipment comprising data processing terminal organized openly around a local bus and including a keyboard, at least one display device and inputs connected to these data sources and to possible peripherals, characterized in that the transmitter-receiver assembly 3 / interface 7 is connected directly to at least one terminal 1 and to the optional peripherals 8 by a set of connections 2 consisting of lines, some of which transmit on / off information (1.0), RESET reset signals, CLK clock, RX data reception and data transmission signals. 2.- Equipment according to claim 1, characterized in that among the lines constituting the connections (2), at least that of receiving RX data is connected to the terminal (1) by an INT interface device with open collectors (REC / RD). 3.- Equipment according to one of claims 1 or 2, characterized in that the terminal (1) essentially comprises a microprocessor µP including memories and bus and transmitting to the interface INT mounted at the input of the set of connections (2) in addition to the data transmitted by the BUS bus, the CLK clock pulses. 4.- Equipment according to claim 3, characterized in that the microprocessor µP provides common management of the display keyboard by being connected to a display control device DISP CONT by the BUS bus and by sending the INH signals display inhibition to avoid remanence from one instant display to the next, the µP microprocessor receiving from the DISP CONT display control device the KB signals from the keyboard (9) which, with the microprocessor is connected to the DISP. display 5.- Equipment according to one of claims 1 to 4, characterized in that a device for supplying the light signals LIT connected to the microprocessor µP, the DISP display and the keyboard lighting system (16) is provided with a device for adjusting the lighting of the keyboard (16) and of the fluorescent display DISP controlled by a photoresist ambient light sensor (17) timed by the clock signals CLK. 6.- Device according to one of claims 1 to 5, characterized in that a CLK clock sends its signals to the microprocessor µP, to the interface INT with the control lines (2) to the display command DISP -CONT and the LIT lighting supply device. 7.- Device according to one of claims 1 to 6, characterized in that the microprocessor µP is connected to a TEMP temperature control device of the enclosure. 8.- Device according to one of claims 1 to 7, characterized in that the microprocessor µP is connected to a device for indicating occupation / vacancy OC. 9.- Device according to one of claims 1 to 8, characterized in that all of the constituents are supplied by a POW supply device itself connected to the general on-board power supply V _B. 10.- Device according to claim 9, characterized in that a detector DET of general power loss V _B informs the microprocessor µP of any failure which by means of the power control POW CONT orders the device d POW power supply to switch to the backup battery supply for data backup and keeping the equipment in a consistent state. 11.- Device according to one of claims 1 to 10, characterized in that the microprocessor µP is connected to a print command PRINT CONT itself linked to a printer, the microprocessor µP sending to the print command , in addition to the data transmitted by the BUS bus, the INH inhibition signals and receiving the printing interrupt signals. 12.- Device according to one of claims 1 to 11, characterized in that it is on board a vehicle equipped with a radio transmitter belonging to a set of vehicles communicating with at least one central station. 13.- Device according to claim 12, characterized in that it is applied to vehicles of the taxi type.

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