DE69941143D1 - Verfahren zum Erzeugen von differentiellen drei Zuständen und differentieller Dreizustandsschaltung - Google Patents

Verfahren zum Erzeugen von differentiellen drei Zuständen und differentieller Dreizustandsschaltung

Info

Publication number
DE69941143D1
DE69941143D1 DE69941143T DE69941143T DE69941143D1 DE 69941143 D1 DE69941143 D1 DE 69941143D1 DE 69941143 T DE69941143 T DE 69941143T DE 69941143 T DE69941143 T DE 69941143T DE 69941143 D1 DE69941143 D1 DE 69941143D1
Authority
DE
Germany
Prior art keywords
differential
states
generating
tristate circuit
tristate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69941143T
Other languages
English (en)
Inventor
Seiichi Watarai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Application granted granted Critical
Publication of DE69941143D1 publication Critical patent/DE69941143D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
DE69941143T 1998-12-08 1999-12-08 Verfahren zum Erzeugen von differentiellen drei Zuständen und differentieller Dreizustandsschaltung Expired - Lifetime DE69941143D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34920498A JP3171175B2 (ja) 1998-12-08 1998-12-08 差動トライステート発生方法及び差動トライステート回路

Publications (1)

Publication Number Publication Date
DE69941143D1 true DE69941143D1 (de) 2009-09-03

Family

ID=18402186

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69941143T Expired - Lifetime DE69941143D1 (de) 1998-12-08 1999-12-08 Verfahren zum Erzeugen von differentiellen drei Zuständen und differentieller Dreizustandsschaltung

Country Status (5)

Country Link
US (1) US6316964B1 (de)
EP (1) EP1011197B1 (de)
JP (1) JP3171175B2 (de)
KR (1) KR100324987B1 (de)
DE (1) DE69941143D1 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100305312B1 (ko) * 1998-06-15 2001-11-30 윤종용 인터페이스장치
JP4627928B2 (ja) * 2001-06-28 2011-02-09 ルネサスエレクトロニクス株式会社 半導体集積回路
US7030663B2 (en) 2001-09-04 2006-04-18 Freescale Semiconductor Method and apparatus for generating narrow pulse width monocycles
US6552582B1 (en) * 2001-09-27 2003-04-22 Applied Micro Circuits Corporation Source follower for low voltage differential signaling
JP3967321B2 (ja) * 2001-12-07 2007-08-29 ザインエレクトロニクス株式会社 半導体集積回路
US6864707B2 (en) * 2002-09-30 2005-03-08 Micrel, Incorporated Universal input apparatus
JP3792207B2 (ja) * 2003-03-25 2006-07-05 沖電気工業株式会社 電流駆動型差動ドライバ及び電流駆動型差動ドライバを用いたデータ送信方法
WO2004086603A1 (en) * 2003-03-28 2004-10-07 Koninklijke Philips Electronics N.V. Frequency detector system with tri-state frequency control signal
JP3949636B2 (ja) 2003-09-30 2007-07-25 Ｎｅｃエレクトロニクス株式会社 Ｌｖｄｓドライバー回路
US7209333B2 (en) * 2004-02-27 2007-04-24 Broadcom Corporation Apparatus and method for over-voltage, under-voltage and over-current stress protection for transceiver input and output circuitry
JPWO2006038346A1 (ja) 2004-10-01 2008-05-15 松下電器産業株式会社 信号出力回路
JP4509737B2 (ja) * 2004-10-28 2010-07-21 株式会社東芝 差動信号生成回路および差動信号送信回路
JP4008459B2 (ja) * 2005-06-10 2007-11-14 日本テキサス・インスツルメンツ株式会社 制御信号供給回路及び信号出力回路
BRPI0520549B1 (pt) * 2005-09-19 2019-08-27 Interdigital Madison Patent Holdings impedância adaptativa para saída de fonte de alimentação lnb em dependência de modo/protocolo de comunicação
JP4384207B2 (ja) * 2007-06-29 2009-12-16 株式会社東芝 半導体集積回路
TWI343703B (en) * 2007-12-21 2011-06-11 Novatek Microelectronics Corp Low power differential signaling transmitter
CN101483425B (zh) * 2008-01-09 2013-05-01 联咏科技股份有限公司 低功率差动信号传输装置
US8755447B2 (en) * 2010-12-22 2014-06-17 Shure Acquisition Holdings, Inc. Wireless audio equipment using a quadrature modulation system
JP5698624B2 (ja) * 2011-08-22 2015-04-08 学校法人慶應義塾 小振幅差動パルス送信回路
US9553569B1 (en) * 2015-02-04 2017-01-24 Inphi Corporation Low power buffer with dynamic gain control
US9432000B1 (en) * 2015-02-04 2016-08-30 Inphi Corporation Low power buffer with gain boost
JP7238553B2 (ja) * 2019-04-02 2023-03-14 セイコーエプソン株式会社 Ｌｖｄｓドライバー回路、集積回路装置、発振器、電子機器及び移動体
US11750166B2 (en) 2021-01-13 2023-09-05 Marvell Asia Pte. Ltd. Method and device for high bandwidth receiver for high baud-rate communications
US11309904B1 (en) 2021-02-24 2022-04-19 Marvell Asia Pte Ltd. Method and device for synchronization of large-scale systems with multiple time interleaving sub-systems

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2295643A1 (fr) 1974-12-18 1976-07-16 Labo Cent Telecommunicat Circuit de commande ameliore d'un dispositif de commutation
JP2891386B2 (ja) * 1991-02-28 1999-05-17 株式会社アドバンテスト ドライバ回路
US5285477A (en) * 1991-12-18 1994-02-08 At&T Bell Laboratories Balanced line driver for local area networks or the like
US5466325A (en) 1993-06-02 1995-11-14 Nitto Denko Corporation Resist removing method, and curable pressure-sensitive adhesive, adhesive sheets and apparatus used for the method
US5418478A (en) * 1993-07-30 1995-05-23 Apple Computer, Inc. CMOS differential twisted-pair driver
US5448311A (en) * 1994-08-22 1995-09-05 Thomson Consumer Electronics, Inc. Tri-state video differential driver
US6051990A (en) * 1997-11-13 2000-04-18 Quantum Corporation Asymmetric current mode driver for differential transmission lines
US5986473A (en) * 1997-12-30 1999-11-16 Intel Corporation Differential, mixed swing, tristate driver circuit for high performance and low power on-chip interconnects

Also Published As

Publication number Publication date
JP2000174605A (ja) 2000-06-23
EP1011197B1 (de) 2009-07-22
EP1011197A1 (de) 2000-06-21
KR100324987B1 (ko) 2002-02-20
JP3171175B2 (ja) 2001-05-28
US6316964B1 (en) 2001-11-13
KR20000052423A (ko) 2000-08-25

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