DE69918219D1 - Methode zur Verbesserung der Stöpsel-Leitfähigkeit - Google Patents

Methode zur Verbesserung der Stöpsel-Leitfähigkeit

Info

Publication number
DE69918219D1
DE69918219D1 DE69918219T DE69918219T DE69918219D1 DE 69918219 D1 DE69918219 D1 DE 69918219D1 DE 69918219 T DE69918219 T DE 69918219T DE 69918219 T DE69918219 T DE 69918219T DE 69918219 D1 DE69918219 D1 DE 69918219D1
Authority
DE
Germany
Prior art keywords
improve plug
conductivity
plug conductivity
improve
plug
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69918219T
Other languages
English (en)
Other versions
DE69918219T2 (de
Inventor
Hua Shen
Joachim Hoepfner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE69918219D1 publication Critical patent/DE69918219D1/de
Publication of DE69918219T2 publication Critical patent/DE69918219T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors with potential-jump barrier or surface barrier
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
DE69918219T 1998-05-08 1999-04-12 Methode zur Verbesserung der Stöpsel-Leitfähigkeit Expired - Lifetime DE69918219T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US74882 1998-05-08
US09/074,882 US6046059A (en) 1998-05-08 1998-05-08 Method of forming stack capacitor with improved plug conductivity

Publications (2)

Publication Number Publication Date
DE69918219D1 true DE69918219D1 (de) 2004-07-29
DE69918219T2 DE69918219T2 (de) 2005-07-28

Family

ID=22122235

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69918219T Expired - Lifetime DE69918219T2 (de) 1998-05-08 1999-04-12 Methode zur Verbesserung der Stöpsel-Leitfähigkeit

Country Status (7)

Country Link
US (2) US6046059A (de)
EP (1) EP0955679B1 (de)
JP (1) JP2000031418A (de)
KR (1) KR100372404B1 (de)
CN (1) CN1235368A (de)
DE (1) DE69918219T2 (de)
TW (1) TW410429B (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6174799B1 (en) * 1999-01-05 2001-01-16 Advanced Micro Devices, Inc. Graded compound seed layers for semiconductors
US6214661B1 (en) * 2000-01-21 2001-04-10 Infineon Technologoies North America Corp. Method to prevent oxygen out-diffusion from BSTO containing micro-electronic device
US6624076B1 (en) * 2000-01-21 2003-09-23 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
US6358855B1 (en) 2000-06-16 2002-03-19 Infineon Technologies Ag Clean method for recessed conductive barriers
US6297123B1 (en) * 2000-11-29 2001-10-02 United Microelectronics Corp. Method of preventing neck oxidation of a storage node
US6432725B1 (en) 2001-09-28 2002-08-13 Infineon Technologies Ag Methods for crystallizing metallic oxide dielectric films at low temperature
US6515325B1 (en) * 2002-03-06 2003-02-04 Micron Technology, Inc. Nanotube semiconductor devices and methods for making the same
US7231839B2 (en) * 2003-08-11 2007-06-19 The Board Of Trustees Of The Leland Stanford Junior University Electroosmotic micropumps with applications to fluid dispensing and field sampling
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5381302A (en) * 1993-04-02 1995-01-10 Micron Semiconductor, Inc. Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same
US5504041A (en) * 1994-08-01 1996-04-02 Texas Instruments Incorporated Conductive exotic-nitride barrier layer for high-dielectric-constant materials
US6093615A (en) * 1994-08-15 2000-07-25 Micron Technology, Inc. Method of fabricating a contact structure having a composite barrier layer between a platinum layer and a polysilicon plug
JPH0945877A (ja) * 1995-07-31 1997-02-14 Matsushita Electron Corp 容量素子の製造方法
JP3388089B2 (ja) * 1996-04-25 2003-03-17 シャープ株式会社 不揮発性半導体メモリ素子の製造方法
KR100226772B1 (ko) * 1996-09-25 1999-10-15 김영환 반도체 메모리 장치 및 그 제조방법
KR100445059B1 (ko) * 1997-06-30 2004-11-16 주식회사 하이닉스반도체 반도체장치의캐패시터제조방법

Also Published As

Publication number Publication date
DE69918219T2 (de) 2005-07-28
KR19990088068A (ko) 1999-12-27
EP0955679A3 (de) 2002-01-16
KR100372404B1 (ko) 2003-02-17
EP0955679A2 (de) 1999-11-10
TW410429B (en) 2000-11-01
US6046059A (en) 2000-04-04
JP2000031418A (ja) 2000-01-28
CN1235368A (zh) 1999-11-17
US6313495B1 (en) 2001-11-06
EP0955679B1 (de) 2004-06-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: QIMONDA AG, 81739 MUENCHEN, DE