DE69841282D1 - egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem - Google Patents

egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem

Info

Publication number
DE69841282D1
DE69841282D1 DE69841282T DE69841282T DE69841282D1 DE 69841282 D1 DE69841282 D1 DE 69841282D1 DE 69841282 T DE69841282 T DE 69841282T DE 69841282 T DE69841282 T DE 69841282T DE 69841282 D1 DE69841282 D1 DE 69841282D1
Authority
DE
Germany
Prior art keywords
egrierten
application
signal transmission
transmission system
semiconductor circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69841282T
Other languages
English (en)
Inventor
Hirotaka Tamura
Hisakatsu Araki
Shigetoshi Wakayama
Kohtaroh Gotoh
Junji Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP15542997A external-priority patent/JP3961072B2/ja
Priority claimed from JP07940198A external-priority patent/JP4063392B2/ja
Priority claimed from JP13561098A external-priority patent/JP3955150B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69841282D1 publication Critical patent/DE69841282D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222Clock generating, synchronizing or distributing circuits within memory device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/18Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0016Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/002Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
    • H04L7/0025Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of clock signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019Variable delay
    • H03K2005/00026Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter
    • H03K2005/00052Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter by mixing the outputs of fixed delayed signals with each other or with the input signal
DE69841282T 1997-06-12 1998-06-10 egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem Expired - Lifetime DE69841282D1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP15542997A JP3961072B2 (ja) 1997-06-12 1997-06-12 半導体装置及びそのタイミング調整方法
JP225498 1998-01-08
JP07940198A JP4063392B2 (ja) 1998-03-26 1998-03-26 信号伝送システム
JP13561098A JP3955150B2 (ja) 1998-01-08 1998-05-18 位相インターポレータ、タイミング信号発生回路、および、該タイミング信号発生回路が適用される半導体集積回路装置並びに半導体集積回路システム

Publications (1)

Publication Number Publication Date
DE69841282D1 true DE69841282D1 (de) 2009-12-17

Family

ID=27453587

Family Applications (4)

Application Number Title Priority Date Filing Date
DE69837689T Expired - Lifetime DE69837689T2 (de) 1997-06-12 1998-06-10 Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69841282T Expired - Lifetime DE69841282D1 (de) 1997-06-12 1998-06-10 egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69840135T Expired - Lifetime DE69840135D1 (de) 1997-06-12 1998-06-10 egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69833467T Expired - Lifetime DE69833467T2 (de) 1997-06-12 1998-06-10 Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE69837689T Expired - Lifetime DE69837689T2 (de) 1997-06-12 1998-06-10 Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem

Family Applications After (2)

Application Number Title Priority Date Filing Date
DE69840135T Expired - Lifetime DE69840135D1 (de) 1997-06-12 1998-06-10 egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69833467T Expired - Lifetime DE69833467T2 (de) 1997-06-12 1998-06-10 Zeitgeberschaltung, Vorrichtung und System für integrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem

Country Status (5)

Country Link
US (4) US6247138B1 (de)
EP (4) EP1492121B1 (de)
KR (4) KR100313820B1 (de)
DE (4) DE69837689T2 (de)
TW (1) TW387065B (de)

Families Citing this family (265)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5978379A (en) 1997-01-23 1999-11-02 Gadzoox Networks, Inc. Fiber channel learning bridge, learning half bridge, and protocol
JP4197755B2 (ja) 1997-11-19 2008-12-17 富士通株式会社 信号伝送システム、該信号伝送システムのレシーバ回路、および、該信号伝送システムが適用される半導体記憶装置
EP0953982B1 (de) * 1998-04-28 2008-08-13 Matsushita Electric Industrial Co., Ltd. Eingangsschaltung
TW440767B (en) * 1998-06-02 2001-06-16 Fujitsu Ltd Method of and apparatus for correctly transmitting signals at high speed without waveform distortion
US7430171B2 (en) 1998-11-19 2008-09-30 Broadcom Corporation Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
US6285216B1 (en) * 1998-12-17 2001-09-04 United Microelectronics Corporation High speed output enable path and method for an integrated circuit device
US6636993B1 (en) * 1999-02-12 2003-10-21 Fujitsu Limited System and method for automatic deskew across a high speed, parallel interconnection
JP3789247B2 (ja) * 1999-02-26 2006-06-21 Necエレクトロニクス株式会社 クロック周期検知回路
US6111796A (en) * 1999-03-01 2000-08-29 Motorola, Inc. Programmable delay control for sense amplifiers in a memory
US6654897B1 (en) * 1999-03-05 2003-11-25 International Business Machines Corporation Dynamic wave-pipelined interface apparatus and methods therefor
US6928128B1 (en) * 1999-05-03 2005-08-09 Rambus Inc. Clock alignment circuit having a self regulating voltage supply
US6424194B1 (en) 1999-06-28 2002-07-23 Broadcom Corporation Current-controlled CMOS logic family
JP2001156255A (ja) * 1999-11-25 2001-06-08 Oki Electric Ind Co Ltd 半導体集積回路
TW483255B (en) * 1999-11-26 2002-04-11 Fujitsu Ltd Phase-combining circuit and timing signal generator circuit for carrying out a high-speed signal transmission
US6961363B1 (en) * 1999-12-02 2005-11-01 International Business Machines Corporation Frequency look-ahead and link state history based scheduling in indoor wireless pico-cellular networks
US7315599B1 (en) * 1999-12-29 2008-01-01 Intel Corporation Skew correction circuit
IT1311463B1 (it) * 1999-12-31 2002-03-12 Cit Alcatel Metodo di recupero del segnale d'orologio in un sistema ditelecomunicazioni e relativo circuito.
JP4301680B2 (ja) * 2000-02-29 2009-07-22 株式会社ルネサステクノロジ 半導体集積回路装置
JP3495311B2 (ja) * 2000-03-24 2004-02-09 Necエレクトロニクス株式会社 クロック制御回路
AU2001257348A1 (en) * 2000-04-28 2001-11-12 Broadcom Corporation Methods and systems for adaptive receiver equalization
US6658580B1 (en) * 2000-05-20 2003-12-02 Equipe Communications Corporation Redundant, synchronous central timing systems with constant master voltage controls and variable slave voltage controls
JP3667196B2 (ja) * 2000-05-26 2005-07-06 Necエレクトロニクス株式会社 タイミング差分割回路
US7006635B2 (en) * 2000-08-31 2006-02-28 The United States Of America As Represented By The Secretary Of The Navy Method and apparatus for clock synchronization using quantum mechanical non-locality effects
US6889272B1 (en) * 2000-11-03 2005-05-03 Applied Micro Circuits Corporation Parallel data bus with bit position encoded on the clock wire
WO2002047063A1 (fr) * 2000-12-07 2002-06-13 Hitachi, Ltd. Circuit integre a semiconducteur, dispositif d'attaque de cristaux liquides et systeme d'affichage a cristaux liquides
JP4592179B2 (ja) 2000-12-19 2010-12-01 ルネサスエレクトロニクス株式会社 ディレイロックドループ、当該ディレイロックドループを含む半導体装置およびクロック同期により動作するシステムのための制御方法
DE10064929A1 (de) * 2000-12-23 2002-07-04 Alcatel Sa Verfahren und Kompensationsmodul zur Phasenkompensation von Taktsignalen
US6304119B1 (en) * 2000-12-27 2001-10-16 Chroma Ate Inc. Timing generating apparatus with self-calibrating capability
US7050512B1 (en) * 2001-01-08 2006-05-23 Pixelworks, Inc. Receiver architecture
JP3558599B2 (ja) * 2001-02-02 2004-08-25 日本電気株式会社 データ伝送システム及びデータ伝送方法
US6675272B2 (en) 2001-04-24 2004-01-06 Rambus Inc. Method and apparatus for coordinating memory operations among diversely-located memory components
US8391039B2 (en) 2001-04-24 2013-03-05 Rambus Inc. Memory module with termination component
WO2002095943A2 (en) * 2001-05-21 2002-11-28 Vasily Grigorievich Atyunin Programmable self-calibrating vernier and method
JP3918145B2 (ja) * 2001-05-21 2007-05-23 株式会社ルネサステクノロジ メモリコントローラ
US7194059B2 (en) * 2001-08-17 2007-03-20 Zarlink Semiconductor, Inc. Method and apparatus for skip-free retiming transmission of digital information
WO2003021499A1 (en) * 2001-08-29 2003-03-13 Morphics Technology Inc. Integrated circuit chip design
US6504438B1 (en) * 2001-09-17 2003-01-07 Rambus, Inc. Dual loop phase lock loops using dual voltage supply regulators
KR100487637B1 (ko) * 2001-09-20 2005-05-03 주식회사 하이닉스반도체 디지털 지연 라인
JP4308461B2 (ja) * 2001-10-05 2009-08-05 ラムバス・インコーポレーテッド 半導体記憶装置
US6930524B2 (en) * 2001-10-09 2005-08-16 Micron Technology, Inc. Dual-phase delay-locked loop circuit and method
US6920540B2 (en) * 2001-10-22 2005-07-19 Rambus Inc. Timing calibration apparatus and method for a memory device signaling system
US6759911B2 (en) 2001-11-19 2004-07-06 Mcron Technology, Inc. Delay-locked loop circuit and method using a ring oscillator and counter-based delay
US7203259B2 (en) * 2002-01-02 2007-04-10 Intel Corporation Phase interpolator
US7103126B2 (en) * 2002-01-17 2006-09-05 Micron Technology, Inc. Method and circuit for adjusting the timing of output data based on the current and future states of the output data
US20030135675A1 (en) * 2002-01-17 2003-07-17 Koninklijke Philips Electronics N.V. Configurable synchronous or asynchronous bus interface
JP4107847B2 (ja) * 2002-02-01 2008-06-25 富士通株式会社 タイミング信号発生回路および受信回路
AU2002230357A1 (en) * 2002-02-14 2003-09-04 Telefonaktiebolaget Lm Ericsson (Publ) Seamless clock
GB2385728B (en) * 2002-02-26 2006-07-12 Fujitsu Ltd Clock recovery circuitry
US7035368B2 (en) * 2002-03-18 2006-04-25 Texas Instruments Incorporated High speed parallel link receiver
US6642760B1 (en) * 2002-03-29 2003-11-04 Rambus, Inc. Apparatus and method for a digital delay locked loop
US6621316B1 (en) 2002-06-20 2003-09-16 Micron Technology, Inc. Synchronous mirror delay (SMD) circuit and method including a counter and reduced size bi-directional delay line
US7047384B2 (en) * 2002-06-27 2006-05-16 Intel Corporation Method and apparatus for dynamic timing of memory interface signals
US7085993B2 (en) * 2002-07-29 2006-08-01 International Business Machine Corporation System and method for correcting timing signals in integrated circuits
US6727740B2 (en) 2002-08-29 2004-04-27 Micron Technology, Inc. Synchronous mirror delay (SMD) circuit and method including a ring oscillator for timing coarse and fine delay intervals
EP1394972B1 (de) * 2002-09-02 2006-03-01 STMicroelectronics S.r.l. Hochgeschwindigkeitschnittstelle für Funkanlagen
US7123675B2 (en) * 2002-09-25 2006-10-17 Lucent Technologies Inc. Clock, data and time recovery using bit-resolved timing registers
JP2004127147A (ja) * 2002-10-07 2004-04-22 Hitachi Ltd デスキュー回路およびそれを用いたディスクアレイ制御装置
WO2004046943A1 (ja) * 2002-11-19 2004-06-03 Fujitsu Limited 信号処理回路
US7356720B1 (en) * 2003-01-30 2008-04-08 Juniper Networks, Inc. Dynamic programmable delay selection circuit and method
US6937076B2 (en) * 2003-06-11 2005-08-30 Micron Technology, Inc. Clock synchronizing apparatus and method using frequency dependent variable delay
KR100583951B1 (ko) * 2003-07-11 2006-05-26 삼성전자주식회사 메모리 시스템 및 이 시스템의 타이밍 조절 방법
DE10331829B4 (de) * 2003-07-14 2009-04-16 Qimonda Ag Verfahren und Vorrichtung zur Erzeugung einer Referenzspannung
US6930932B2 (en) * 2003-08-27 2005-08-16 Hewlett-Packard Development Company, L.P. Data signal reception latch control using clock aligned relative to strobe signal
JP4100300B2 (ja) * 2003-09-02 2008-06-11 セイコーエプソン株式会社 信号出力調整回路及び表示ドライバ
JP4632652B2 (ja) * 2003-10-10 2011-02-16 日本電気株式会社 量子暗号鍵配布システム及びそれに用いる同期方法
KR100512940B1 (ko) * 2003-10-27 2005-09-07 삼성전자주식회사 데이터 전송 시스템 및 방법
JP4237038B2 (ja) * 2003-12-01 2009-03-11 エルピーダメモリ株式会社 半導体集積回路装置
US6958634B2 (en) * 2003-12-24 2005-10-25 Intel Corporation Programmable direct interpolating delay locked loop
US7310751B2 (en) * 2004-02-20 2007-12-18 Hewlett-Packard Development Company, L.P. Timeout event trigger generation
JP2005244479A (ja) * 2004-02-25 2005-09-08 Fujitsu Ltd 伝送装置
JP3982517B2 (ja) * 2004-05-12 2007-09-26 日本電気株式会社 データ伝送システム、制御装置及びその方法
KR100608365B1 (ko) * 2004-05-17 2006-08-08 주식회사 하이닉스반도체 메모리 장치의 내부 제어 신호를 측정하는 방법 및 장치
GB0413071D0 (en) 2004-06-12 2004-07-14 Texas Instruments Ltd Triangulating phase interpolator
US7043392B2 (en) * 2004-06-16 2006-05-09 Intel Corporation Interpolator testing system
JP4291225B2 (ja) * 2004-06-30 2009-07-08 富士通株式会社 パラレルデータを受信する装置および方法
DE102004032547A1 (de) * 2004-07-06 2006-02-02 Atmel Germany Gmbh Transponder mit einer Taktversorgungseinheit
US7149145B2 (en) * 2004-07-19 2006-12-12 Micron Technology, Inc. Delay stage-interweaved analog DLL/PLL
JP4419067B2 (ja) * 2004-07-26 2010-02-24 株式会社日立製作所 ディジタルインターフェースを有する半導体装置、メモリ素子及びメモリモジュール
US7301831B2 (en) 2004-09-15 2007-11-27 Rambus Inc. Memory systems with variable delays for write data signals
US7173877B2 (en) * 2004-09-30 2007-02-06 Infineon Technologies Ag Memory system with two clock lines and a memory device
EP1643644B1 (de) * 2004-09-30 2017-07-12 Infineon Technologies AG Verzögerungsschaltung mit akkurater Zeit-Frequenz-Wandlung
US7130226B2 (en) * 2005-02-09 2006-10-31 Micron Technology, Inc. Clock generating circuit with multiple modes of operation
US7412618B2 (en) * 2005-02-11 2008-08-12 International Business Machines Corporation Combined alignment scrambler function for elastic interface
US7461287B2 (en) * 2005-02-11 2008-12-02 International Business Machines Corporation Elastic interface de-skew mechanism
US7583772B2 (en) * 2005-02-22 2009-09-01 Broadcom Corporation System for shifting data bits multiple times per clock cycle
JP2006260190A (ja) * 2005-03-17 2006-09-28 Fujitsu Ltd マージンレス判定回路
JP2006295668A (ja) * 2005-04-13 2006-10-26 Matsushita Electric Ind Co Ltd 信号発生装置および方法ならびに半導体集積回路システム
EP1878116A4 (de) * 2005-04-18 2010-04-07 Agency Science Tech & Res Zeitverzögerungsvorrichtung
US20060245473A1 (en) * 2005-04-28 2006-11-02 Cheng Roger K Integrating receivers for source synchronous protocol
US7602859B2 (en) * 2005-04-28 2009-10-13 Intel Corporation Calibrating integrating receivers for source synchronous protocol
KR100679261B1 (ko) * 2005-05-10 2007-02-05 삼성전자주식회사 위상 인터폴레이션 회로 및 그에 따른 위상 인터폴레이션신호의 발생방법
KR100615700B1 (ko) 2005-08-23 2006-08-28 삼성전자주식회사 메모리 제어장치 및 그의 메모리 제어방법
US7366966B2 (en) * 2005-10-11 2008-04-29 Micron Technology, Inc. System and method for varying test signal durations and assert times for testing memory devices
JP4955250B2 (ja) 2005-10-14 2012-06-20 ルネサスエレクトロニクス株式会社 半導体装置及びそのテスト方法
KR100672033B1 (ko) * 2005-10-14 2007-01-19 삼성전자주식회사 두 개의 입력 기준 클럭을 가지는 지연동기루프회로, 이를포함하는 클럭 신호 발생 회로 및 클럭 신호 발생 방법
JP4751178B2 (ja) * 2005-10-27 2011-08-17 エルピーダメモリ株式会社 同期型半導体装置
US7379382B2 (en) * 2005-10-28 2008-05-27 Micron Technology, Inc. System and method for controlling timing of output signals
US7614737B2 (en) * 2005-12-16 2009-11-10 Lexmark International Inc. Method for identifying an installed cartridge
US7375558B2 (en) * 2005-12-21 2008-05-20 Integrated Device Technology, Inc. Method and apparatus for pre-clocking
KR100759786B1 (ko) * 2006-02-01 2007-09-20 삼성전자주식회사 반도체 장치의 지연동기루프 회로 및 지연동기루프제어방법
FR2901930B1 (fr) * 2006-05-31 2008-09-05 Valeo Equip Electr Moteur Procede et dispositif de generation de signaux binaires dephases et leur utilisation
KR100809690B1 (ko) * 2006-07-14 2008-03-07 삼성전자주식회사 저속 테스트 동작이 가능한 반도체 메모리 장치 및 반도체메모리 장치의 테스트 방법
US7908528B1 (en) * 2006-10-09 2011-03-15 Altera Corporation Phase-detector-less method and apparatus for minimizing skew between bonded channel groups
US20080084955A1 (en) * 2006-10-10 2008-04-10 Wei-Zen Chen Fast-locked clock and data recovery circuit and the method thereof
US7593273B2 (en) 2006-11-06 2009-09-22 Altera Corporation Read-leveling implementations for DDR3 applications on an FPGA
KR100801032B1 (ko) * 2006-11-15 2008-02-04 삼성전자주식회사 비휘발성 반도체 메모리 장치의 입력회로 및 비휘발성반도체 메모리 장치의 데이터 입력방법
JP4968671B2 (ja) * 2006-11-27 2012-07-04 Nltテクノロジー株式会社 半導体回路、走査回路、及びそれを用いた表示装置
JP2008140821A (ja) * 2006-11-30 2008-06-19 Matsushita Electric Ind Co Ltd 半導体装置および半導体装置の設計方法
GB2444745B (en) * 2006-12-13 2011-08-24 Advanced Risc Mach Ltd Data transfer between a master and slave
KR100855980B1 (ko) * 2007-02-16 2008-09-02 삼성전자주식회사 쉬프터와 가산기를 이용하여 지연 시간을 조절하는 지연고정 루프 및 클럭 지연 방법
JP4357538B2 (ja) * 2007-03-07 2009-11-04 株式会社日立製作所 半導体集積回路装置
US7429944B1 (en) * 2007-03-20 2008-09-30 Analog Devices, Inc. Converter systems having reduced-jitter, selectively-skewed interleaved clocks
JP2008251070A (ja) * 2007-03-29 2008-10-16 Hitachi Ltd 半導体記憶装置
EP1976105B1 (de) * 2007-03-30 2011-09-21 Alstom Technology Ltd Steuersequenz für einen Aktivgenerator
KR100892640B1 (ko) * 2007-05-10 2009-04-09 주식회사 하이닉스반도체 반도체 집적 회로
JP4657252B2 (ja) * 2007-06-04 2011-03-23 三洋電機株式会社 チャージポンプ回路及びスライスレベルコントロール回路
US8615205B2 (en) * 2007-12-18 2013-12-24 Qualcomm Incorporated I-Q mismatch calibration and method
GB0807625D0 (en) * 2008-04-25 2008-06-04 Glonav Ltd Method and system for detecting timing characteristics in a communications system
US7728638B2 (en) * 2008-04-25 2010-06-01 Qimonda North America Corp. Electronic system that adjusts DLL lock state acquisition time
US8970272B2 (en) * 2008-05-15 2015-03-03 Qualcomm Incorporated High-speed low-power latches
US8521979B2 (en) * 2008-05-29 2013-08-27 Micron Technology, Inc. Memory systems and methods for controlling the timing of receiving read data
US7979757B2 (en) 2008-06-03 2011-07-12 Micron Technology, Inc. Method and apparatus for testing high capacity/high bandwidth memory devices
US8041537B2 (en) * 2008-06-27 2011-10-18 International Business Machines Corporation Clock duty cycle measurement with charge pump without using reference clock calibration
US7855931B2 (en) 2008-07-21 2010-12-21 Micron Technology, Inc. Memory system and method using stacked memory device dice, and system using the memory system
US8756486B2 (en) 2008-07-02 2014-06-17 Micron Technology, Inc. Method and apparatus for repairing high capacity/high bandwidth memory devices
US8289760B2 (en) 2008-07-02 2012-10-16 Micron Technology, Inc. Multi-mode memory device and method having stacked memory dice, a logic die and a command processing circuit and operating in direct and indirect modes
US7940202B1 (en) 2008-07-31 2011-05-10 Cypress Semiconductor Corporation Clocking analog components operating in a digital system
US8127204B2 (en) 2008-08-15 2012-02-28 Micron Technology, Inc. Memory system and method using a memory device die stacked with a logic die using data encoding, and system using the memory system
US8510589B2 (en) * 2008-08-29 2013-08-13 Intel Mobile Communications GmbH Apparatus and method using first and second clocks
KR20100037427A (ko) * 2008-10-01 2010-04-09 삼성전자주식회사 Ac 커플링 위상 보간기 및 이 장치를 이용하는 지연 고정루프
JP5284756B2 (ja) * 2008-10-31 2013-09-11 凸版印刷株式会社 電源回路及び電源安定化方法
US8712357B2 (en) * 2008-11-13 2014-04-29 Qualcomm Incorporated LO generation with deskewed input oscillator signal
US8718574B2 (en) 2008-11-25 2014-05-06 Qualcomm Incorporated Duty cycle adjustment for a local oscillator signal
KR100992004B1 (ko) * 2008-12-12 2010-11-04 주식회사 하이닉스반도체 반도체 메모리 장치의 도메인 크로싱 회로
JP5353277B2 (ja) * 2009-02-06 2013-11-27 日本電気株式会社 ストリーム信号伝送装置及び伝送方法
US8850256B2 (en) * 2009-05-18 2014-09-30 Nec Corporation Communication circuit and communication method
US8063683B2 (en) * 2009-06-08 2011-11-22 Integrated Device Technology, Inc. Low power clock and data recovery phase interpolator
US8386829B2 (en) * 2009-06-17 2013-02-26 Macronix International Co., Ltd. Automatic internal trimming calibration method to compensate process variation
US8847638B2 (en) * 2009-07-02 2014-09-30 Qualcomm Incorporated High speed divide-by-two circuit
US8791740B2 (en) 2009-07-16 2014-07-29 Qualcomm Incorporated Systems and methods for reducing average current consumption in a local oscillator path
US7994837B1 (en) * 2009-08-07 2011-08-09 Altera Corporation Techniques for phase interpolation
JP2011045220A (ja) * 2009-08-24 2011-03-03 Panasonic Corp 端末装置及び供給電流制御方法
US7944300B2 (en) * 2009-08-25 2011-05-17 Micron Technology, Inc. Bias circuit and amplifier providing constant output current for a range of common mode inputs
US8289061B2 (en) * 2009-09-29 2012-10-16 Integrated Device Technology, Inc. Technique to reduce clock recovery amplitude modulation in high-speed serial transceiver
JP4843704B2 (ja) * 2009-09-30 2011-12-21 日本電波工業株式会社 周波数シンセサイザ
US8832336B2 (en) * 2010-01-30 2014-09-09 Mosys, Inc. Reducing latency in serializer-deserializer links
JP2011160369A (ja) * 2010-02-04 2011-08-18 Sony Corp 電子回路、電子機器、デジタル信号処理方法
US8320149B2 (en) * 2010-02-04 2012-11-27 Richtek Technology Corporation, R.O.C. Multi-chip module with master-slave analog signal transmission function
JP2011234157A (ja) * 2010-04-28 2011-11-17 Elpida Memory Inc 半導体装置
US9288089B2 (en) 2010-04-30 2016-03-15 Ecole Polytechnique Federale De Lausanne (Epfl) Orthogonal differential vector signaling
US9106220B2 (en) 2010-05-20 2015-08-11 Kandou Labs, S.A. Methods and systems for high bandwidth chip-to-chip communications interface
US9251873B1 (en) 2010-05-20 2016-02-02 Kandou Labs, S.A. Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications
US9288082B1 (en) 2010-05-20 2016-03-15 Kandou Labs, S.A. Circuits for efficient detection of vector signaling codes for chip-to-chip communication using sums of differences
US9077386B1 (en) 2010-05-20 2015-07-07 Kandou Labs, S.A. Methods and systems for selection of unions of vector signaling codes for power and pin efficient chip-to-chip communication
JP5308576B2 (ja) * 2010-05-25 2013-10-09 富士通株式会社 位相補間器、受信回路及び情報処理装置
CN102834867A (zh) * 2010-06-08 2012-12-19 拉姆伯斯公司 集成电路设备时序校准
TWI425364B (zh) * 2010-06-22 2014-02-01 Mstar Semiconductor Inc 記憶體共享系統及方法
DE102010034112A1 (de) 2010-08-12 2012-02-16 Gm Global Technology Operations Llc (N.D.Ges.D. Staates Delaware) Interner Wärmetauscher für eine Kraftfahrzeug-Klimaanlage
KR101180405B1 (ko) * 2010-09-03 2012-09-10 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이의 테스트 방법
US8400808B2 (en) 2010-12-16 2013-03-19 Micron Technology, Inc. Phase interpolators and push-pull buffers
EP2659589A4 (de) * 2010-12-29 2015-01-21 Ericsson Telefon Ab L M Phasenfrequenzdetektionsverfahren
US8854098B2 (en) 2011-01-21 2014-10-07 Qualcomm Incorporated System for I-Q phase mismatch detection and correction
JP5743063B2 (ja) * 2011-02-09 2015-07-01 ラピスセミコンダクタ株式会社 半導体集積回路、半導体チップ、及び半導体集積回路の設計手法
CN102413608B (zh) 2011-10-31 2014-02-05 矽力杰半导体技术(杭州)有限公司 一种参考电压调节方法、电路及应用其的恒流源驱动电路
US9843315B2 (en) 2011-11-01 2017-12-12 Rambus Inc. Data transmission using delayed timing signals
JP5849757B2 (ja) 2012-02-17 2016-02-03 セイコーエプソン株式会社 レシーバー回路、通信システム及び電子機器
US9882823B2 (en) * 2012-03-08 2018-01-30 Marvell World Trade Ltd. Systems and methods for blocking transmission of a frame in a network device
US9154077B2 (en) 2012-04-12 2015-10-06 Qualcomm Incorporated Compact high frequency divider
US8896358B2 (en) * 2012-11-08 2014-11-25 Avago Technologies General Ip (Singapore) Pte. Ltd. Phase interpolator having adaptively biased phase mixer
KR102032225B1 (ko) * 2012-11-20 2019-10-16 에스케이하이닉스 주식회사 반도체 메모리 장치
KR102041471B1 (ko) * 2012-12-24 2019-11-07 에스케이하이닉스 주식회사 반도체 장치
JP6068193B2 (ja) * 2013-02-28 2017-01-25 シナプティクス・ジャパン合同会社 受信装置及び送受信システム
KR102047825B1 (ko) * 2013-03-06 2019-11-22 삼성전자 주식회사 분주 클록 생성 장치 및 분주 클록 생성 방법
US8754678B1 (en) * 2013-03-15 2014-06-17 Analog Devices, Inc. Apparatus and methods for invertible sine-shaping for phase interpolation
WO2014172377A1 (en) 2013-04-16 2014-10-23 Kandou Labs, S.A. Methods and systems for high bandwidth communications interface
KR102087437B1 (ko) * 2013-06-17 2020-03-10 에스케이하이닉스 주식회사 수신장치를 포함하는 반도체시스템
WO2014210074A1 (en) 2013-06-25 2014-12-31 Kandou Labs SA Vector signaling with reduced receiver complexity
JP5807048B2 (ja) * 2013-08-26 2015-11-10 株式会社セレブレクス キャリブレーション装置,キャリブレーション機能付き画像表示装置
US9171597B2 (en) 2013-08-30 2015-10-27 Micron Technology, Inc. Apparatuses and methods for providing strobe signals to memories
JP6241156B2 (ja) * 2013-09-11 2017-12-06 株式会社ソシオネクスト 並列データを受信するために使用するクロックの位相を決定する方法、受信回路及び電子装置
US20150109034A1 (en) * 2013-10-17 2015-04-23 Qualcomm Incorporated Delay architecture for reducing downtime during frequency switching
US10579580B2 (en) 2013-12-18 2020-03-03 Qorvo Us, Inc. Start of sequence detection for one wire bus
US10528502B2 (en) 2013-12-18 2020-01-07 Qorvo Us, Inc. Power management system for a bus interface system
US10540226B2 (en) 2013-12-18 2020-01-21 Qorvo Us, Inc. Write technique for a bus interface system
KR102165231B1 (ko) * 2013-12-30 2020-10-14 에스케이하이닉스 주식회사 스큐를 보정하는 리시버 회로, 이를 포함하는 반도체 장치 및 시스템
US9806761B1 (en) 2014-01-31 2017-10-31 Kandou Labs, S.A. Methods and systems for reduction of nearest-neighbor crosstalk
EP3100424B1 (de) 2014-02-02 2023-06-07 Kandou Labs S.A. Verfahren und vorrichtung für chip-to-chip-kommunikationen mit niedriger leistungsaufnahme mit eingeschränktem isi-verhältnis
EP3111607B1 (de) 2014-02-28 2020-04-08 Kandou Labs SA Vektorsignalisierungskodes mit eingebettetem takt
US9509437B2 (en) 2014-05-13 2016-11-29 Kandou Labs, S.A. Vector signaling code with improved noise margin
US9443572B2 (en) * 2014-06-06 2016-09-13 Qualcomm Incorporated Programmable power for a memory interface
US9337817B2 (en) * 2014-06-17 2016-05-10 Via Alliance Semiconductor Co., Ltd. Hold-time optimization circuit and receiver with the same
US9852806B2 (en) 2014-06-20 2017-12-26 Kandou Labs, S.A. System for generating a test pattern to detect and isolate stuck faults for an interface using transition coding
US9112550B1 (en) 2014-06-25 2015-08-18 Kandou Labs, SA Multilevel driver for high speed chip-to-chip communications
US9900186B2 (en) * 2014-07-10 2018-02-20 Kandou Labs, S.A. Vector signaling codes with increased signal to noise characteristics
US9432082B2 (en) 2014-07-17 2016-08-30 Kandou Labs, S.A. Bus reversable orthogonal differential vector signaling codes
KR102243423B1 (ko) 2014-07-21 2021-04-22 칸도우 랩스 에스에이 다분기 데이터 전송
KR101949964B1 (ko) 2014-08-01 2019-02-20 칸도우 랩스 에스에이 임베딩된 클록을 갖는 직교 차동 벡터 시그널링 코드
US9674014B2 (en) 2014-10-22 2017-06-06 Kandou Labs, S.A. Method and apparatus for high speed chip-to-chip communications
US9251906B1 (en) * 2015-05-18 2016-02-02 Freescale Semiconductor, Inc. Data strobe signal generation for flash memory
CN106330142B (zh) * 2015-06-17 2023-09-29 意法半导体研发(深圳)有限公司 时钟相移电路
EP3700154A1 (de) 2015-06-26 2020-08-26 Kandou Labs, S.A. Hochgeschwindigkeitskommunikationssystem
US10055372B2 (en) 2015-11-25 2018-08-21 Kandou Labs, S.A. Orthogonal differential vector signaling codes with embedded clock
US9712143B2 (en) * 2015-12-16 2017-07-18 Texas Instruments Incorporated System and method for a reduced harmonic content transmitter for wireless communication
KR102510446B1 (ko) 2016-01-15 2023-03-15 삼성전자주식회사 외부 클락을 이용하여 비디오 동기 신호를 발생시키는 디스플레이 컨트롤러, 이를 포함하는 애플리케이션 프로세서, 및 이를 포함하는 전자 시스템
WO2017130983A1 (ja) * 2016-01-25 2017-08-03 アイシン・エィ・ダブリュ株式会社 メモリコントローラ
US9608611B1 (en) * 2016-01-28 2017-03-28 Xilinx, Inc. Phase interpolator and method of implementing a phase interpolator
US10698847B2 (en) 2016-03-01 2020-06-30 Qorvo Us, Inc. One wire bus to RFFE translation system
US10579128B2 (en) * 2016-03-01 2020-03-03 Qorvo Us, Inc. Switching power supply for subus slaves
CN115085727A (zh) 2016-04-22 2022-09-20 康杜实验室公司 高性能锁相环
US10003454B2 (en) 2016-04-22 2018-06-19 Kandou Labs, S.A. Sampler with low input kickback
WO2017185070A1 (en) 2016-04-22 2017-10-26 Kandou Labs, S.A. Calibration apparatus and method for sampler with adjustable high frequency gain
US9509319B1 (en) * 2016-04-26 2016-11-29 Silab Tech Pvt. Ltd. Clock and data recovery circuit
US10153591B2 (en) 2016-04-28 2018-12-11 Kandou Labs, S.A. Skew-resistant multi-wire channel
WO2017189931A1 (en) 2016-04-28 2017-11-02 Kandou Labs, S.A. Vector signaling codes for densely-routed wire groups
US10193716B2 (en) 2016-04-28 2019-01-29 Kandou Labs, S.A. Clock data recovery with decision feedback equalization
EP3449606A4 (de) 2016-04-28 2019-11-27 Kandou Labs S.A. Mehrstufiger treiber mit geringem stromverbrauch
US9906358B1 (en) 2016-08-31 2018-02-27 Kandou Labs, S.A. Lock detector for phase lock loop
US10411922B2 (en) 2016-09-16 2019-09-10 Kandou Labs, S.A. Data-driven phase detector element for phase locked loops
US10200188B2 (en) 2016-10-21 2019-02-05 Kandou Labs, S.A. Quadrature and duty cycle error correction in matrix phase lock loop
US10200218B2 (en) 2016-10-24 2019-02-05 Kandou Labs, S.A. Multi-stage sampler with increased gain
US10372665B2 (en) 2016-10-24 2019-08-06 Kandou Labs, S.A. Multiphase data receiver with distributed DFE
JP2018082328A (ja) 2016-11-17 2018-05-24 東芝メモリ株式会社 データ送信装置
US10558607B2 (en) 2017-02-01 2020-02-11 Qorvo Us, Inc. Bus interface system for power extraction
US10210918B2 (en) * 2017-02-28 2019-02-19 Micron Technology, Inc. Apparatuses and methods for determining a phase relationship between an input clock signal and a multiphase clock signal
DE112018002643T5 (de) 2017-05-22 2020-05-07 Invention Mine, Llc Multimodale datengetriebene taktwiederherstellungsschaltung
US10116468B1 (en) 2017-06-28 2018-10-30 Kandou Labs, S.A. Low power chip-to-chip bidirectional communications
US10686583B2 (en) 2017-07-04 2020-06-16 Kandou Labs, S.A. Method for measuring and correcting multi-wire skew
US10203226B1 (en) 2017-08-11 2019-02-12 Kandou Labs, S.A. Phase interpolation circuit
US10333532B2 (en) * 2017-09-07 2019-06-25 Micron Technology, Inc. Apparatuses and methods for detecting a loop count in a delay-locked loop
JP2019053444A (ja) * 2017-09-13 2019-04-04 東芝メモリ株式会社 半導体集積回路及び半導体装置
US10347283B2 (en) 2017-11-02 2019-07-09 Kandou Labs, S.A. Clock data recovery in multilane data receiver
CN107979357A (zh) * 2017-11-16 2018-05-01 湖南工业大学 采样式干扰脉冲过滤方法
US10326623B1 (en) 2017-12-08 2019-06-18 Kandou Labs, S.A. Methods and systems for providing multi-stage distributed decision feedback equalization
CN108092649B (zh) * 2018-01-03 2021-05-04 龙迅半导体(合肥)股份有限公司 一种相位插值器和相位插值器的控制方法
US10554380B2 (en) 2018-01-26 2020-02-04 Kandou Labs, S.A. Dynamically weighted exclusive or gate having weighted output segments for phase detection and phase interpolation
KR20190096746A (ko) * 2018-02-09 2019-08-20 에스케이하이닉스 주식회사 클럭 분배 회로 및 이를 포함하는 반도체 장치
JP2019145186A (ja) 2018-02-21 2019-08-29 東芝メモリ株式会社 半導体記憶装置
EP4145705A1 (de) 2018-06-12 2023-03-08 Kandou Labs SA Kombiniertes taktdatenrückgewinnungslogiknetzwerk und ladungspumpenschaltung mit niedriger latenzzeit
CN108899876B (zh) * 2018-06-12 2020-02-11 昂宝电子(上海)有限公司 开关电源中电流检测端的短路保护系统
CN112313878A (zh) * 2018-06-29 2021-02-02 三菱电机株式会社 相位振幅控制振荡装置
US10418125B1 (en) * 2018-07-19 2019-09-17 Marvell Semiconductor Write and read common leveling for 4-bit wide DRAMs
JP7195916B2 (ja) 2018-12-21 2022-12-26 キオクシア株式会社 半導体記憶装置
US10599601B1 (en) 2019-01-16 2020-03-24 Qorvo Us, Inc. Single-wire bus (SuBUS) slave circuit and related apparatus
US10804924B2 (en) 2019-01-24 2020-10-13 Media Tek Singapore Pte. Ltd. Systems for reducing pattern-dependent inter-symbol interference and related methods
US10727847B1 (en) 2019-02-07 2020-07-28 International Business Machines Corporation Digital control of a voltage controlled oscillator frequency
US10958251B2 (en) 2019-04-08 2021-03-23 Kandou Labs, S.A. Multiple adjacent slicewise layout of voltage-controlled oscillator
US10630272B1 (en) 2019-04-08 2020-04-21 Kandou Labs, S.A. Measurement and correction of multiphase clock duty cycle and skew
US10673443B1 (en) 2019-04-08 2020-06-02 Kandou Labs, S.A. Multi-ring cross-coupled voltage-controlled oscillator
US11119958B2 (en) 2019-04-18 2021-09-14 Qorvo Us, Inc. Hybrid bus apparatus
US11226924B2 (en) 2019-04-24 2022-01-18 Qorvo Us, Inc. Single-wire bus apparatus supporting slave-initiated operation in a master circuit
US11075743B2 (en) * 2019-08-27 2021-07-27 Nxp Usa, Inc. Adjustable high resolution timer
US10983942B1 (en) 2019-12-11 2021-04-20 Qorvo Us, Inc. Multi-master hybrid bus apparatus
US11409677B2 (en) 2020-11-11 2022-08-09 Qorvo Us, Inc. Bus slave circuit and related single-wire bus apparatus
US11489695B2 (en) 2020-11-24 2022-11-01 Qorvo Us, Inc. Full-duplex communications over a single-wire bus
KR20220100182A (ko) 2021-01-08 2022-07-15 삼성전자주식회사 글리치 없는 단조 증가 위상 보간기 및 이를 포함하는 통신 장치
US11595137B1 (en) * 2021-02-17 2023-02-28 Keysight Technologies, Inc. System and method of measuring error vector magnitude in the time domain
US11463092B1 (en) 2021-04-01 2022-10-04 Kanou Labs Sa Clock and data recovery lock detection circuit for verifying lock condition in presence of imbalanced early to late vote ratios
US11791827B2 (en) * 2021-04-06 2023-10-17 Wuxi Esiontech Co., Ltd. Phase interpolation circuit with high linearity
US11563605B2 (en) 2021-04-07 2023-01-24 Kandou Labs SA Horizontal centering of sampling point using multiple vertical voltage measurements
US11496282B1 (en) 2021-06-04 2022-11-08 Kandou Labs, S.A. Horizontal centering of sampling point using vertical vernier
US11581877B1 (en) * 2021-11-02 2023-02-14 Nxp B.V. Negative-feedback four-phase generator with twenty-five percent duty cycle output
US11706048B1 (en) 2021-12-16 2023-07-18 Qorvo Us, Inc. Multi-protocol bus circuit
JP2023141195A (ja) * 2022-03-23 2023-10-05 キオクシア株式会社 電圧生成回路及び半導体記憶装置
TWI816348B (zh) * 2022-03-31 2023-09-21 友達光電股份有限公司 資料驅動器以及控制方法
US20230378945A1 (en) * 2022-05-19 2023-11-23 Texas Instruments Incorporated Pulse width distortion correction

Family Cites Families (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3737808A (en) * 1971-12-29 1973-06-05 Honeywell Inf Systems Pulse shaping network
GB1533577A (en) * 1975-11-05 1978-11-29 Computer Technology Ltd Synchronising means
GB2089609A (en) 1980-12-12 1982-06-23 Philips Electronic Associated Clock pulse phase shifter
DE3520301A1 (de) 1984-06-16 1985-12-19 ANT Nachrichtentechnik GmbH, 7150 Backnang Phasenvergleichsverfahren
US4623805A (en) * 1984-08-29 1986-11-18 Burroughs Corporation Automatic signal delay adjustment apparatus
JPH0744531B2 (ja) 1986-06-30 1995-05-15 日本電気株式会社 高速光バス
US4890248A (en) * 1987-06-01 1989-12-26 Hughes Aircraft Company Method and apparatus for reducing aliasing in signal processing
US4833695A (en) * 1987-09-08 1989-05-23 Tektronix, Inc. Apparatus for skew compensating signals
US4795923A (en) * 1987-11-25 1989-01-03 Tektronix, Inc. Adjustable delay circuit
US5258660A (en) * 1990-01-16 1993-11-02 Cray Research, Inc. Skew-compensated clock distribution system
DE69128559T2 (de) 1990-05-15 1998-06-04 Seiko Epson Corp Speicherkarte
JPH0476610A (ja) 1990-07-13 1992-03-11 Hitachi Ltd クロック分配方式
EP0476585B1 (de) * 1990-09-18 1998-08-26 Fujitsu Limited Elektronische Anordnung mit einem Bezugsverzögerungsgenerator
US5157634A (en) * 1990-10-23 1992-10-20 International Business Machines Corporation Dram having extended refresh time
US5157277A (en) * 1990-12-28 1992-10-20 Compaq Computer Corporation Clock buffer with adjustable delay and fixed duty cycle output
US5208833A (en) * 1991-04-08 1993-05-04 Motorola, Inc. Multi-level symbol synchronizer
US5134407A (en) * 1991-04-10 1992-07-28 Ashtech Telesis, Inc. Global positioning system receiver digital processing technique
US5287025A (en) * 1991-04-23 1994-02-15 Matsushita Electric Industrial Co., Ltd. Timing control circuit
JPH07101917B2 (ja) * 1991-05-14 1995-11-01 富士ゼロックス株式会社 領域制御装置
EP0586565B1 (de) 1991-05-29 1999-08-11 Pacific Microsonics, Inc. Verbessertes System zur Kodierung/Dekodierung von Signalen
JPH0548536A (ja) 1991-08-09 1993-02-26 Nippon Telegr & Teleph Corp <Ntt> 並列光伝送装置
JPH0575542A (ja) 1991-09-13 1993-03-26 Nippon Telegr & Teleph Corp <Ntt> 並列光伝送装置
US5272390A (en) * 1991-09-23 1993-12-21 Digital Equipment Corporation Method and apparatus for clock skew reduction through absolute delay regulation
US5157276A (en) 1991-09-26 1992-10-20 Tektronix, Inc. Low jitter clock phase adjust system
JPH05110550A (ja) 1991-10-16 1993-04-30 Fujitsu Ltd スキユーキヤンセル方式
US6090150A (en) * 1991-12-28 2000-07-18 Nec Corporation Method of designing clock wiring and apparatus for implementing the same
US5465346A (en) * 1991-12-30 1995-11-07 Dell Usa, L.P. Method and apparatus for synchronous bus interface optimization
FR2690022B1 (fr) * 1992-03-24 1997-07-11 Bull Sa Circuit a retard variable.
US5615358A (en) * 1992-05-28 1997-03-25 Texas Instruments Incorporated Time skewing arrangement for operating memory in synchronism with a data processor
US5485490A (en) * 1992-05-28 1996-01-16 Rambus, Inc. Method and circuitry for clock synchronization
DE4242201A1 (de) * 1992-12-15 1994-06-16 Philips Patentverwaltung Schaltungsanordnung zum Verzögern eines Nutzsignals
EP1120913A1 (de) * 1993-02-05 2001-08-01 Sun Microsystems, Inc. Verfahren und Vorrichtung zur Taktsteuerung
US5552726A (en) * 1993-05-05 1996-09-03 Texas Instruments Incorporated High resolution digital phase locked loop with automatic recovery logic
DE4342266C2 (de) * 1993-12-10 1996-10-24 Texas Instruments Deutschland Taktgenerator sowie Phasenkomparator zur Verwendung in einem solchen Taktgenerator
KR970001636B1 (ko) * 1994-01-20 1997-02-11 엘지전자 주식회사 영상신호의 시간축 보정 장치
US5554945A (en) 1994-02-15 1996-09-10 Rambus, Inc. Voltage controlled phase shifter with unlimited range
JPH0818414A (ja) * 1994-04-26 1996-01-19 Hitachi Ltd 信号処理用遅延回路
JP3523718B2 (ja) 1995-02-06 2004-04-26 株式会社ルネサステクノロジ 半導体装置
US5546355A (en) 1995-02-24 1996-08-13 Motorola, Inc. Integrated circuit memory having a self-timed write pulse independent of clock frequency and duty cycle
US5687202A (en) * 1995-04-24 1997-11-11 Cyrix Corporation Programmable phase shift clock generator
JPH098796A (ja) * 1995-06-16 1997-01-10 Hitachi Ltd データ転送装置
US5748914A (en) * 1995-10-19 1998-05-05 Rambus, Inc. Protocol for communication with dynamic memory
KR100197563B1 (ko) * 1995-12-27 1999-06-15 윤종용 동기 지연라인을 이용한 디지탈 지연 동기루프 회로
JP2778572B2 (ja) * 1996-03-21 1998-07-23 日本電気株式会社 クロック分配回路
JP3469006B2 (ja) * 1996-09-30 2003-11-25 株式会社東芝 半導体集積回路及びその設計方法
JP3566007B2 (ja) * 1996-11-12 2004-09-15 富士通株式会社 デスクランブル回路、スクランブルパターン生成回路及びスクランブルパターン生成方法
US5835401A (en) * 1996-12-05 1998-11-10 Cypress Semiconductor Corporation Dram with hidden refresh
JP3739525B2 (ja) * 1996-12-27 2006-01-25 富士通株式会社 可変遅延回路及び半導体集積回路装置
US5864246A (en) * 1997-03-31 1999-01-26 Lsi Logic Corporation Method and apparatus for doubling a clock signal using phase interpolation
JP3211739B2 (ja) * 1997-08-25 2001-09-25 日本電気株式会社 半導体記憶装置
US5944834A (en) * 1997-09-26 1999-08-31 International Business Machines Corporation Timing analysis method for PLLS
JP2001084763A (ja) * 1999-09-08 2001-03-30 Mitsubishi Electric Corp クロック発生回路およびそれを具備した半導体記憶装置

Also Published As

Publication number Publication date
EP1489619A2 (de) 2004-12-22
EP1492120A2 (de) 2004-12-29
US8065553B2 (en) 2011-11-22
EP1492120A3 (de) 2005-02-02
EP1489619B1 (de) 2008-10-15
US20010007136A1 (en) 2001-07-05
EP1492120B1 (de) 2007-04-25
US7496781B2 (en) 2009-02-24
DE69840135D1 (de) 2008-11-27
KR100399427B1 (ko) 2003-09-29
DE69837689D1 (de) 2007-06-06
KR19990006950A (ko) 1999-01-25
EP1492121A3 (de) 2005-02-02
KR100346804B1 (ko) 2002-08-03
KR100313820B1 (ko) 2001-12-28
EP0884732B1 (de) 2006-02-15
US6484268B2 (en) 2002-11-19
EP1489619A3 (de) 2005-02-02
DE69837689T2 (de) 2007-08-23
EP1492121B1 (de) 2009-11-04
US20030042957A1 (en) 2003-03-06
TW387065B (en) 2000-04-11
EP0884732A2 (de) 1998-12-16
US20090195281A1 (en) 2009-08-06
US6247138B1 (en) 2001-06-12
DE69833467T2 (de) 2006-08-24
KR100340298B1 (ko) 2002-06-14
EP0884732A3 (de) 2001-03-21
DE69833467D1 (de) 2006-04-20
EP1492121A2 (de) 2004-12-29

Similar Documents

Publication Publication Date Title
DE69841282D1 (de) egrierten Halbleiterschaltkreis unter deren Anwendung und Signalübertragungssystem
DE69637488D1 (de) Halbleiter und Halbleitermodul
DE69734270D1 (de) Übertragungssystem und -verfahren
DE69529885D1 (de) Konferenzverbindungssystem und -gerät
ID19422A (id) Piridina dan bifenil tersubstitusi
DE69526899D1 (de) Radarmodul und Radarsystem
ATE221162T1 (de) Datenübertragungssystem und bestandteile dafür
ID23684A (id) Komposisi-polimer-organoclay dan pembuatannya
DE69828963D1 (de) Wirstoffabgabe und gentherapiesystem
DE69503473D1 (de) Festkörper-Bildaufnahme-Vorrichtung und Herstellungsmethode
ID19833A (id) Aralkil dan aralkilidena heterosiklik laktam dan imida
DE69532227D1 (de) Signalsendeverfahren und kommunikationssystem
PT910462E (pt) Dispositivo misturador e distribuidor
DE69731341D1 (de) Optisches Bauelement und optisches System mit diesem
ID16570A (id) Pembuatan amina-amina dan aminonitril-aminonitril
PT756718E (pt) Sistemas de camadas electrocromicas finas e seus componentes
DE69707030D1 (de) Selbsthaltende Kupplungsvorrichtung
DE69628902D1 (de) Halbleitervorrichtung und Halbleitermodul
DE69636930D1 (de) Schaltungsplatte und Schaltungsplattenanordnung
ID24844A (id) Metode dan sistem selimut aplikasi
BR9701621A (pt) Dispositivo de acondicionamento e de aplicação de um produto capilar
ID18456A (id) Produksi-bersama 6-aminokapronitril dan heksametilenadiamina
DE69624524D1 (de) Umschaltungsschaltkreis und Ladungsverschiebeanordnung unter Anwendung derselben
ID17973A (id) Pembuatan amina-amina dan aminonitril-aminonitril
DE69726642D1 (de) Übertragungsverfahren und Übertragungsvorrichtung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition