DE69733602D1 - Verfahren zur Unterbrechungsbearbeitung in einer Hochgeschwindigkeits-E/A-Steuervorrichtung - Google Patents
Verfahren zur Unterbrechungsbearbeitung in einer Hochgeschwindigkeits-E/A-SteuervorrichtungInfo
- Publication number
- DE69733602D1 DE69733602D1 DE69733602T DE69733602T DE69733602D1 DE 69733602 D1 DE69733602 D1 DE 69733602D1 DE 69733602 T DE69733602 T DE 69733602T DE 69733602 T DE69733602 T DE 69733602T DE 69733602 D1 DE69733602 D1 DE 69733602D1
- Authority
- DE
- Germany
- Prior art keywords
- controller
- speed
- interrupt processing
- interrupt
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/778,327 US5943479A (en) | 1997-01-02 | 1997-01-02 | Method for reducing the rate of interrupts in a high speed I/O controller |
US778327 | 1997-01-02 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69733602D1 true DE69733602D1 (de) | 2005-07-28 |
DE69733602T2 DE69733602T2 (de) | 2006-05-04 |
Family
ID=25112976
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69733602T Expired - Fee Related DE69733602T2 (de) | 1997-01-02 | 1997-12-11 | Verfahren zur Unterbrechungsbearbeitung in einer Hochgeschwindigkeits-E/A-Steuervorrichtung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5943479A (de) |
EP (1) | EP0852357B1 (de) |
JP (1) | JPH10207822A (de) |
DE (1) | DE69733602T2 (de) |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6012121A (en) * | 1997-04-08 | 2000-01-04 | International Business Machines Corporation | Apparatus for flexible control of interrupts in multiprocessor systems |
US6256660B1 (en) * | 1997-04-08 | 2001-07-03 | International Business Machines Corporation | Method and program product for allowing application programs to avoid unnecessary packet arrival interrupts |
US6253255B1 (en) * | 1997-05-08 | 2001-06-26 | Microsoft Corporation | System and method for batching data between transport and link layers in a protocol stack |
JPH11232214A (ja) * | 1998-02-17 | 1999-08-27 | Hitachi Ltd | 情報処理装置用プロセッサおよびその制御方法 |
US6397282B1 (en) * | 1998-04-07 | 2002-05-28 | Honda Giken Kogyo Kabushikikaisha | Communication controller for transferring data in accordance with the data type |
US6243785B1 (en) * | 1998-05-20 | 2001-06-05 | 3Com Corporation | Hardware assisted polling for software drivers |
US6615305B1 (en) * | 1998-08-27 | 2003-09-02 | Intel Corporation | Interrupt pacing in data transfer unit |
US6195725B1 (en) | 1998-12-14 | 2001-02-27 | Intel Corporation | Dynamically varying interrupt bundle size |
US6189066B1 (en) * | 1999-01-26 | 2001-02-13 | 3Com Corporation | System and method for dynamically selecting interrupt time interval threshold parameters |
US6189067B1 (en) * | 1999-01-26 | 2001-02-13 | 3Com Corporation | System and method for dynamically selecting interrupt quantity threshold parameters |
US6192440B1 (en) * | 1999-01-26 | 2001-02-20 | 3Com Corporation | System and method for dynamically selecting interrupt storage time threshold parameters |
US6529986B1 (en) * | 1999-01-26 | 2003-03-04 | 3Com Corporation | Interrupt optimization using storage time for peripheral component events |
US6351785B1 (en) * | 1999-01-26 | 2002-02-26 | 3Com Corporation | Interrupt optimization using varying quantity threshold |
US6574694B1 (en) * | 1999-01-26 | 2003-06-03 | 3Com Corporation | Interrupt optimization using time between succeeding peripheral component events |
US6338111B1 (en) * | 1999-02-22 | 2002-01-08 | International Business Machines Corporation | Method and apparatus for reducing I/O interrupts |
US6434651B1 (en) | 1999-03-01 | 2002-08-13 | Sun Microsystems, Inc. | Method and apparatus for suppressing interrupts in a high-speed network environment |
US6467008B1 (en) | 1999-03-01 | 2002-10-15 | Sun Microsystems, Inc. | Method and apparatus for indicating an interrupt in a network interface |
EP1159685B1 (de) * | 1999-03-01 | 2006-08-16 | Sun Microsystems, Inc. | Verfahren und vorrichtung zur unterbrechungsmodulation in einem netzwerkschnittstellengerät |
US6968392B1 (en) * | 2000-06-29 | 2005-11-22 | Cisco Technology, Inc. | Method and apparatus providing improved statistics collection for high bandwidth interfaces supporting multiple connections |
JP3389920B2 (ja) | 2000-07-10 | 2003-03-24 | 日本電気株式会社 | ディスクアレイ装置およびディスクアレイ装置の割り込み実行方法 |
US20040109468A1 (en) * | 2000-10-02 | 2004-06-10 | Shakuntala Anjanaiah | Apparatus and method for input clock signal detection in an asynchronous transfer mode interface unit |
US6775723B2 (en) * | 2001-09-21 | 2004-08-10 | International Business Machines Corporation | Efficient reading of a remote first in first out buffer |
US8856416B2 (en) * | 2001-12-06 | 2014-10-07 | Intel Corporation | Method and apparatus for processing latency sensitive electronic data with interrupt moderation |
JP2005128747A (ja) * | 2003-10-23 | 2005-05-19 | Fujitsu Ltd | シリアル転送バス用の送受信マクロを有する集積回路装置 |
JP2005322032A (ja) * | 2004-05-10 | 2005-11-17 | Matsushita Electric Ind Co Ltd | 受信フレーム処理装置 |
US7864790B2 (en) * | 2004-05-17 | 2011-01-04 | Realtek Semiconductor Corp. | Method and apparatus for improving the management of data packets |
US7478186B1 (en) * | 2004-06-03 | 2009-01-13 | Integrated Device Technology, Inc. | Interrupt coalescer for DMA channel |
US7930422B2 (en) * | 2004-07-14 | 2011-04-19 | International Business Machines Corporation | Apparatus and method for supporting memory management in an offload of network protocol processing |
JP2007074320A (ja) * | 2005-09-07 | 2007-03-22 | Matsushita Electric Ind Co Ltd | ネットワーク機器装置 |
US7987307B2 (en) * | 2006-09-22 | 2011-07-26 | Intel Corporation | Interrupt coalescing control scheme |
JP5099215B2 (ja) * | 2008-03-31 | 2012-12-19 | 富士通株式会社 | 情報処理装置、割込み制御装置、割込み制御回路及び割込み制御方法 |
US8495403B2 (en) * | 2008-12-31 | 2013-07-23 | Intel Corporation | Platform and processor power management |
JP5267328B2 (ja) * | 2009-05-26 | 2013-08-21 | 富士通セミコンダクター株式会社 | 割り込み通知制御装置および半導体集積回路 |
JP5496548B2 (ja) * | 2009-05-29 | 2014-05-21 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
US9164935B2 (en) | 2013-01-04 | 2015-10-20 | International Business Machines Corporation | Determining when to throttle interrupts to limit interrupt processing to an interrupt processing time period |
JP2015060273A (ja) * | 2013-09-17 | 2015-03-30 | 株式会社リコー | ネットワーク制御装置 |
US11061840B2 (en) | 2013-09-24 | 2021-07-13 | Red Hat Israel, Ltd. | Managing network interface controller-generated interrupts |
CN104539557B (zh) * | 2015-01-04 | 2017-08-11 | 盛科网络(苏州)有限公司 | 报文统计上报cpu的方法及装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4599689A (en) * | 1983-02-28 | 1986-07-08 | Data Translations, Inc. | Continuous data transfer system |
US5452432A (en) * | 1990-08-14 | 1995-09-19 | Chips And Technologies, Inc. | Partially resettable, segmented DMA counter |
US5301275A (en) * | 1991-10-03 | 1994-04-05 | Compaq Computer Corporation | Data transfer system with variable data buffer size and programmable interrupt frequency |
US5319752A (en) * | 1992-09-18 | 1994-06-07 | 3Com Corporation | Device with host indication combination |
US5546543A (en) * | 1993-03-26 | 1996-08-13 | Digital Equipment Corporation | Method for assigning priority to receive and transmit requests in response to occupancy of receive and transmit buffers when transmission and reception are in progress |
GB2282474B (en) * | 1993-09-30 | 1998-02-25 | Intel Corp | Buffer memory management for a computer network node |
US5687316A (en) * | 1994-07-29 | 1997-11-11 | International Business Machines Corporation | Communication apparatus and methods having P-MAC, I-MAC engines and buffer bypass for simultaneously transmitting multimedia and packet data |
US5761427A (en) * | 1994-12-28 | 1998-06-02 | Digital Equipment Corporation | Method and apparatus for updating host memory in an adapter to minimize host CPU overhead in servicing an interrupt |
US5708814A (en) * | 1995-11-21 | 1998-01-13 | Microsoft Corporation | Method and apparatus for reducing the rate of interrupts by generating a single interrupt for a group of events |
-
1997
- 1997-01-02 US US08/778,327 patent/US5943479A/en not_active Expired - Fee Related
- 1997-12-11 EP EP97309998A patent/EP0852357B1/de not_active Expired - Lifetime
- 1997-12-11 DE DE69733602T patent/DE69733602T2/de not_active Expired - Fee Related
-
1998
- 1998-01-05 JP JP10000535A patent/JPH10207822A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
DE69733602T2 (de) | 2006-05-04 |
EP0852357B1 (de) | 2005-06-22 |
US5943479A (en) | 1999-08-24 |
JPH10207822A (ja) | 1998-08-07 |
EP0852357A2 (de) | 1998-07-08 |
EP0852357A3 (de) | 1999-07-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |