DE69729913D1 - Ätzverfahren zum Herstellen von Metallfilmstrukturen mit abgeschrägten Seitenwänden - Google Patents
Ätzverfahren zum Herstellen von Metallfilmstrukturen mit abgeschrägten SeitenwändenInfo
- Publication number
- DE69729913D1 DE69729913D1 DE69729913T DE69729913T DE69729913D1 DE 69729913 D1 DE69729913 D1 DE 69729913D1 DE 69729913 T DE69729913 T DE 69729913T DE 69729913 T DE69729913 T DE 69729913T DE 69729913 D1 DE69729913 D1 DE 69729913D1
- Authority
- DE
- Germany
- Prior art keywords
- production
- side walls
- metal film
- etching process
- film structures
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0335—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US664227 | 1996-06-07 | ||
US08/664,227 US5670062A (en) | 1996-06-07 | 1996-06-07 | Method for producing tapered lines |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69729913D1 true DE69729913D1 (de) | 2004-08-26 |
DE69729913T2 DE69729913T2 (de) | 2005-08-25 |
Family
ID=24665132
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69729913T Expired - Lifetime DE69729913T2 (de) | 1996-06-07 | 1997-05-27 | Ätzverfahren zum Herstellen von Metallfilmstrukturen mit abgeschrägten Seitenwänden |
Country Status (5)
Country | Link |
---|---|
US (1) | US5670062A (de) |
EP (1) | EP0812012B1 (de) |
JP (1) | JP3550272B2 (de) |
KR (1) | KR100455640B1 (de) |
DE (1) | DE69729913T2 (de) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5891354A (en) * | 1996-07-26 | 1999-04-06 | Fujitsu Limited | Methods of etching through wafers and substrates with a composite etch stop layer |
US5779929A (en) * | 1996-10-07 | 1998-07-14 | Lucent Technologies Inc. | Thin film metallization for barium nanotitanate substrates |
US6445004B1 (en) * | 1998-02-26 | 2002-09-03 | Samsung Electronics Co., Ltd. | Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof |
US6337520B1 (en) | 1997-02-26 | 2002-01-08 | Samsung Electronics Co., Ltd. | Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and manufacturing method thereof |
GB2338105B (en) * | 1997-03-04 | 2000-04-12 | Lg Electronics Inc | Method of making a thin film transistor |
KR100392909B1 (ko) | 1997-08-26 | 2004-03-22 | 엘지.필립스 엘시디 주식회사 | 박막트랜지스터및그의제조방법 |
KR100248123B1 (ko) | 1997-03-04 | 2000-03-15 | 구본준 | 박막트랜지스터및그의제조방법 |
JP2985124B2 (ja) * | 1997-06-12 | 1999-11-29 | 株式会社日立製作所 | 液晶表示装置 |
KR100495807B1 (ko) * | 1998-05-15 | 2005-10-12 | 삼성전자주식회사 | 배선용조성물,이조성물을이용한금속배선및그제조방법,이배선을이용한표시장치및그제조방법 |
KR20000003756A (ko) * | 1998-06-29 | 2000-01-25 | 김영환 | 박막 트랜지스터 및 그의 제조방법 |
KR100356452B1 (ko) | 1998-10-02 | 2002-10-18 | 가부시키가이샤 히타치세이사쿠쇼 | 액정 표시 장치 및 그 제조 방법 |
US6365917B1 (en) * | 1998-11-25 | 2002-04-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP2001044166A (ja) | 1999-07-29 | 2001-02-16 | Nec Akita Ltd | 導電膜パターンの形成方法 |
DE19943521C2 (de) * | 1999-09-09 | 2001-11-29 | Dresden Ev Inst Festkoerper | Verfahren zum Einstellen definierter Flankenwinkel beim Herstellen von Schichtstrukturen |
TW480576B (en) | 2000-05-12 | 2002-03-21 | Semiconductor Energy Lab | Semiconductor device and method for manufacturing same |
SG116443A1 (en) * | 2001-03-27 | 2005-11-28 | Semiconductor Energy Lab | Wiring and method of manufacturing the same, and wiring board and method of manufacturing the same. |
US20060157709A1 (en) * | 2002-08-20 | 2006-07-20 | Koninklijke Philips Electronics N.V. | Thin film transistor |
KR100543001B1 (ko) | 2003-09-03 | 2006-01-20 | 삼성에스디아이 주식회사 | 박막 트랜지스터 및 액티브 매트릭스 평판 표시 장치 |
US20050133479A1 (en) * | 2003-12-19 | 2005-06-23 | Youngner Dan W. | Equipment and process for creating a custom sloped etch in a substrate |
JP4085094B2 (ja) | 2004-02-19 | 2008-04-30 | シャープ株式会社 | 導電素子基板の製造方法、液晶表示装置の製造方法 |
KR101171175B1 (ko) | 2004-11-03 | 2012-08-06 | 삼성전자주식회사 | 도전체용 식각액 및 이를 이용한 박막 트랜지스터표시판의 제조 방법 |
US20070155180A1 (en) * | 2006-01-05 | 2007-07-05 | Chunghwa Picture Tubes, Ltd. | Thin film etching method |
US9334161B2 (en) | 2009-10-02 | 2016-05-10 | Mitsubishi Gas Chemical Company, Inc. | Processing liquid for suppressing pattern collapse of fine metal structure and method for producing fine metal structure using same |
KR20120075037A (ko) * | 2010-12-28 | 2012-07-06 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
US10147782B2 (en) | 2016-07-18 | 2018-12-04 | International Business Machines Corporation | Tapered metal nitride structure |
US10991582B2 (en) * | 2016-12-21 | 2021-04-27 | Canon Kabushiki Kaisha | Template for imprint lithography including a recession, an apparatus of using the template, and a method of fabricating an article |
DE102019120765B4 (de) | 2018-09-27 | 2024-02-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Verfahren zum bilden eines halbleiterbauelements |
US11195754B2 (en) | 2018-10-09 | 2021-12-07 | International Business Machines Corporation | Transistor with reduced gate resistance and improved process margin of forming self-aligned contact |
KR20200130778A (ko) * | 2019-05-10 | 2020-11-20 | 삼성디스플레이 주식회사 | 박막 트랜지스터의 제조 방법, 표시 장치의 제조 방법 및 박막 트랜지스터 기판 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3884698A (en) * | 1972-08-23 | 1975-05-20 | Hewlett Packard Co | Method for achieving uniform exposure in a photosensitive material on a semiconductor wafer |
US4082604A (en) * | 1976-01-05 | 1978-04-04 | Motorola, Inc. | Semiconductor process |
DE2854404A1 (de) * | 1978-12-16 | 1980-06-26 | Philips Patentverwaltung | Verfahren zum herstellen von festkoerperbauelementen |
US5007984A (en) * | 1987-09-28 | 1991-04-16 | Mitsubishi Denki Kabushiki Kaisha | Method for etching chromium film formed on substrate |
US5183533A (en) * | 1987-09-28 | 1993-02-02 | Mitsubishi Denki Kabushiki Kaisha | Method for etching chromium film formed on substrate |
US5234633A (en) * | 1987-12-28 | 1993-08-10 | Canon Kabushiki Kaisha | Cast molding die and process for producing information recording medium using the same |
US5198694A (en) * | 1990-10-05 | 1993-03-30 | General Electric Company | Thin film transistor structure with improved source/drain contacts |
US5132745A (en) * | 1990-10-05 | 1992-07-21 | General Electric Company | Thin film transistor having an improved gate structure and gate coverage by the gate dielectric |
JP3111478B2 (ja) * | 1991-02-06 | 2000-11-20 | 三菱電機株式会社 | 金属薄膜のテーパーエッチング方法及び薄膜トランジスタ |
JP2952075B2 (ja) * | 1991-06-12 | 1999-09-20 | キヤノン株式会社 | 液晶素子の製造法 |
JPH04372934A (ja) * | 1991-06-24 | 1992-12-25 | Toshiba Corp | 液晶表示装置用アレイ基板の製造方法 |
US5241192A (en) * | 1992-04-02 | 1993-08-31 | General Electric Company | Fabrication method for a self-aligned thin film transistor having reduced end leakage and device formed thereby |
US5539551A (en) * | 1992-12-28 | 1996-07-23 | Casio Computer Co., Ltd. | LCD TFT drain and source electrodes having ohmic barrier, primary conductor, and liquid impermeable layers and method of making |
JP2614403B2 (ja) * | 1993-08-06 | 1997-05-28 | インターナショナル・ビジネス・マシーンズ・コーポレイション | テーパエッチング方法 |
US5528082A (en) * | 1994-04-28 | 1996-06-18 | Xerox Corporation | Thin-film structure with tapered feature |
US5554488A (en) * | 1994-07-28 | 1996-09-10 | Northern Telecom Limited | Semiconductor device structure and method of formation thereof |
JPH0964366A (ja) * | 1995-08-23 | 1997-03-07 | Toshiba Corp | 薄膜トランジスタ |
-
1996
- 1996-06-07 US US08/664,227 patent/US5670062A/en not_active Expired - Lifetime
-
1997
- 1997-05-27 DE DE69729913T patent/DE69729913T2/de not_active Expired - Lifetime
- 1997-05-27 EP EP97303578A patent/EP0812012B1/de not_active Expired - Lifetime
- 1997-06-04 JP JP14678797A patent/JP3550272B2/ja not_active Expired - Fee Related
- 1997-06-05 KR KR1019970023238A patent/KR100455640B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR980005705A (ko) | 1998-03-30 |
KR100455640B1 (ko) | 2005-01-17 |
EP0812012A1 (de) | 1997-12-10 |
JPH1081981A (ja) | 1998-03-31 |
DE69729913T2 (de) | 2005-08-25 |
US5670062A (en) | 1997-09-23 |
EP0812012B1 (de) | 2004-07-21 |
JP3550272B2 (ja) | 2004-08-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |