DE69722700D1 - Verfahren und Vorrichtung zum Herstellen von Siliciumschichten - Google Patents

Verfahren und Vorrichtung zum Herstellen von Siliciumschichten

Info

Publication number
DE69722700D1
DE69722700D1 DE69722700T DE69722700T DE69722700D1 DE 69722700 D1 DE69722700 D1 DE 69722700D1 DE 69722700 T DE69722700 T DE 69722700T DE 69722700 T DE69722700 T DE 69722700T DE 69722700 D1 DE69722700 D1 DE 69722700D1
Authority
DE
Germany
Prior art keywords
silicon layers
producing silicon
producing
layers
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69722700T
Other languages
English (en)
Other versions
DE69722700T2 (de
Inventor
Mahalingam Venkatesan
Shulin Wang
Vedapuram S Achutharaman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of DE69722700D1 publication Critical patent/DE69722700D1/de
Application granted granted Critical
Publication of DE69722700T2 publication Critical patent/DE69722700T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04—Coating on selected surface areas, e.g. using masks
    • C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline
DE69722700T 1996-04-12 1997-04-11 Verfahren und Vorrichtung zum Herstellen von Siliciumschichten Expired - Fee Related DE69722700T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/631,922 US5863598A (en) 1996-04-12 1996-04-12 Method of forming doped silicon in high aspect ratio openings
US631922 1996-04-12

Publications (2)

Publication Number Publication Date
DE69722700D1 true DE69722700D1 (de) 2003-07-17
DE69722700T2 DE69722700T2 (de) 2004-05-13

Family

ID=24533335

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69722700T Expired - Fee Related DE69722700T2 (de) 1996-04-12 1997-04-11 Verfahren und Vorrichtung zum Herstellen von Siliciumschichten

Country Status (4)

Country Link
US (1) US5863598A (de)
EP (1) EP0801148B1 (de)
JP (1) JP4023865B2 (de)
DE (1) DE69722700T2 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5966627A (en) * 1996-08-30 1999-10-12 Lucent Technologies Inc. In-situ doped silicon layers
DE69923436T2 (de) * 1998-03-06 2006-01-05 Asm America Inc., Phoenix Verfahren zum beschichten von silizium mit hoher kantenabdeckung
US6194292B1 (en) * 1998-08-21 2001-02-27 Texas Instruments Incorporated Method of fabricating in-situ doped rough polycrystalline silicon using a single wafer reactor
US6410090B1 (en) 1998-09-29 2002-06-25 Applied Materials, Inc. Method and apparatus for forming insitu boron doped polycrystalline and amorphous silicon films
WO2001071784A1 (fr) 2000-03-17 2001-09-27 Hitachi, Ltd. Procede de fabrication de semi-conducteurs et appareil de fabrication
JP3707726B2 (ja) * 2000-05-31 2005-10-19 Ｈｏｙａ株式会社 炭化珪素の製造方法、複合材料の製造方法
US7026219B2 (en) * 2001-02-12 2006-04-11 Asm America, Inc. Integration of high k gate dielectric
AU2002306436A1 (en) 2001-02-12 2002-10-15 Asm America, Inc. Improved process for deposition of semiconductor films
US6656838B2 (en) 2001-03-16 2003-12-02 Hitachi, Ltd. Process for producing semiconductor and apparatus for production
US6984574B2 (en) * 2002-01-23 2006-01-10 Mosel Vitelic, Inc. Cobalt silicide fabrication using protective titanium
US7186630B2 (en) * 2002-08-14 2007-03-06 Asm America, Inc. Deposition of amorphous silicon-containing films
DE102004007409B4 (de) * 2004-02-16 2006-06-01 Infineon Technologies Ag Überkonformes Herstellungsverfahren für eine Halbleiterstruktur
JP4655495B2 (ja) * 2004-03-31 2011-03-23 東京エレクトロン株式会社 成膜方法
US7294320B2 (en) 2004-09-17 2007-11-13 Applied Materials, Inc. Hydrogen peroxide abatement of metal hydride fumes
US20070169687A1 (en) * 2006-01-26 2007-07-26 Caracal, Inc. Silicon carbide formation by alternating pulses
CN101432453B (zh) * 2006-04-28 2011-12-28 Sri国际公司 用于生产固结的和纯化的材料的方法
US9443730B2 (en) 2014-07-18 2016-09-13 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US9837271B2 (en) 2014-07-18 2017-12-05 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US10460932B2 (en) 2017-03-31 2019-10-29 Asm Ip Holding B.V. Semiconductor device with amorphous silicon filled gaps and methods for forming
US10593543B2 (en) * 2017-06-05 2020-03-17 Applied Materials, Inc. Method of depositing doped amorphous silicon films with enhanced defect control, reduced substrate sensitivity to in-film defects and bubble-free film growth
US10559650B2 (en) * 2018-01-23 2020-02-11 Texas Instruments Incorporated Trench capacitor with warpage reduction
US10586844B2 (en) * 2018-01-23 2020-03-10 Texas Instruments Incorporated Integrated trench capacitor formed in an epitaxial layer
US11145509B2 (en) 2019-05-24 2021-10-12 Applied Materials, Inc. Method for forming and patterning a layer and/or substrate

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3484311A (en) * 1966-06-21 1969-12-16 Union Carbide Corp Silicon deposition process
JPS577959A (en) * 1980-06-19 1982-01-16 Toshiba Corp Semiconductor device
US4466992A (en) * 1982-05-28 1984-08-21 Phillips Petroleum Company Healing pinhole defects in amorphous silicon films
US4742020A (en) * 1985-02-01 1988-05-03 American Telephone And Telegraph Company, At&T Bell Laboratories Multilayering process for stress accommodation in deposited polysilicon
US5141892A (en) * 1990-07-16 1992-08-25 Applied Materials, Inc. Process for depositing highly doped polysilicon layer on stepped surface of semiconductor wafer resulting in enhanced step coverage
US5080933A (en) * 1990-09-04 1992-01-14 Motorola, Inc. Selective deposition of polycrystalline silicon
US5614257A (en) * 1991-08-09 1997-03-25 Applied Materials, Inc Low temperature, high pressure silicon deposition method
JP3121131B2 (ja) * 1991-08-09 2000-12-25 アプライド マテリアルズ インコーポレイテッド 低温高圧のシリコン蒸着方法
JP2658840B2 (ja) * 1993-12-01 1997-09-30 日本電気株式会社 プロセスシミュレータおよびこれを用いたｃｖｄ装置およびプロセスシミュレーション方法

Also Published As

Publication number Publication date
JPH1074703A (ja) 1998-03-17
EP0801148A1 (de) 1997-10-15
EP0801148B1 (de) 2003-06-11
US5863598A (en) 1999-01-26
JP4023865B2 (ja) 2007-12-19
DE69722700T2 (de) 2004-05-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee