DE69719301T2 - Flüchtiger Speicherchip mit nicht-flüchtigen Speicherplätzen zur Speicherung von Qualitätsinformation - Google Patents

Flüchtiger Speicherchip mit nicht-flüchtigen Speicherplätzen zur Speicherung von Qualitätsinformation

Info

Publication number
DE69719301T2
DE69719301T2 DE69719301T DE69719301T DE69719301T2 DE 69719301 T2 DE69719301 T2 DE 69719301T2 DE 69719301 T DE69719301 T DE 69719301T DE 69719301 T DE69719301 T DE 69719301T DE 69719301 T2 DE69719301 T2 DE 69719301T2
Authority
DE
Germany
Prior art keywords
volatile memory
quality information
storing quality
memory chip
memory locations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69719301T
Other languages
English (en)
Other versions
DE69719301D1 (de
Inventor
Giuseppe Savarese
Zenzo Maurizio Di
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Italia SRL
Texas Instruments Inc
Original Assignee
Texas Instruments Italia SRL
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Italia SRL, Texas Instruments Inc filed Critical Texas Instruments Italia SRL
Application granted granted Critical
Publication of DE69719301D1 publication Critical patent/DE69719301D1/de
Publication of DE69719301T2 publication Critical patent/DE69719301T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/006—Identification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69719301T 1996-12-18 1997-12-15 Flüchtiger Speicherchip mit nicht-flüchtigen Speicherplätzen zur Speicherung von Qualitätsinformation Expired - Lifetime DE69719301T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT96RM000880A IT1290156B1 (it) 1996-12-18 1996-12-18 Chip di memoria contenente un registro di memoria non volatile per la memorizzazione permanente di informazioni relative alla qualita' del

Publications (2)

Publication Number Publication Date
DE69719301D1 DE69719301D1 (de) 2003-04-03
DE69719301T2 true DE69719301T2 (de) 2003-12-11

Family

ID=11404601

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69719301T Expired - Lifetime DE69719301T2 (de) 1996-12-18 1997-12-15 Flüchtiger Speicherchip mit nicht-flüchtigen Speicherplätzen zur Speicherung von Qualitätsinformation

Country Status (7)

Country Link
US (1) US6130442A (de)
EP (1) EP0849675B1 (de)
JP (1) JPH10284692A (de)
DE (1) DE69719301T2 (de)
IT (1) IT1290156B1 (de)
SG (1) SG67460A1 (de)
TW (1) TW397983B (de)

Families Citing this family (30)

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US6100486A (en) 1998-08-13 2000-08-08 Micron Technology, Inc. Method for sorting integrated circuit devices
US5927512A (en) * 1997-01-17 1999-07-27 Micron Technology, Inc. Method for sorting integrated circuit devices
US5915231A (en) 1997-02-26 1999-06-22 Micron Technology, Inc. Method in an integrated circuit (IC) manufacturing process for identifying and redirecting IC's mis-processed during their manufacture
US5856923A (en) 1997-03-24 1999-01-05 Micron Technology, Inc. Method for continuous, non lot-based integrated circuit manufacturing
US5907492A (en) * 1997-06-06 1999-05-25 Micron Technology, Inc. Method for using data regarding manufacturing procedures integrated circuits (IC's) have undergone, such as repairs, to select procedures the IC's will undergo, such as additional repairs
US7120513B1 (en) 1997-06-06 2006-10-10 Micron Technology, Inc. Method for using data regarding manufacturing procedures integrated circuits (ICS) have undergone, such as repairs, to select procedures the ICS will undergo, such as additional repairs
DE19951048C2 (de) 1999-10-22 2002-11-21 Infineon Technologies Ag Verfahren zur Identifizierung einer integrierten Schaltung
DE19963689A1 (de) * 1999-12-29 2001-07-12 Infineon Technologies Ag Schaltungsanordnung eines integrierten Halbleiterspeichers zum Speichern von Adressen fehlerhafter Speicherzellen
US7802155B2 (en) * 2000-01-06 2010-09-21 Super Talent Electronics, Inc. Non-volatile memory device manufacturing process testing systems and methods thereof
US6553521B1 (en) * 2000-02-24 2003-04-22 Infineon Technologies, Richmond L.P. Method for efficient analysis semiconductor failures
US7269765B1 (en) * 2000-04-13 2007-09-11 Micron Technology, Inc. Method and apparatus for storing failing part locations in a module
DE10034878C2 (de) * 2000-07-18 2003-12-04 Infineon Technologies Ag Verfahren zum Überprüfen eines Bauelementes und Bauelement mit Testspeicher
JP4413406B2 (ja) * 2000-10-03 2010-02-10 株式会社東芝 不揮発性半導体メモリ及びそのテスト方法
DE10102349C1 (de) 2001-01-19 2002-08-08 Infineon Technologies Ag Verfahren und Schaltungsanordnung zur Kennzeichnung einer Betriebseigenschaft einer integrierten Schaltung
DE10103991C1 (de) * 2001-01-30 2002-06-06 Infineon Technologies Ag Verfahren zur Ermittlung der Temperatur eines Halbleiterbauelements insbesondere beim Fehlertest
DE10115280C2 (de) * 2001-03-28 2003-12-24 Infineon Technologies Ag Verfahren zum Klassifizieren von Bauelementen
US6605478B2 (en) * 2001-03-30 2003-08-12 Appleid Materials, Inc, Kill index analysis for automatic defect classification in semiconductor wafers
DE10139608B4 (de) * 2001-08-11 2007-05-16 Nucellsys Gmbh Brennstoffzellenanlage mit einem Gaserzeugungssystem und einem Brennstoffzellensystem und deren Verwendung
US6639418B2 (en) 2001-11-21 2003-10-28 Taiwan Semiconductor Manufacturing Co., Ltd. Microelectronic fabrication die electrical probe apparatus electrical test method providing enhanced microelectronic fabrication die electrical test accuracy and efficiency
US7493534B2 (en) * 2003-08-29 2009-02-17 Hewlett-Packard Development Company, L.P. Memory error ranking
US7484065B2 (en) 2004-04-20 2009-01-27 Hewlett-Packard Development Company, L.P. Selective memory allocation
US7814377B2 (en) * 2004-07-09 2010-10-12 Sandisk Corporation Non-volatile memory system with self test capability
JP2008108326A (ja) * 2006-10-24 2008-05-08 Toshiba Corp 記憶装置およびその自己テスト方法
US20090288057A1 (en) * 2008-05-15 2009-11-19 Texas Instruments Incorporated System and Method for Ordering the Selection of Integrated Circuit Chips
US7925939B2 (en) * 2008-09-26 2011-04-12 Macronix International Co., Ltd Pre-code device, and pre-code system and pre-coding method thererof
TWI394168B (zh) * 2008-10-31 2013-04-21 Moai Electronics Corp Memory test method
US8621324B2 (en) * 2010-12-10 2013-12-31 Qualcomm Incorporated Embedded DRAM having low power self-correction capability
US9583219B2 (en) 2014-09-27 2017-02-28 Qualcomm Incorporated Method and apparatus for in-system repair of memory in burst refresh
US10290354B1 (en) * 2017-10-31 2019-05-14 Sandisk Technologies Llc Partial memory die
TWI714169B (zh) * 2019-07-17 2020-12-21 美商第一檢測有限公司 記憶體測試方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3828988A1 (de) * 1988-08-26 1990-03-01 Bosch Gmbh Robert Herstellungsverfahren fuer ein elektronisches geraet
JP2765771B2 (ja) * 1991-08-07 1998-06-18 ローム株式会社 半導体記憶装置の試験方法
US5256578A (en) * 1991-12-23 1993-10-26 Motorola, Inc. Integral semiconductor wafer map recording
JP3659981B2 (ja) * 1992-07-09 2005-06-15 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド ダイ特定情報に特徴付けられるダイ上の集積回路を含む装置
EP0721645B1 (de) * 1993-09-30 2001-05-09 Macronix International Co., Ltd. Automatische testschaltung mit nichtflüchtigem schreiben der zustandsinformation
GB9411950D0 (en) * 1994-06-15 1994-08-03 Deas Alexander R Memory test system
US5895962A (en) * 1996-06-13 1999-04-20 Micron Technology, Inc. Structure and a method for storing information in a semiconductor device
US5907492A (en) * 1997-06-06 1999-05-25 Micron Technology, Inc. Method for using data regarding manufacturing procedures integrated circuits (IC's) have undergone, such as repairs, to select procedures the IC's will undergo, such as additional repairs

Also Published As

Publication number Publication date
ITRM960880A0 (it) 1996-12-18
IT1290156B1 (it) 1998-10-19
ITRM960880A1 (it) 1998-06-18
EP0849675A2 (de) 1998-06-24
US6130442A (en) 2000-10-10
SG67460A1 (en) 1999-09-21
TW397983B (en) 2000-07-11
JPH10284692A (ja) 1998-10-23
EP0849675A3 (de) 1998-09-09
DE69719301D1 (de) 2003-04-03
EP0849675B1 (de) 2003-02-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition