DE69717356T2 - Verfahren zur Herstellung von Heteroübergang-Bipolartransistoren mit hoher Verstärkung - Google Patents
Verfahren zur Herstellung von Heteroübergang-Bipolartransistoren mit hoher VerstärkungInfo
- Publication number
- DE69717356T2 DE69717356T2 DE69717356T DE69717356T DE69717356T2 DE 69717356 T2 DE69717356 T2 DE 69717356T2 DE 69717356 T DE69717356 T DE 69717356T DE 69717356 T DE69717356 T DE 69717356T DE 69717356 T2 DE69717356 T2 DE 69717356T2
- Authority
- DE
- Germany
- Prior art keywords
- production
- bipolar transistors
- heterojunction bipolar
- high amplification
- amplification
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000003321 amplification Effects 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 238000003199 nucleic acid amplification method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/6631—Bipolar junction transistors [BJT] with an active layer made of a group 13/15 material
- H01L29/66318—Heterojunction transistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/072—Heterojunctions
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/10—Lift-off masking
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/926—Dummy metallization
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/944—Shadow
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/945—Special, e.g. metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/951—Lift-off
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/676,697 US5804487A (en) | 1996-07-10 | 1996-07-10 | Method of fabricating high βHBT devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69717356D1 DE69717356D1 (de) | 2003-01-09 |
| DE69717356T2 true DE69717356T2 (de) | 2003-12-04 |
Family
ID=24715600
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69717356T Expired - Lifetime DE69717356T2 (de) | 1996-07-10 | 1997-07-02 | Verfahren zur Herstellung von Heteroübergang-Bipolartransistoren mit hoher Verstärkung |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US5804487A (de) |
| EP (1) | EP0818810B1 (de) |
| JP (1) | JP2952217B2 (de) |
| KR (1) | KR100248557B1 (de) |
| DE (1) | DE69717356T2 (de) |
Families Citing this family (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5804487A (en) * | 1996-07-10 | 1998-09-08 | Trw Inc. | Method of fabricating high βHBT devices |
| JP2001510636A (ja) * | 1997-02-03 | 2001-07-31 | ザ ウィタカー コーポレーション | ヘテロジャンクションバイポーラトランジスタにおける不動化棚を製造する自己整合方法 |
| DE19852852A1 (de) * | 1998-11-11 | 2000-05-18 | Inst Halbleiterphysik Gmbh | Lithographieverfahren zur Emitterstrukturierung von Bipolartransistoren |
| US6531369B1 (en) | 2000-03-01 | 2003-03-11 | Applied Micro Circuits Corporation | Heterojunction bipolar transistor (HBT) fabrication using a selectively deposited silicon germanium (SiGe) |
| FR2809532B1 (fr) * | 2000-05-23 | 2003-09-26 | St Microelectronics Sa | Procede de fabrication de circuits semiconducteurs double face |
| US6566693B1 (en) | 2000-09-19 | 2003-05-20 | Hrl Laboratories, Llc | Reduced capacitance scaled HBT using a separate base post layer |
| US6610143B2 (en) * | 2001-01-16 | 2003-08-26 | Semiconductor Components Industries Llc | Method of manufacturing a semiconductor component |
| DE10104776A1 (de) * | 2001-02-02 | 2002-08-22 | Infineon Technologies Ag | Bipolartransistor und Verfahren zu dessen Herstellung |
| US6541346B2 (en) | 2001-03-20 | 2003-04-01 | Roger J. Malik | Method and apparatus for a self-aligned heterojunction bipolar transistor using dielectric assisted metal liftoff process |
| US6406965B1 (en) | 2001-04-19 | 2002-06-18 | Trw Inc. | Method of fabricating HBT devices |
| US6676843B2 (en) * | 2001-04-26 | 2004-01-13 | Hewlett-Packard Development Company, L.P. | Magnetically patterning conductors |
| US6605519B2 (en) | 2001-05-02 | 2003-08-12 | Unaxis Usa, Inc. | Method for thin film lift-off processes using lateral extended etching masks and device |
| US6469581B1 (en) | 2001-06-08 | 2002-10-22 | Trw Inc. | HEMT-HBT doherty microwave amplifier |
| US6864742B2 (en) * | 2001-06-08 | 2005-03-08 | Northrop Grumman Corporation | Application of the doherty amplifier as a predistortion circuit for linearizing microwave amplifiers |
| US6784056B2 (en) * | 2001-10-26 | 2004-08-31 | Texas Instruments Incorporated | Flash memory cell process using a hardmask |
| KR20030068733A (ko) * | 2002-02-16 | 2003-08-25 | 광전자 주식회사 | 평탄화 구조를 갖는 반도체 소자 및 그 제조방법 |
| US6569763B1 (en) | 2002-04-09 | 2003-05-27 | Northrop Grumman Corporation | Method to separate a metal film from an insulating film in a semiconductor device using adhesive tape |
| US6806129B1 (en) * | 2003-05-09 | 2004-10-19 | Agilent Technologies, Inc. | Self-aligned process using indium gallium arsenide etching to form reentry feature in heterojunction bipolar transistors |
| US7384727B2 (en) * | 2003-06-26 | 2008-06-10 | Micron Technology, Inc. | Semiconductor processing patterning methods |
| US7115532B2 (en) | 2003-09-05 | 2006-10-03 | Micron Technolgoy, Inc. | Methods of forming patterned photoresist layers over semiconductor substrates |
| US7026243B2 (en) * | 2003-10-20 | 2006-04-11 | Micron Technology, Inc. | Methods of forming conductive material silicides by reaction of metal with silicon |
| US6969677B2 (en) * | 2003-10-20 | 2005-11-29 | Micron Technology, Inc. | Methods of forming conductive metal silicides by reaction of metal with silicon |
| US7153769B2 (en) * | 2004-04-08 | 2006-12-26 | Micron Technology, Inc. | Methods of forming a reaction product and methods of forming a conductive metal silicide by reaction of metal with silicon |
| US7067898B1 (en) | 2004-05-25 | 2006-06-27 | Hrl Laboratories, Llc | Semiconductor device having a self-aligned base contact and narrow emitter |
| US7119031B2 (en) * | 2004-06-28 | 2006-10-10 | Micron Technology, Inc. | Methods of forming patterned photoresist layers over semiconductor substrates |
| KR20070046141A (ko) * | 2004-08-31 | 2007-05-02 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | 층 구조에서 다중-스테이지 리세스와 다중-리세스된게이트를 구비한 전계 효과 트랜지스터를 생산하기 위한방법 |
| US7241705B2 (en) * | 2004-09-01 | 2007-07-10 | Micron Technology, Inc. | Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects |
| US7598148B1 (en) | 2004-10-15 | 2009-10-06 | Fields Charles H | Non-self-aligned heterojunction bipolar transistor and a method for preparing a non-self-aligned heterojunction bipolar transistor |
| US7875523B1 (en) | 2004-10-15 | 2011-01-25 | Hrl Laboratories, Llc | HBT with emitter electrode having planar side walls |
| US7396731B1 (en) * | 2004-10-15 | 2008-07-08 | Hrl Laboratories, Llc | Method for preparing a non-self-aligned heterojunction bipolar transistor with a small emitter-to-base spacing |
| KR100636595B1 (ko) * | 2004-11-09 | 2006-10-23 | 한국전자통신연구원 | 이종접합 바이폴라 트랜지스터의 제조방법 |
| JP2006202862A (ja) * | 2005-01-19 | 2006-08-03 | Sony Corp | ヘテロ接合半導体装置及びその製造方法 |
| US7368764B1 (en) | 2005-04-18 | 2008-05-06 | Hrl Laboratories, Llc | Heterojunction bipolar transistor and method to make a heterojunction bipolar transistor |
| US20070134943A2 (en) * | 2006-04-02 | 2007-06-14 | Dunnrowicz Clarence J | Subtractive - Additive Edge Defined Lithography |
| US7960097B2 (en) * | 2007-10-30 | 2011-06-14 | Triquint Semiconductor, Inc. | Methods of minimizing etch undercut and providing clean metal liftoff |
| CN100580898C (zh) * | 2007-11-28 | 2010-01-13 | 中国科学院微电子研究所 | 一种引出亚微米hbt发射极/hemt栅的方法 |
| CN105225947A (zh) * | 2015-09-24 | 2016-01-06 | 中国电子科技集团公司第五十五研究所 | 磷化铟异质结晶体管发射区材料干湿法结合刻蚀制作方法 |
| CN106098547B (zh) * | 2016-06-20 | 2018-10-02 | 中山德华芯片技术有限公司 | 采用电化学工艺制作GaAs MMIC背面通孔的方法 |
| US10460326B2 (en) | 2017-10-24 | 2019-10-29 | Global Circuit Innovations, Inc. | Counterfeit integrated circuit detection by comparing integrated circuit signature to reference signature |
| CN107895696A (zh) * | 2017-11-03 | 2018-04-10 | 厦门市三安集成电路有限公司 | 一种高精度的hbt制备工艺 |
| CN113016053A (zh) * | 2018-11-16 | 2021-06-22 | 朗姆研究公司 | 气泡缺陷减少 |
| CN116759310B (zh) * | 2023-08-23 | 2023-11-10 | 北京无线电测量研究所 | 一种使用正型光刻胶的金属剥离方法 |
Family Cites Families (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3169573D1 (en) * | 1980-12-31 | 1985-05-02 | Ibm | A method of depositing a polymer film on a substrate |
| EP0240307B1 (de) * | 1986-04-01 | 1993-12-22 | Matsushita Electric Industrial Co., Ltd. | Bipolarer Transistor und sein Herstellungsverfahren |
| JPS63276267A (ja) * | 1987-05-08 | 1988-11-14 | Fujitsu Ltd | 半導体装置の製造方法 |
| US5124270A (en) * | 1987-09-18 | 1992-06-23 | Kabushiki Kaisha Toshiba | Bipolar transistor having external base region |
| US4818712A (en) * | 1987-10-13 | 1989-04-04 | Northrop Corporation | Aluminum liftoff masking process and product |
| US5159423A (en) * | 1988-11-02 | 1992-10-27 | Hughes Aircraft Company | Self-aligned, planar heterojunction bipolar transistor |
| US5097312A (en) * | 1989-02-16 | 1992-03-17 | Texas Instruments Incorporated | Heterojunction bipolar transistor and integration of same with field effect device |
| US5106766A (en) * | 1989-07-11 | 1992-04-21 | At&T Bell Laboratories | Method of making a semiconductor device that comprises p-type III-V semiconductor material |
| JPH03229426A (ja) * | 1989-11-29 | 1991-10-11 | Texas Instr Inc <Ti> | 集積回路及びその製造方法 |
| JP2918275B2 (ja) * | 1990-03-30 | 1999-07-12 | 株式会社東芝 | 半導体装置 |
| EP0478923B1 (de) * | 1990-08-31 | 1997-11-05 | Texas Instruments Incorporated | Verfahren zum Herstellen selbst-ausrichtender bipolarer Transistoren mit Heteroübergang |
| JP2618539B2 (ja) * | 1991-03-04 | 1997-06-11 | シャープ株式会社 | 半導体装置の製造方法 |
| US5208184A (en) * | 1991-04-30 | 1993-05-04 | Texas Instruments Incorporated | P-n junction diffusion barrier employing mixed dopants |
| US5446294A (en) * | 1991-07-31 | 1995-08-29 | Texas Instruments Incorporated | Microwave heterojunction bipolar transistors suitable for low-power, low-noise and high-power applications and method for fabricating same |
| US5272095A (en) * | 1992-03-18 | 1993-12-21 | Research Triangle Institute | Method of manufacturing heterojunction transistors with self-aligned metal contacts |
| US5298439A (en) * | 1992-07-13 | 1994-03-29 | Texas Instruments Incorporated | 1/f noise reduction in heterojunction bipolar transistors |
| JPH0645347A (ja) * | 1992-07-24 | 1994-02-18 | Mitsubishi Electric Corp | ヘテロバイポーラトランジスタ及びその製造方法 |
| US5318916A (en) * | 1992-07-31 | 1994-06-07 | Research Triangle Institute | Symmetric self-aligned processing |
| US5471078A (en) * | 1992-09-09 | 1995-11-28 | Texas Instruments Incorporated | Self-aligned heterojunction bipolar transistor |
| FR2697945B1 (fr) * | 1992-11-06 | 1995-01-06 | Thomson Csf | Procédé de gravure d'une hétérostructure de matériaux du groupe III-V. |
| JP3502651B2 (ja) * | 1993-02-08 | 2004-03-02 | トリクイント セミコンダクター テキサス、エルピー | 電極形成法 |
| US5468659A (en) * | 1994-03-10 | 1995-11-21 | Hughes Aircraft Company | Reduction of base-collector junction parasitic capacitance of heterojunction bipolar transistors |
| US5486483A (en) * | 1994-09-27 | 1996-01-23 | Trw Inc. | Method of forming closely spaced metal electrodes in a semiconductor device |
| US5485025A (en) * | 1994-12-02 | 1996-01-16 | Texas Instruments Incorporated | Depleted extrinsic emitter of collector-up heterojunction bipolar transistor |
| JPH0945692A (ja) * | 1995-07-27 | 1997-02-14 | Sharp Corp | 縦型構造トランジスタ及びその製造方法、並びに半導体装置 |
| US5736417A (en) * | 1996-05-13 | 1998-04-07 | Trw Inc. | Method of fabricating double photoresist layer self-aligned heterojunction bipolar transistor |
| US5804487A (en) * | 1996-07-10 | 1998-09-08 | Trw Inc. | Method of fabricating high βHBT devices |
-
1996
- 1996-07-10 US US08/676,697 patent/US5804487A/en not_active Expired - Lifetime
-
1997
- 1997-07-02 DE DE69717356T patent/DE69717356T2/de not_active Expired - Lifetime
- 1997-07-02 EP EP97111065A patent/EP0818810B1/de not_active Expired - Lifetime
- 1997-07-07 KR KR1019970031350A patent/KR100248557B1/ko not_active IP Right Cessation
- 1997-07-08 JP JP9182294A patent/JP2952217B2/ja not_active Expired - Lifetime
-
1998
- 1998-05-07 US US09/074,199 patent/US5994194A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1098053A (ja) | 1998-04-14 |
| EP0818810B1 (de) | 2002-11-27 |
| US5994194A (en) | 1999-11-30 |
| US5804487A (en) | 1998-09-08 |
| JP2952217B2 (ja) | 1999-09-20 |
| KR100248557B1 (ko) | 2000-03-15 |
| DE69717356D1 (de) | 2003-01-09 |
| EP0818810A2 (de) | 1998-01-14 |
| EP0818810A3 (de) | 1998-03-04 |
| KR980012114A (ko) | 1998-04-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8332 | No legal effect for de | ||
| 8370 | Indication of lapse of patent is to be deleted | ||
| 8364 | No opposition during term of opposition | ||
| 8327 | Change in the person/name/address of the patent owner |
Owner name: NORTHROP GRUMMAN CORP. (N.D.GES.D.STAATES DELAWARE |
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| R082 | Change of representative |
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