DE69713855D1 - Integrierte Halbleiterspeicheranordnung und Kommunikationsverfahren dafür - Google Patents

Integrierte Halbleiterspeicheranordnung und Kommunikationsverfahren dafür

Info

Publication number
DE69713855D1
DE69713855D1 DE69713855T DE69713855T DE69713855D1 DE 69713855 D1 DE69713855 D1 DE 69713855D1 DE 69713855 T DE69713855 T DE 69713855T DE 69713855 T DE69713855 T DE 69713855T DE 69713855 D1 DE69713855 D1 DE 69713855D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
communication method
method therefor
integrated semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69713855T
Other languages
English (en)
Inventor
Robert Warren
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Ltd Great Britain
Original Assignee
STMicroelectronics Ltd Great Britain
SGS Thomson Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Ltd Great Britain, SGS Thomson Microelectronics Ltd filed Critical STMicroelectronics Ltd Great Britain
Application granted granted Critical
Publication of DE69713855D1 publication Critical patent/DE69713855D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3648—Software debugging using additional hardware
    • G06F11/3656—Software debugging using additional hardware using a specific debug interface
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces
DE69713855T 1996-10-31 1997-10-20 Integrierte Halbleiterspeicheranordnung und Kommunikationsverfahren dafür Expired - Lifetime DE69713855D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB9622682.4A GB9622682D0 (en) 1996-10-31 1996-10-31 An integrated circuit device and method of communication therewith

Publications (1)

Publication Number Publication Date
DE69713855D1 true DE69713855D1 (de) 2002-08-14

Family

ID=10802225

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69713855T Expired - Lifetime DE69713855D1 (de) 1996-10-31 1997-10-20 Integrierte Halbleiterspeicheranordnung und Kommunikationsverfahren dafür

Country Status (5)

Country Link
US (1) US6125416A (de)
EP (1) EP0840219B1 (de)
JP (1) JP3929573B2 (de)
DE (1) DE69713855D1 (de)
GB (1) GB9622682D0 (de)

Families Citing this family (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7421633B2 (en) * 2005-03-21 2008-09-02 Texas Instruments Incorporated Controller receiving combined TMS/TDI and suppyling separate TMS and TDI
GB9805479D0 (en) * 1998-03-13 1998-05-13 Sgs Thomson Microelectronics Microcomputer
GB9809197D0 (en) * 1998-04-29 1998-07-01 Sgs Thomson Microelectronics Microcomputer with packet translation for event packets and memory acess packets
GB9809203D0 (en) * 1998-04-29 1998-07-01 Sgs Thomson Microelectronics Packet distribution in a microcomputer
GB9818377D0 (en) * 1998-08-21 1998-10-21 Sgs Thomson Microelectronics An integrated circuit with multiple processing cores
US6571359B1 (en) * 1999-12-13 2003-05-27 Intel Corporation Systems and methods for testing processors
US6567932B2 (en) * 1999-10-01 2003-05-20 Stmicroelectronics Limited System and method for communicating with an integrated circuit
US7100027B1 (en) 1999-12-13 2006-08-29 Intel Corporation System and method for reproducing system executions using a replay handler
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US6823282B1 (en) * 2000-10-26 2004-11-23 Cypress Semiconductor Corporation Test architecture for microcontroller providing for a serial communication interface
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US8160864B1 (en) 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
US6914892B1 (en) * 2001-01-29 2005-07-05 Advanced Micro Devices, Inc. Arrangement for testing network switch expansion port data by converting to media independent interface format
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US8069405B1 (en) 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
US7770113B1 (en) 2001-11-19 2010-08-03 Cypress Semiconductor Corporation System and method for dynamically generating a configuration datasheet
US7774190B1 (en) 2001-11-19 2010-08-10 Cypress Semiconductor Corporation Sleep and stall in an in-circuit emulation system
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US20030158934A1 (en) * 2002-02-05 2003-08-21 Ben Chang Condition monitor and controller for a server system
US8103497B1 (en) 2002-03-28 2012-01-24 Cypress Semiconductor Corporation External interface for event architecture
US7308608B1 (en) 2002-05-01 2007-12-11 Cypress Semiconductor Corporation Reconfigurable testing system and method
US7761845B1 (en) 2002-09-09 2010-07-20 Cypress Semiconductor Corporation Method for parameterizing a user module
US7216276B1 (en) 2003-02-27 2007-05-08 Marvell International Ltd. Apparatus and method for testing and debugging an integrated circuit
US7444571B1 (en) * 2003-02-27 2008-10-28 Marvell International Ltd. Apparatus and method for testing and debugging an integrated circuit
US7496818B1 (en) 2003-02-27 2009-02-24 Marvell International Ltd. Apparatus and method for testing and debugging an integrated circuit
US7197680B2 (en) * 2003-04-17 2007-03-27 Arm Limited Communication interface for diagnostic circuits of an integrated circuit
US7295049B1 (en) 2004-03-25 2007-11-13 Cypress Semiconductor Corporation Method and circuit for rapid alignment of signals
US8286125B2 (en) 2004-08-13 2012-10-09 Cypress Semiconductor Corporation Model for a hardware device-independent method of defining embedded firmware for programmable systems
US8069436B2 (en) 2004-08-13 2011-11-29 Cypress Semiconductor Corporation Providing hardware independence to automate code generation of processing device firmware
US7332976B1 (en) 2005-02-04 2008-02-19 Cypress Semiconductor Corporation Poly-phase frequency synthesis oscillator
US7400183B1 (en) 2005-05-05 2008-07-15 Cypress Semiconductor Corporation Voltage controlled oscillator delay cell and method
US8089461B2 (en) 2005-06-23 2012-01-03 Cypress Semiconductor Corporation Touch wake for electronic devices
WO2007021732A2 (en) * 2005-08-09 2007-02-22 Texas Instruments Incorporated Selectable jtag or trace access with data store and output
US8085067B1 (en) 2005-12-21 2011-12-27 Cypress Semiconductor Corporation Differential-to-single ended signal converter circuit and method
US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
US8092083B2 (en) 2007-04-17 2012-01-10 Cypress Semiconductor Corporation Temperature sensor with digital bandgap
US7737724B2 (en) 2007-04-17 2010-06-15 Cypress Semiconductor Corporation Universal digital block interconnection and channel routing
US8516025B2 (en) 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8130025B2 (en) 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US8040266B2 (en) 2007-04-17 2011-10-18 Cypress Semiconductor Corporation Programmable sigma-delta analog-to-digital converter
US9564902B2 (en) 2007-04-17 2017-02-07 Cypress Semiconductor Corporation Dynamically configurable and re-configurable data path
US8266575B1 (en) 2007-04-25 2012-09-11 Cypress Semiconductor Corporation Systems and methods for dynamically reconfiguring a programmable system on a chip
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US8065653B1 (en) 2007-04-25 2011-11-22 Cypress Semiconductor Corporation Configuration of programmable IC design elements
US8049569B1 (en) 2007-09-05 2011-11-01 Cypress Semiconductor Corporation Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system
CN109783419A (zh) * 2018-12-29 2019-05-21 安徽皖兴通信息技术有限公司 一种通信设备背板控制总线的方法
US11138134B2 (en) * 2019-05-22 2021-10-05 Nxp Usa, Inc. Non-intrusive semihosting solution for debug using direct memory access implementation-based library
CN110958224A (zh) * 2019-11-05 2020-04-03 郑州信大捷安信息技术股份有限公司 远程串口调试系统及方法
US11209483B2 (en) * 2020-02-28 2021-12-28 Micron Technology, Inc. Controller accessible test access port controls

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4641263A (en) * 1982-05-17 1987-02-03 Digital Associates Corporation Controller system or emulating local parallel minicomputer/printer interface and transferring serial data to remote line printer
DE3584690D1 (de) * 1984-06-20 1992-01-02 Convex Computer Corp Ein-/ausgabebus fuer rechner.
US4660170A (en) * 1985-04-29 1987-04-21 General Dynamics, Pomona Division System for providing reprogramming data to an embedded processor
US5086388A (en) * 1988-03-18 1992-02-04 Hitachi Maxell, Ltd. Semiconductor serial/parallel-parallel/serial file memory and storage system
US5005151A (en) * 1988-05-13 1991-04-02 Dallas Semiconductor Corporation Interleaved arbitration scheme for interfacing parallel and serial ports to a parallel system port
US5734920A (en) * 1993-06-28 1998-03-31 Nippondenso Co., Ltd. Input/output processing IC
DE69415600T2 (de) * 1993-07-28 1999-07-15 Koninkl Philips Electronics Nv Mikrokontroller mit hardwaremässiger Fehlerbeseitigungsunterstützung nach dem Boundary-Scanverfahren
EP0652516A1 (de) * 1993-11-03 1995-05-10 Advanced Micro Devices, Inc. Integrierter Mikroprozessor
JP2752592B2 (ja) * 1994-12-28 1998-05-18 日本ヒューレット・パッカード株式会社 マイクロプロセッサ、マイクロプロセッサ−デバッグツール間信号伝送方法及びトレース方法
JPH0922393A (ja) * 1995-07-06 1997-01-21 Mitsubishi Electric Corp 通信機能を有するワンチップフラッシュメモリ装置

Also Published As

Publication number Publication date
EP0840219A1 (de) 1998-05-06
GB9622682D0 (en) 1997-01-08
JPH10207732A (ja) 1998-08-07
EP0840219B1 (de) 2002-07-10
US6125416A (en) 2000-09-26
JP3929573B2 (ja) 2007-06-13

Similar Documents

Publication Publication Date Title
DE69713856D1 (de) Integrierte Halbleiterspeicheranordnung und Kommunikationsverfahren dafür
DE69713855D1 (de) Integrierte Halbleiterspeicheranordnung und Kommunikationsverfahren dafür
DE69942640D1 (de) Halbleiterspeichervorrichtung und Speicherverfahren dafür
DE69721411D1 (de) Halbleiteranordnung und Herstellungsverfahren dafür
DE69737588D1 (de) Halbleiteranordnung und Herstellungsverfahren dafür
DE69637488D1 (de) Halbleiter und Halbleitermodul
DE69701119T2 (de) Chipantenne und Antennenvorrichtung
DE69527330T2 (de) Halbleiteranordnung und Herstellungsverfahren
DE69518343T2 (de) Halbleiterspeicheranordnung
DE69637769D1 (de) Halbleitervorrichtung
DE69738008D1 (de) Halbleiterbauelement
DE69521159D1 (de) Halbleiterspeicheranordnung
DE69422901D1 (de) Halbleiterspeicheranordnung
DE69727373D1 (de) Halbleitervorrichtung
DE69628902D1 (de) Halbleitervorrichtung und Halbleitermodul
KR960009107A (ko) 반도체장치와 그 제조방법
DE69637698D1 (de) Halbleitervorrichtung
DE69512700T2 (de) Halbleiterspeicheranordnung
DE69727608D1 (de) Halbleiterlaservorrichtung und zugehöriges Entwurfsverfahren
KR960012496A (ko) 반도체기억장치 및 그 제조방법
DE69637809D1 (de) Halbleiteranordnung
KR960012510A (ko) 반도체 메모리 장치
DE69840486D1 (de) Halbleiterspeicher und Zugriffsverfahren hierauf
DE69714379T2 (de) Integrierte Halbleiterspeicheranordnung und Kommunikationsverfahren dafür
DE69421108D1 (de) Halbleiterspeicheranordnung und Speicher-Initialisierungsverfahren

Legal Events

Date Code Title Description
8332 No legal effect for de