DE69626155D1 - Rechenwerk - Google Patents

Rechenwerk

Info

Publication number
DE69626155D1
DE69626155D1 DE69626155T DE69626155T DE69626155D1 DE 69626155 D1 DE69626155 D1 DE 69626155D1 DE 69626155 T DE69626155 T DE 69626155T DE 69626155 T DE69626155 T DE 69626155T DE 69626155 D1 DE69626155 D1 DE 69626155D1
Authority
DE
Germany
Prior art keywords
calculator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69626155T
Other languages
English (en)
Inventor
Nathan Mackenzie Sidwell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Ltd Great Britain
Original Assignee
STMicroelectronics Ltd Great Britain
SGS Thomson Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Ltd Great Britain, SGS Thomson Microelectronics Ltd filed Critical STMicroelectronics Ltd Great Britain
Application granted granted Critical
Publication of DE69626155D1 publication Critical patent/DE69626155D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
DE69626155T 1995-07-18 1996-05-17 Rechenwerk Expired - Lifetime DE69626155D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB9514684.1A GB9514684D0 (en) 1995-07-18 1995-07-18 An arithmetic unit

Publications (1)

Publication Number Publication Date
DE69626155D1 true DE69626155D1 (de) 2003-03-20

Family

ID=10777851

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69626155T Expired - Lifetime DE69626155D1 (de) 1995-07-18 1996-05-17 Rechenwerk

Country Status (4)

Country Link
US (1) US5859789A (de)
EP (1) EP0754998B1 (de)
DE (1) DE69626155D1 (de)
GB (1) GB9514684D0 (de)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5996066A (en) * 1996-10-10 1999-11-30 Sun Microsystems, Inc. Partitioned multiply and add/subtract instruction for CPU with integrated graphics functions
JP3033511B2 (ja) * 1997-03-03 2000-04-17 富士ゼロックス株式会社 大規模積和演算処理方法及び装置
EP0930564B1 (de) * 1997-04-08 2006-11-15 Sony Computer Entertainment Inc. Verfahren zum Ausführen von arithmetischen und logischen Operationen in Feldern eines Wort-Operanden
US6085213A (en) * 1997-10-23 2000-07-04 Advanced Micro Devices, Inc. Method and apparatus for simultaneously multiplying two or more independent pairs of operands and summing the products
US6144980A (en) * 1998-01-28 2000-11-07 Advanced Micro Devices, Inc. Method and apparatus for performing multiple types of multiplication including signed and unsigned multiplication
US6115733A (en) * 1997-10-23 2000-09-05 Advanced Micro Devices, Inc. Method and apparatus for calculating reciprocals and reciprocal square roots
EP1031073B1 (de) * 1997-10-23 2003-09-24 Advanced Micro Devices, Inc. Ein verfahren und gerät mit mehreren arithmetischen funktionen
US6223192B1 (en) 1997-10-23 2001-04-24 Advanced Micro Devices, Inc. Bipartite look-up table with output values having minimized absolute error
US6223198B1 (en) 1998-08-14 2001-04-24 Advanced Micro Devices, Inc. Method and apparatus for multi-function arithmetic
US6134574A (en) * 1998-05-08 2000-10-17 Advanced Micro Devices, Inc. Method and apparatus for achieving higher frequencies of exactly rounded results
US6115732A (en) * 1998-05-08 2000-09-05 Advanced Micro Devices, Inc. Method and apparatus for compressing intermediate products
US6269384B1 (en) 1998-03-27 2001-07-31 Advanced Micro Devices, Inc. Method and apparatus for rounding and normalizing results within a multiplier
US6393554B1 (en) 1998-01-28 2002-05-21 Advanced Micro Devices, Inc. Method and apparatus for performing vector and scalar multiplication and calculating rounded products
US6202077B1 (en) * 1998-02-24 2001-03-13 Motorola, Inc. SIMD data processing extended precision arithmetic operand format
US6275926B1 (en) * 1999-04-02 2001-08-14 Via-Cyrix, Inc. System and method for writing back multiple results over a single-result bus and processor employing the same
WO2001016702A1 (en) 1999-09-01 2001-03-08 Intel Corporation Register set used in multithreaded parallel processor architecture
US6598128B1 (en) 1999-10-01 2003-07-22 Hitachi, Ltd. Microprocessor having improved memory management unit and cache memory
US6412043B1 (en) 1999-10-01 2002-06-25 Hitachi, Ltd. Microprocessor having improved memory management unit and cache memory
US6553460B1 (en) 1999-10-01 2003-04-22 Hitachi, Ltd. Microprocessor having improved memory management unit and cache memory
US6772325B1 (en) * 1999-10-01 2004-08-03 Hitachi, Ltd. Processor architecture and operation for exploiting improved branch control instruction
US6629207B1 (en) 1999-10-01 2003-09-30 Hitachi, Ltd. Method for loading instructions or data into a locked way of a cache memory
US7681018B2 (en) * 2000-08-31 2010-03-16 Intel Corporation Method and apparatus for providing large register address space while maximizing cycletime performance for a multi-threaded register file set
US20020053017A1 (en) * 2000-09-01 2002-05-02 Adiletta Matthew J. Register instructions for a multithreaded processor
US7437724B2 (en) * 2002-04-03 2008-10-14 Intel Corporation Registers for data transfers
GB2409064B (en) * 2003-12-09 2006-09-13 Advanced Risc Mach Ltd A data processing apparatus and method for performing in parallel a data processing operation on data elements
GB2409063B (en) * 2003-12-09 2006-07-12 Advanced Risc Mach Ltd Vector by scalar operations
GB2409059B (en) * 2003-12-09 2006-09-27 Advanced Risc Mach Ltd A data processing apparatus and method for moving data between registers and memory
GB2411976B (en) * 2003-12-09 2006-07-19 Advanced Risc Mach Ltd A data processing apparatus and method for moving data between registers and memory
GB2409067B (en) * 2003-12-09 2006-12-13 Advanced Risc Mach Ltd Endianess compensation within a SIMD data processing system
GB2411974C (en) * 2003-12-09 2009-09-23 Advanced Risc Mach Ltd Data shift operations
GB2409068A (en) * 2003-12-09 2005-06-15 Advanced Risc Mach Ltd Data element size control within parallel lanes of processing
GB2409060B (en) * 2003-12-09 2006-08-09 Advanced Risc Mach Ltd Moving data between registers of different register data stores
GB2409065B (en) * 2003-12-09 2006-10-25 Advanced Risc Mach Ltd Multiplexing operations in SIMD processing
GB2409062C (en) * 2003-12-09 2007-12-11 Advanced Risc Mach Ltd Aliasing data processing registers
GB2411973B (en) * 2003-12-09 2006-09-27 Advanced Risc Mach Ltd Constant generation in SMD processing
GB2409066B (en) * 2003-12-09 2006-09-27 Advanced Risc Mach Ltd A data processing apparatus and method for moving data between registers and memory
GB2409061B (en) * 2003-12-09 2006-09-13 Advanced Risc Mach Ltd Table lookup operation within a data processing system
GB2411975B (en) * 2003-12-09 2006-10-04 Advanced Risc Mach Ltd Data processing apparatus and method for performing arithmetic operations in SIMD data processing
GB2410097B (en) * 2004-01-13 2006-11-01 Advanced Risc Mach Ltd A data processing apparatus and method for performing data processing operations on floating point data elements
GB2411978B (en) * 2004-03-10 2007-04-04 Advanced Risc Mach Ltd Inserting bits within a data word
US9557994B2 (en) 2004-07-13 2017-01-31 Arm Limited Data processing apparatus and method for performing N-way interleaving and de-interleaving operations where N is an odd plural number
US20060149804A1 (en) * 2004-11-30 2006-07-06 International Business Machines Corporation Multiply-sum dot product instruction with mask and splat
US20080071851A1 (en) * 2006-09-20 2008-03-20 Ronen Zohar Instruction and logic for performing a dot-product operation
US9495724B2 (en) * 2006-10-31 2016-11-15 International Business Machines Corporation Single precision vector permute immediate with “word” vector write mask
US8332452B2 (en) * 2006-10-31 2012-12-11 International Business Machines Corporation Single precision vector dot product with “word” vector write mask
US20110072236A1 (en) * 2009-09-20 2011-03-24 Mimar Tibet Method for efficient and parallel color space conversion in a programmable processor
US9760371B2 (en) * 2011-12-22 2017-09-12 Intel Corporation Packed data operation mask register arithmetic combination processors, methods, systems, and instructions
EP3268969B1 (de) 2015-04-16 2019-06-05 Hewlett-Packard Enterprise Development LP Resistive speicheranordnungen zur durchführung von multiplikations- und akkumulationsoperationen

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114274A (ja) * 1981-12-28 1983-07-07 Hitachi Ltd デ−タ処理装置
US4888682A (en) * 1983-09-09 1989-12-19 International Business Machines Corp. Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers
JPS6057467A (ja) * 1983-09-09 1985-04-03 Nec Corp ベクトルデ−タ処理装置
US5081573A (en) * 1984-12-03 1992-01-14 Floating Point Systems, Inc. Parallel processing system
JPS6297060A (ja) * 1985-10-23 1987-05-06 Mitsubishi Electric Corp デイジタルシグナルプロセツサ
US5446651A (en) * 1993-11-30 1995-08-29 Texas Instruments Incorporated Split multiply operation

Also Published As

Publication number Publication date
US5859789A (en) 1999-01-12
EP0754998A1 (de) 1997-01-22
EP0754998B1 (de) 2003-02-12
GB9514684D0 (en) 1995-09-13

Similar Documents

Publication Publication Date Title
DE69626155D1 (de) Rechenwerk
FI951018A0 (fi) Hoeghastighetsdataoeverfoering i mobiltelesystem
DE69509637D1 (de) Rechnerhinweisanordnung
ATA135896A (de) Skibob
DE29709411U1 (de) Taschenrechner
ATE198470T1 (de) Alkenyl-benzoylguanidine
ATE240972T1 (de) Cyclopeptolide
ATA119896A (de) Scheibenmähwerk
DE29519970U1 (de) Einkaufsrechner
DE69626944D1 (de) Optischer Rechner
KR950034533U (ko) 계산기겸용 전화기
FI1900U1 (fi) Spejningsbraeda foer katter i hoeghus
FI2204U1 (fi) Lyftmekanism foer en saekerhetskant i en saeng
FI2190U1 (fi) Stoedkonstruktion foer sprutroer i en pappersmaskin/kartongmaskin
FI2050U1 (fi) Rullstol foer fastmontering i fordonsgolv
FI1872U1 (fi) I dryckesbackar anvaendbart reklammaterial
FI1803U1 (fi) Anordning i saollskopa
FI952415A0 (fi) Faerrkotrollsystem foer vaetskemaengden i en behaollare
DE29516271U1 (de) Florleger I
FI955358A0 (fi) Aotkomstfoerfarande foer tvaovaegskommunikation i kabeltelevisionssystem
FI954315A0 (fi) Vaendanordning foer i synnerhet kylanordningar foer skivformiga stycken
FI956200A0 (fi) Avvisarlistarrangemang i hisskorg
FI952490A0 (fi) Roerningsapparat foer i synnerhet kallroekning i hemhushaoll
FI953322A0 (fi) Foerpackningsapparatur foer i staplar frammabart styckegods
DE29514491U1 (de) Rechnereinheit

Legal Events

Date Code Title Description
8332 No legal effect for de