DE69614291T2 - (n+i) Ein/Ausgabekanälesteuerung, mit (n) Datenverwaltern, in einer homogenen Software-Programmierbetriebsumgebung - Google Patents

(n+i) Ein/Ausgabekanälesteuerung, mit (n) Datenverwaltern, in einer homogenen Software-Programmierbetriebsumgebung

Info

Publication number
DE69614291T2
DE69614291T2 DE69614291T DE69614291T DE69614291T2 DE 69614291 T2 DE69614291 T2 DE 69614291T2 DE 69614291 T DE69614291 T DE 69614291T DE 69614291 T DE69614291 T DE 69614291T DE 69614291 T2 DE69614291 T2 DE 69614291T2
Authority
DE
Germany
Prior art keywords
input
operating environment
output channel
channel control
software programming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69614291T
Other languages
English (en)
Other versions
DE69614291D1 (de
Inventor
R Carmichael
J M Ward
M A Winchell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Original Assignee
LSI Logic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LSI Logic Corp filed Critical LSI Logic Corp
Publication of DE69614291D1 publication Critical patent/DE69614291D1/de
Application granted granted Critical
Publication of DE69614291T2 publication Critical patent/DE69614291T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
DE69614291T 1995-03-17 1996-03-15 (n+i) Ein/Ausgabekanälesteuerung, mit (n) Datenverwaltern, in einer homogenen Software-Programmierbetriebsumgebung Expired - Lifetime DE69614291T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US40743995A 1995-03-17 1995-03-17

Publications (2)

Publication Number Publication Date
DE69614291D1 DE69614291D1 (de) 2001-09-13
DE69614291T2 true DE69614291T2 (de) 2001-12-06

Family

ID=23612093

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69614291T Expired - Lifetime DE69614291T2 (de) 1995-03-17 1996-03-15 (n+i) Ein/Ausgabekanälesteuerung, mit (n) Datenverwaltern, in einer homogenen Software-Programmierbetriebsumgebung

Country Status (4)

Country Link
US (1) US5894560A (de)
EP (1) EP0732659B1 (de)
JP (1) JPH08297628A (de)
DE (1) DE69614291T2 (de)

Families Citing this family (103)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6005849A (en) * 1997-09-24 1999-12-21 Emulex Corporation Full-duplex communication processor which can be used for fibre channel frames
US5999963A (en) * 1997-11-07 1999-12-07 Lucent Technologies, Inc. Move-to-rear list scheduling
US6092124A (en) * 1998-04-17 2000-07-18 Nvidia Corporation Method and apparatus for accelerating the rendering of images
US6332161B1 (en) * 1998-09-25 2001-12-18 Charles Schwab & Co., Inc. Customer web log-in architecture
US6240467B1 (en) * 1998-10-07 2001-05-29 International Business Machines Corporation Input/output operation request handling in a multi-host system
DE69923219T2 (de) 1998-11-26 2005-12-29 Matsushita Electric Industrial Co., Ltd., Kadoma Bildverarbeitungsgerät
US6330623B1 (en) 1999-01-08 2001-12-11 Vlsi Technology, Inc. System and method for maximizing DMA transfers of arbitrarily aligned data
US6381619B1 (en) * 1999-09-13 2002-04-30 Hewlett-Packard Company Computer data storage system with migration plan generator
US6571258B1 (en) * 1999-09-13 2003-05-27 Hewlett Packard Development Company L.P. Computer data storage system with parallelization migration plan generator
US6782465B1 (en) 1999-10-20 2004-08-24 Infineon Technologies North America Corporation Linked list DMA descriptor architecture
US6665746B1 (en) * 2000-03-31 2003-12-16 International Business Machine Corporation System and method for prioritized context switching for streaming data memory transfers
US6708283B1 (en) 2000-04-13 2004-03-16 Stratus Technologies, Bermuda Ltd. System and method for operating a system with redundant peripheral bus controllers
US6687851B1 (en) 2000-04-13 2004-02-03 Stratus Technologies Bermuda Ltd. Method and system for upgrading fault-tolerant systems
US6691257B1 (en) 2000-04-13 2004-02-10 Stratus Technologies Bermuda Ltd. Fault-tolerant maintenance bus protocol and method for using the same
US6735715B1 (en) 2000-04-13 2004-05-11 Stratus Technologies Bermuda Ltd. System and method for operating a SCSI bus with redundant SCSI adaptors
US6820213B1 (en) 2000-04-13 2004-11-16 Stratus Technologies Bermuda, Ltd. Fault-tolerant computer system with voter delay buffer
US6633996B1 (en) 2000-04-13 2003-10-14 Stratus Technologies Bermuda Ltd. Fault-tolerant maintenance bus architecture
US6901481B2 (en) 2000-04-14 2005-05-31 Stratus Technologies Bermuda Ltd. Method and apparatus for storing transactional information in persistent memory
US6802022B1 (en) 2000-04-14 2004-10-05 Stratus Technologies Bermuda Ltd. Maintenance of consistent, redundant mass storage images
US6697867B1 (en) 2000-07-25 2004-02-24 Sun Microsystems, Inc. System and method for accessing multiple groups of peripheral devices
US6845409B1 (en) * 2000-07-25 2005-01-18 Sun Microsystems, Inc. Data exchange methods for a switch which selectively forms a communication channel between a processing unit and multiple devices
US6874039B2 (en) * 2000-09-08 2005-03-29 Intel Corporation Method and apparatus for distributed direct memory access for systems on chip
US6785751B1 (en) * 2000-09-19 2004-08-31 Intel Corporation Method and apparatus for minimizing bus contention for I/O controller write operations
AU2002243341A1 (en) 2000-12-20 2002-07-24 Inrange Technologies Corporation Fibre channel port adapter
US6886171B2 (en) * 2001-02-20 2005-04-26 Stratus Technologies Bermuda Ltd. Caching for I/O virtual address translation and validation using device drivers
US6766479B2 (en) 2001-02-28 2004-07-20 Stratus Technologies Bermuda, Ltd. Apparatus and methods for identifying bus protocol violations
US6766413B2 (en) 2001-03-01 2004-07-20 Stratus Technologies Bermuda Ltd. Systems and methods for caching with file-level granularity
US6874102B2 (en) * 2001-03-05 2005-03-29 Stratus Technologies Bermuda Ltd. Coordinated recalibration of high bandwidth memories in a multiprocessor computer
US7065672B2 (en) * 2001-03-28 2006-06-20 Stratus Technologies Bermuda Ltd. Apparatus and methods for fault-tolerant computing using a switching fabric
US6996750B2 (en) * 2001-05-31 2006-02-07 Stratus Technologies Bermuda Ltd. Methods and apparatus for computer bus error termination
US7346135B1 (en) 2002-02-13 2008-03-18 Marvell International, Ltd. Compensation for residual frequency offset, phase noise and sampling phase offset in wireless networks
US20030229733A1 (en) * 2002-06-05 2003-12-11 Hepner David Frank DMA chaining method, apparatus and system
US7154886B2 (en) * 2002-07-22 2006-12-26 Qlogic Corporation Method and system for primary blade selection in a multi-module fiber channel switch
US7230929B2 (en) * 2002-07-22 2007-06-12 Qlogic, Corporation Method and system for dynamically assigning domain identification in a multi-module fibre channel switch
US7640549B2 (en) * 2002-07-22 2009-12-29 Agilent Technologies, Inc. System and method for efficiently exchanging data among processes
US7397768B1 (en) 2002-09-11 2008-07-08 Qlogic, Corporation Zone management in a multi-module fibre channel switch
US7362717B1 (en) 2002-10-03 2008-04-22 Qlogic, Corporation Method and system for using distributed name servers in multi-module fibre channel switches
US6886141B1 (en) * 2002-10-07 2005-04-26 Qlogic Corporation Method and system for reducing congestion in computer networks
US7263153B2 (en) * 2002-10-09 2007-08-28 Marvell International, Ltd. Clock offset compensator
US7319705B1 (en) 2002-10-22 2008-01-15 Marvell International Ltd. Programmable pre-emphasis circuit for serial ATA
US7319669B1 (en) 2002-11-22 2008-01-15 Qlogic, Corporation Method and system for controlling packet flow in networks
US7246192B1 (en) 2003-01-10 2007-07-17 Marvell International Ltd. Serial/parallel ATA controller and converter
JP4330889B2 (ja) 2003-01-20 2009-09-16 株式会社日立製作所 記憶デバイス制御装置にソフトウエアをインストールする方法、記憶デバイス制御装置の制御方法、及び記憶デバイス制御装置
US7355966B2 (en) * 2003-07-16 2008-04-08 Qlogic, Corporation Method and system for minimizing disruption in common-access networks
US7471635B2 (en) * 2003-07-16 2008-12-30 Qlogic, Corporation Method and apparatus for test pattern generation
US7152132B2 (en) * 2003-07-16 2006-12-19 Qlogic Corporation Method and apparatus for improving buffer utilization in communication networks
US7453802B2 (en) * 2003-07-16 2008-11-18 Qlogic, Corporation Method and apparatus for detecting and removing orphaned primitives in a fibre channel network
US7388843B2 (en) * 2003-07-16 2008-06-17 Qlogic, Corporation Method and apparatus for testing loop pathway integrity in a fibre channel arbitrated loop
US7463646B2 (en) * 2003-07-16 2008-12-09 Qlogic Corporation Method and system for fibre channel arbitrated loop acceleration
US7620059B2 (en) * 2003-07-16 2009-11-17 Qlogic, Corporation Method and apparatus for accelerating receive-modify-send frames in a fibre channel network
US7792115B2 (en) * 2003-07-21 2010-09-07 Qlogic, Corporation Method and system for routing and filtering network data packets in fibre channel systems
US7447224B2 (en) * 2003-07-21 2008-11-04 Qlogic, Corporation Method and system for routing fibre channel frames
US7512067B2 (en) * 2003-07-21 2009-03-31 Qlogic, Corporation Method and system for congestion control based on optimum bandwidth allocation in a fibre channel switch
US7522529B2 (en) * 2003-07-21 2009-04-21 Qlogic, Corporation Method and system for detecting congestion and over subscription in a fibre channel network
US7525983B2 (en) * 2003-07-21 2009-04-28 Qlogic, Corporation Method and system for selecting virtual lanes in fibre channel switches
US7466700B2 (en) * 2003-07-21 2008-12-16 Qlogic, Corporation LUN based hard zoning in fibre channel switches
US7573909B2 (en) * 2003-07-21 2009-08-11 Qlogic, Corporation Method and system for programmable data dependant network routing
US7684401B2 (en) * 2003-07-21 2010-03-23 Qlogic, Corporation Method and system for using extended fabric features with fibre channel switch elements
US7558281B2 (en) * 2003-07-21 2009-07-07 Qlogic, Corporation Method and system for configuring fibre channel ports
US7646767B2 (en) * 2003-07-21 2010-01-12 Qlogic, Corporation Method and system for programmable data dependant network routing
US7477655B2 (en) * 2003-07-21 2009-01-13 Qlogic, Corporation Method and system for power control of fibre channel switches
US7583597B2 (en) * 2003-07-21 2009-09-01 Qlogic Corporation Method and system for improving bandwidth and reducing idles in fibre channel switches
US7894348B2 (en) * 2003-07-21 2011-02-22 Qlogic, Corporation Method and system for congestion control in a fibre channel switch
US7430175B2 (en) 2003-07-21 2008-09-30 Qlogic, Corporation Method and system for managing traffic in fibre channel systems
US7522522B2 (en) * 2003-07-21 2009-04-21 Qlogic, Corporation Method and system for reducing latency and congestion in fibre channel switches
US7406092B2 (en) * 2003-07-21 2008-07-29 Qlogic, Corporation Programmable pseudo virtual lanes for fibre channel systems
US7580354B2 (en) * 2003-07-21 2009-08-25 Qlogic, Corporation Multi-speed cut through operation in fibre channel switches
US7630384B2 (en) * 2003-07-21 2009-12-08 Qlogic, Corporation Method and system for distributing credit in fibre channel systems
US7420982B2 (en) * 2003-07-21 2008-09-02 Qlogic, Corporation Method and system for keeping a fibre channel arbitrated loop open during frame gaps
US8930583B1 (en) 2003-09-18 2015-01-06 Marvell Israel (M.I.S.L) Ltd. Method and apparatus for controlling data transfer in a serial-ATA system
US7352701B1 (en) 2003-09-19 2008-04-01 Qlogic, Corporation Buffer to buffer credit recovery for in-line fibre channel credit extension devices
US7103504B1 (en) 2003-11-21 2006-09-05 Qlogic Corporation Method and system for monitoring events in storage area networks
US7564789B2 (en) * 2004-02-05 2009-07-21 Qlogic, Corporation Method and system for reducing deadlock in fibre channel fabrics using virtual lanes
US7480293B2 (en) * 2004-02-05 2009-01-20 Qlogic, Corporation Method and system for preventing deadlock in fibre channel fabrics using frame priorities
JP2005221731A (ja) * 2004-02-05 2005-08-18 Konica Minolta Photo Imaging Inc 撮像装置
US7457893B2 (en) * 2004-03-11 2008-11-25 International Business Machines Corporation Method for dynamically selecting software buffers for aggregation according to current system characteristics
US7930377B2 (en) * 2004-04-23 2011-04-19 Qlogic, Corporation Method and system for using boot servers in networks
US7340167B2 (en) * 2004-04-23 2008-03-04 Qlogic, Corporation Fibre channel transparent switch for mixed switch fabrics
US7958292B2 (en) 2004-06-23 2011-06-07 Marvell World Trade Ltd. Disk drive system on chip with integrated buffer memory and support for host memory access
US7404020B2 (en) * 2004-07-20 2008-07-22 Qlogic, Corporation Integrated fibre channel fabric controller
CN100533371C (zh) * 2004-08-03 2009-08-26 Nxp股份有限公司 用于控制处理器与外设之间的通信的控制器和方法
US7411958B2 (en) * 2004-10-01 2008-08-12 Qlogic, Corporation Method and system for transferring data directly between storage devices in a storage area network
US7593997B2 (en) * 2004-10-01 2009-09-22 Qlogic, Corporation Method and system for LUN remapping in fibre channel networks
US7380030B2 (en) * 2004-10-01 2008-05-27 Qlogic, Corp. Method and system for using an in-line credit extender with a host bus adapter
US8295299B2 (en) * 2004-10-01 2012-10-23 Qlogic, Corporation High speed fibre channel switch element
US7519058B2 (en) 2005-01-18 2009-04-14 Qlogic, Corporation Address translation in fibre channel switches
JP2006259898A (ja) * 2005-03-15 2006-09-28 Toshiba Corp Ｉ／ｏコントローラ、信号処理システム、およびデータ転送方法
US20060222125A1 (en) * 2005-03-31 2006-10-05 Edwards John W Jr Systems and methods for maintaining synchronicity during signal transmission
US20060222126A1 (en) * 2005-03-31 2006-10-05 Stratus Technologies Bermuda Ltd. Systems and methods for maintaining synchronicity during signal transmission
US20070011499A1 (en) * 2005-06-07 2007-01-11 Stratus Technologies Bermuda Ltd. Methods for ensuring safe component removal
US7548560B1 (en) 2006-02-27 2009-06-16 Qlogic, Corporation Method and system for checking frame-length in fibre channel frames
US9007646B2 (en) * 2006-03-14 2015-04-14 Core Wireless Licensing S.A.R.L. System and method for enabling the fast extraction of interleaved image data
CN100444144C (zh) * 2006-07-27 2008-12-17 威盛电子股份有限公司 微电脑系统的直接内存存取作业方法
US7613816B1 (en) 2006-11-15 2009-11-03 Qlogic, Corporation Method and system for routing network information
US8683126B2 (en) * 2007-07-30 2014-03-25 Nvidia Corporation Optimal use of buffer space by a storage controller which writes retrieved data directly to a memory
GB2459939B (en) * 2008-05-16 2012-02-15 Icera Inc Fetching descriptors in a multiple context DMA engine
JP5287301B2 (ja) * 2009-01-30 2013-09-11 富士通株式会社 ディスクリプタ転送装置、ｉ／ｏコントローラ、及びディスクリプタ転送方法
US8589600B2 (en) 2009-12-14 2013-11-19 Maxeler Technologies, Ltd. Method of transferring data with offsets
JP6395203B2 (ja) 2011-03-02 2018-09-26 日本電気株式会社 データ制御システム、データ制御方法およびデータ制御用プログラム
KR102180972B1 (ko) * 2014-04-23 2020-11-20 에스케이하이닉스 주식회사 메모리 컨트롤 유닛 및 그것을 포함하는 데이터 저장 장치
US9904645B2 (en) * 2014-10-31 2018-02-27 Texas Instruments Incorporated Multicore bus architecture with non-blocking high performance transaction credit system
US9792244B2 (en) 2015-02-13 2017-10-17 Honeywell International Inc. Multiple processor architecture with flexible external input/output interface
CN113127391B (zh) * 2021-05-13 2023-03-14 西安微电子技术研究所 一种多设备兼容的dma数据传输引擎设计方法

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4371932A (en) * 1979-07-30 1983-02-01 International Business Machines Corp. I/O Controller for transferring data between a host processor and multiple I/O units
CA1228677A (en) * 1984-06-21 1987-10-27 Cray Research, Inc. Peripheral interface system
US4831523A (en) * 1986-10-31 1989-05-16 Bull Hn Information Systems Inc. Multiple DMA controller chip sequencer
US4805137A (en) * 1987-01-08 1989-02-14 United Technologies Corporation Bus controller command block processing system
US4782439A (en) * 1987-02-17 1988-11-01 Intel Corporation Direct memory access system for microcontroller
US4821170A (en) * 1987-04-17 1989-04-11 Tandem Computers Incorporated Input/output system for multiprocessors
JPH065524B2 (ja) * 1987-11-18 1994-01-19 インターナショナル・ビジネス・マシーンズ・コーポレーション 記憶装置管理方法
JPH01237864A (ja) * 1988-03-18 1989-09-22 Fujitsu Ltd Ｄｍａ転送制御装置
US5212795A (en) * 1988-10-11 1993-05-18 California Institute Of Technology Programmable DMA controller
US5016160A (en) * 1988-12-15 1991-05-14 International Business Machines Corporation Computer system having efficient data transfer operations
EP0375909B1 (de) * 1988-12-30 1995-08-30 International Business Machines Corporation Vielfacher Ein-/Ausgabe-Kanal
US5251303A (en) * 1989-01-13 1993-10-05 International Business Machines Corporation System for DMA block data transfer based on linked control blocks
US5179709A (en) * 1989-01-13 1993-01-12 International Business Machines Corporation Look ahead bus transfer request
US5131081A (en) * 1989-03-23 1992-07-14 North American Philips Corp., Signetics Div. System having a host independent input/output processor for controlling data transfer between a memory and a plurality of i/o controllers
JP2550496B2 (ja) * 1989-03-30 1996-11-06 三菱電機株式会社 Ｄｍａコントローラ
KR940002905B1 (en) * 1989-12-15 1994-04-07 Ibm Apparatus for conditioning priority arbitration in buffered direct memory addressing
US5185876A (en) * 1990-03-14 1993-02-09 Micro Technology, Inc. Buffering system for dynamically providing data to multiple storage elements
US5206933A (en) * 1990-03-15 1993-04-27 International Business Machines Corporation Data link controller with channels selectively allocatable to hyper channels and hyper channel data funneled through reference logical channels
JP3074737B2 (ja) * 1990-12-29 2000-08-07 カシオ計算機株式会社 ファイル更新処理装置
US5305319A (en) * 1991-01-31 1994-04-19 Chips And Technologies, Inc. FIFO for coupling asynchronous channels
US5404454A (en) * 1991-02-28 1995-04-04 Dell Usa, L.P. Method for interleaving computer disk data input-out transfers with permuted buffer addressing
US5379381A (en) * 1991-08-12 1995-01-03 Stratus Computer, Inc. System using separate transfer circuits for performing different transfer operations respectively and scanning I/O devices status upon absence of both operations
CA2069711C (en) * 1991-09-18 1999-11-30 Donald Edward Carmon Multi-media signal processor computer system
EP0537401A1 (de) * 1991-10-16 1993-04-21 International Business Machines Corporation Verfahren zum Nachrichtenaustausch zwischen einem gemeinschaftlichen Speicher und Datenübertragungsadaptern, unter Verwendung eines leistungsfähigen, logischen Protokolls
US5367639A (en) * 1991-12-30 1994-11-22 Sun Microsystems, Inc. Method and apparatus for dynamic chaining of DMA operations without incurring race conditions
US5388237A (en) * 1991-12-30 1995-02-07 Sun Microsystems, Inc. Method of and apparatus for interleaving multiple-channel DMA operations
US5251312A (en) * 1991-12-30 1993-10-05 Sun Microsystems, Inc. Method and apparatus for the prevention of race conditions during dynamic chaining operations
US5386532A (en) * 1991-12-30 1995-01-31 Sun Microsystems, Inc. Method and apparatus for transferring data between a memory and a plurality of peripheral units through a plurality of data channels
EP0549924A1 (de) * 1992-01-03 1993-07-07 International Business Machines Corporation Verfahren und Vorrichtung zur Datenübertragung durch einen Asynchronzusatzprozessor
US5388219A (en) * 1992-03-02 1995-02-07 International Business Machines Corporation Efficient channel and control unit for host computer
EP0630499A4 (de) * 1992-03-09 1996-07-24 Auspex Systems Inc Beschleunigungssystem mit nichtflüchtigem, geschütztem, schreibbarem ram-cachespeicher.
US5524268A (en) * 1992-06-26 1996-06-04 Cirrus Logic, Inc. Flexible processor-driven control of SCSI buses utilizing tags appended to data bytes to determine SCSI-protocol phases
GB2270780A (en) * 1992-09-21 1994-03-23 Ibm Scatter-gather in data processing systems.
US5551006A (en) * 1993-09-30 1996-08-27 Intel Corporation Low cost writethrough cache coherency apparatus and method for computer systems without a cache supporting bus
US5574944A (en) * 1993-12-15 1996-11-12 Convex Computer Corporation System for accessing distributed memory by breaking each accepted access request into series of instructions by using sets of parameters defined as logical channel context
US5655151A (en) * 1994-01-28 1997-08-05 Apple Computer, Inc. DMA controller having a plurality of DMA channels each having multiple register sets storing different information controlling respective data transfer
US5687392A (en) * 1994-05-11 1997-11-11 Microsoft Corporation System for allocating buffer to transfer data when user buffer is mapped to physical region that does not conform to physical addressing limitations of controller
US5613162A (en) * 1995-01-04 1997-03-18 Ast Research, Inc. Method and apparatus for performing efficient direct memory access data transfers
US5671439A (en) * 1995-01-10 1997-09-23 Micron Electronics, Inc. Multi-drive virtual mass storage device and method of operating same

Also Published As

Publication number Publication date
EP0732659B1 (de) 2001-08-08
JPH08297628A (ja) 1996-11-12
US5894560A (en) 1999-04-13
DE69614291D1 (de) 2001-09-13
EP0732659A1 (de) 1996-09-18

Similar Documents

Publication Publication Date Title
DE69614291T2 (de) (n+i) Ein/Ausgabekanälesteuerung, mit (n) Datenverwaltern, in einer homogenen Software-Programmierbetriebsumgebung
DE69717876D1 (de) Eingabe-/Ausgabesteuergerät mit Wiederanlaufkennzeichnungsfunktion
DE69931473D1 (de) Eingang/ausgang scanner für ein steuersystem mit gleichrangiger ermittlung
DE59705184D1 (de) Graphische bedienoberfläche zur programmierung von speicherprogrammierbaren steuerungen
DE69104493T2 (de) Zweistufiger a/d-wandler unter verwendung von doppel-multiplexwandlern mit gemeinsamer schrittweiser annährungssteuerung.
DE69620952T2 (de) Rechnersystem mit Zwei-Phasen-Kontrollpunkten
DE69535954D1 (de) Biegevorrichtung mit einer Steuereinrichtung
EP0606132A3 (en) Error diffusion with output and input based feedback.
AU602825B2 (en) A data input/output control system
DE59104674D1 (de) Steuer- und Regelvorrichtung für ein hydrostatisches Getriebe.
DE69425929D1 (de) Fernbedienung mit Spracheingabe
DE69021790D1 (de) Mehrstufiges Netz mit verteilter Steuerung.
DE69013886T2 (de) Mehrfachzugriffssteuerung für ein Kommunikationssystem mit Reservierungsblockübermittlung.
DE69022324D1 (de) Getriebesteuerungssystem mit Rückkopplung.
FR2749347B1 (fr) Dispositif de commande hydraulique de soupape a commande libre
DE69913033D1 (de) Steuerungssystem mit Schnittstelle für Ein/Ausgabekarte
DE68913412D1 (de) Intuitiver Steuerhebel für ein Arbeitsgerät.
DE69433351D1 (de) Datenübertragungssteuerungssystem
FR2691516B1 (fr) Dispositif de controle de transmission automatique a rapports etages.
DE69411802D1 (de) Übertragungssystem mit nockengesteuerter, segmentierter, biegsamer Klinge als Übertragungshilfe
DE69029551D1 (de) Eingabe-/Ausgabe-Einrichtung und Steuerungssystem mit einer solchen Einrichtung
DE69328484D1 (de) Regelkreis mit negativer Rückkopplung mit einer gemeinsamen Leitung für Eingang und Ausgang
DE59009801D1 (de) Fernbedienungseinrichtung mit einer Spreizcode-Übertragungsstrecke.
DE59407770D1 (de) Schaltschrank mit Lüftungsöffnungen
DE68917015D1 (de) Umstrukturierungssystem für Ein/Ausgabesteuerungssysteme.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: FIENER, J., PAT.-ANW., 87719 MINDELHEIM