DE69535551D1 - Halbleiteranordnung mit Kontaktlöchern - Google Patents

Halbleiteranordnung mit Kontaktlöchern

Info

Publication number
DE69535551D1
DE69535551D1 DE69535551T DE69535551T DE69535551D1 DE 69535551 D1 DE69535551 D1 DE 69535551D1 DE 69535551 T DE69535551 T DE 69535551T DE 69535551 T DE69535551 T DE 69535551T DE 69535551 D1 DE69535551 D1 DE 69535551D1
Authority
DE
Germany
Prior art keywords
contact holes
semiconductor arrangement
semiconductor
arrangement
holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69535551T
Other languages
English (en)
Other versions
DE69535551T2 (de
Inventor
Yoshihiko Yagi
Kazushi Higashi
Norihito Tsukahara
Koichi Kumagai
Takahiro Yonezawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP6322032A external-priority patent/JPH08181144A/ja
Priority claimed from JP752395A external-priority patent/JP3365879B2/ja
Priority claimed from JP00940195A external-priority patent/JP3363639B2/ja
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69535551D1 publication Critical patent/DE69535551D1/de
Application granted granted Critical
Publication of DE69535551T2 publication Critical patent/DE69535551T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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    • H01L2224/1182—Applying permanent coating, e.g. in-situ coating
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    • H01L2224/1183—Reworking, e.g. shaping
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    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
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    • H01L2924/14—Integrated circuits
DE69535551T 1994-12-26 1995-12-22 Halbleiteranordnung mit Kontaktlöchern Expired - Fee Related DE69535551T2 (de)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP6322032A JPH08181144A (ja) 1994-12-26 1994-12-26 半導体装置の実装方法
JP32203294 1994-12-26
JP752395 1995-01-20
JP752395A JP3365879B2 (ja) 1995-01-20 1995-01-20 半導体装置の製造方法
JP940195 1995-01-25
JP00940195A JP3363639B2 (ja) 1995-01-25 1995-01-25 集積回路装置およびその製造方法

Publications (2)

Publication Number Publication Date
DE69535551D1 true DE69535551D1 (de) 2007-09-20
DE69535551T2 DE69535551T2 (de) 2008-04-30

Family

ID=27277639

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69535551T Expired - Fee Related DE69535551T2 (de) 1994-12-26 1995-12-22 Halbleiteranordnung mit Kontaktlöchern

Country Status (6)

Country Link
US (1) US5686353A (de)
EP (1) EP0720226B1 (de)
KR (1) KR100239286B1 (de)
CN (2) CN1051641C (de)
DE (1) DE69535551T2 (de)
TW (1) TW288194B (de)

Families Citing this family (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2951882B2 (ja) * 1996-03-06 1999-09-20 松下電器産業株式会社 半導体装置の製造方法及びこれを用いて製造した半導体装置
JPH09252005A (ja) * 1996-03-15 1997-09-22 Shinkawa Ltd バンプ形成方法
DE69739125D1 (de) * 1996-10-01 2009-01-02 Panasonic Corp Kapillare zum Drahtverbinden zur Herstellung von Höckerelektroden
JP3400279B2 (ja) * 1997-01-13 2003-04-28 株式会社新川 バンプ形成方法
JP3377934B2 (ja) * 1997-07-22 2003-02-17 松下電器産業株式会社 バンプボンディング方法およびバンプボンディング装置
JPH11233554A (ja) * 1998-02-17 1999-08-27 Mitsubishi Electric Corp 半田バンプの矯正方法
JP3942738B2 (ja) * 1998-07-17 2007-07-11 松下電器産業株式会社 バンプ接合装置及び方法、並びに半導体部品製造装置
WO2000011718A1 (de) * 1998-08-22 2000-03-02 Mci Computer Gmbh Elektronisches bauelement vom flip-chip-typ
US6329832B1 (en) * 1998-10-05 2001-12-11 Micron Technology, Inc. Method for in-line testing of flip-chip semiconductor assemblies
JP2000138249A (ja) * 1998-10-29 2000-05-16 Matsushita Electric Ind Co Ltd 突起電極形成方法及び実装方法
US6255208B1 (en) * 1999-01-25 2001-07-03 International Business Machines Corporation Selective wafer-level testing and burn-in
US6348739B1 (en) * 1999-04-28 2002-02-19 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method of manufacturing the same
TW504779B (en) * 1999-11-18 2002-10-01 Texas Instruments Inc Compliant wirebond pedestal
US6350632B1 (en) 2000-09-20 2002-02-26 Charles W. C. Lin Semiconductor chip assembly with ball bond connection joint
US6350386B1 (en) 2000-09-20 2002-02-26 Charles W. C. Lin Method of making a support circuit with a tapered through-hole for a semiconductor chip assembly
US6511865B1 (en) 2000-09-20 2003-01-28 Charles W. C. Lin Method for forming a ball bond connection joint on a conductive trace and conductive pad in a semiconductor chip assembly
US6544813B1 (en) 2000-10-02 2003-04-08 Charles W. C. Lin Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
US6448108B1 (en) 2000-10-02 2002-09-10 Charles W. C. Lin Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment
US6576539B1 (en) 2000-10-13 2003-06-10 Charles W.C. Lin Semiconductor chip assembly with interlocked conductive trace
US7129575B1 (en) 2000-10-13 2006-10-31 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped metal pillar
US6699780B1 (en) 2000-10-13 2004-03-02 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using plasma undercut etching
US6984576B1 (en) 2000-10-13 2006-01-10 Bridge Semiconductor Corporation Method of connecting an additively and subtractively formed conductive trace and an insulative base to a semiconductor chip
US7414319B2 (en) 2000-10-13 2008-08-19 Bridge Semiconductor Corporation Semiconductor chip assembly with metal containment wall and solder terminal
US7132741B1 (en) 2000-10-13 2006-11-07 Bridge Semiconductor Corporation Semiconductor chip assembly with carved bumped terminal
US6548393B1 (en) 2000-10-13 2003-04-15 Charles W. C. Lin Semiconductor chip assembly with hardened connection joint
US6667229B1 (en) 2000-10-13 2003-12-23 Bridge Semiconductor Corporation Method of connecting a bumped compliant conductive trace and an insulative base to a semiconductor chip
US6949408B1 (en) 2000-10-13 2005-09-27 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps
US7009297B1 (en) 2000-10-13 2006-03-07 Bridge Semiconductor Corporation Semiconductor chip assembly with embedded metal particle
US6673710B1 (en) 2000-10-13 2004-01-06 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip
US7319265B1 (en) 2000-10-13 2008-01-15 Bridge Semiconductor Corporation Semiconductor chip assembly with precision-formed metal pillar
US7264991B1 (en) 2000-10-13 2007-09-04 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using conductive adhesive
US6537851B1 (en) 2000-10-13 2003-03-25 Bridge Semiconductor Corporation Method of connecting a bumped compliant conductive trace to a semiconductor chip
US7075186B1 (en) 2000-10-13 2006-07-11 Bridge Semiconductor Corporation Semiconductor chip assembly with interlocked contact terminal
US6740576B1 (en) 2000-10-13 2004-05-25 Bridge Semiconductor Corporation Method of making a contact terminal with a plated metal peripheral sidewall portion for a semiconductor chip assembly
US7071089B1 (en) 2000-10-13 2006-07-04 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with a carved bumped terminal
US7094676B1 (en) 2000-10-13 2006-08-22 Bridge Semiconductor Corporation Semiconductor chip assembly with embedded metal pillar
US6876072B1 (en) 2000-10-13 2005-04-05 Bridge Semiconductor Corporation Semiconductor chip assembly with chip in substrate cavity
US6908788B1 (en) 2000-10-13 2005-06-21 Bridge Semiconductor Corporation Method of connecting a conductive trace to a semiconductor chip using a metal base
US6492252B1 (en) 2000-10-13 2002-12-10 Bridge Semiconductor Corporation Method of connecting a bumped conductive trace to a semiconductor chip
US6872591B1 (en) 2000-10-13 2005-03-29 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with a conductive trace and a substrate
US6440835B1 (en) 2000-10-13 2002-08-27 Charles W. C. Lin Method of connecting a conductive trace to a semiconductor chip
US7190080B1 (en) 2000-10-13 2007-03-13 Bridge Semiconductor Corporation Semiconductor chip assembly with embedded metal pillar
US6576493B1 (en) 2000-10-13 2003-06-10 Bridge Semiconductor Corporation Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps
US6444489B1 (en) 2000-12-15 2002-09-03 Charles W. C. Lin Semiconductor chip assembly with bumped molded substrate
US6653170B1 (en) 2001-02-06 2003-11-25 Charles W. C. Lin Semiconductor chip assembly with elongated wire ball bonded to chip and electrolessly plated to support circuit
JP3765778B2 (ja) * 2002-08-29 2006-04-12 ローム株式会社 ワイヤボンディング用キャピラリ及びこれを用いたワイヤボンディング方法
US7229906B2 (en) * 2002-09-19 2007-06-12 Kulicke And Soffa Industries, Inc. Method and apparatus for forming bumps for semiconductor interconnections using a wire bonding machine
US7993983B1 (en) 2003-11-17 2011-08-09 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with chip and encapsulant grinding
US7538415B1 (en) 2003-11-20 2009-05-26 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal, filler and insulative base
US7425759B1 (en) 2003-11-20 2008-09-16 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal and filler
US7784670B2 (en) * 2004-01-22 2010-08-31 Bondtech Inc. Joining method and device produced by this method and joining unit
US7268421B1 (en) 2004-11-10 2007-09-11 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar that includes enlarged ball bond
US7750483B1 (en) 2004-11-10 2010-07-06 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar and enlarged plated contact terminal
US7446419B1 (en) 2004-11-10 2008-11-04 Bridge Semiconductor Corporation Semiconductor chip assembly with welded metal pillar of stacked metal balls
US7518384B2 (en) * 2005-01-31 2009-04-14 Agilent Technologies, Inc. Method and apparatus for manufacturing and probing test probe access structures on vias
JP4110421B2 (ja) * 2005-07-27 2008-07-02 セイコーエプソン株式会社 半導体装置の製造方法
JP4343177B2 (ja) 2006-02-06 2009-10-14 富士通マイクロエレクトロニクス株式会社 半導体装置
US7811863B1 (en) 2006-10-26 2010-10-12 Bridge Semiconductor Corporation Method of making a semiconductor chip assembly with metal pillar and encapsulant grinding and heat sink attachment
JP5877645B2 (ja) * 2011-02-15 2016-03-08 東レエンジニアリング株式会社 実装方法および実装装置
KR101896972B1 (ko) 2011-09-19 2018-09-11 삼성전자주식회사 패키지 기판 및 이를 갖는 반도체 패키지
DE102013222433A1 (de) * 2013-11-05 2015-05-21 Robert Bosch Gmbh Verfahren zum Herstellen einer Flip-Chip-Schaltungsanordnung und Flip-Chip-Schaltungsanordnung
US9087815B2 (en) * 2013-11-12 2015-07-21 Invensas Corporation Off substrate kinking of bond wire
US9082753B2 (en) 2013-11-12 2015-07-14 Invensas Corporation Severing bond wire by kinking and twisting
DE102014201166A1 (de) * 2014-01-23 2015-08-06 Robert Bosch Gmbh Verfahren zum Herstellen einer Flip-Chip-Schaltungsanordnung und Flip-Chip-Schaltungsanordnung

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6149432A (ja) * 1984-08-18 1986-03-11 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS61219159A (ja) * 1985-03-25 1986-09-29 Toshiba Corp 金ボ−ルバンプの製造方法
US4661192A (en) * 1985-08-22 1987-04-28 Motorola, Inc. Low cost integrated circuit bonding process
GB2201545B (en) * 1987-01-30 1991-09-11 Tanaka Electronics Ind Method for connecting semiconductor material
US5014111A (en) * 1987-12-08 1991-05-07 Matsushita Electric Industrial Co., Ltd. Electrical contact bump and a package provided with the same
US5071787A (en) * 1989-03-14 1991-12-10 Kabushiki Kaisha Toshiba Semiconductor device utilizing a face-down bonding and a method for manufacturing the same
US5060843A (en) * 1989-06-07 1991-10-29 Nec Corporation Process of forming bump on electrode of semiconductor chip and apparatus used therefor
JP2830109B2 (ja) * 1989-07-19 1998-12-02 日本電気株式会社 バンプ形成方法およびバンプ形成装置
JPH03208354A (ja) * 1990-01-10 1991-09-11 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5172851A (en) * 1990-09-20 1992-12-22 Matsushita Electronics Corporation Method of forming a bump electrode and manufacturing a resin-encapsulated semiconductor device
JP3116412B2 (ja) * 1991-05-16 2000-12-11 セイコーエプソン株式会社 半導体装置のバンプ電極形成方法、表示装置及び電子印字装置
US5289631A (en) * 1992-03-04 1994-03-01 Mcnc Method for testing, burn-in, and/or programming of integrated circuit chips
US5510758A (en) * 1993-04-07 1996-04-23 Matsushita Electric Industrial Co., Ltd. Multilayer microstrip wiring board with a semiconductor device mounted thereon via bumps

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TW288194B (de) 1996-10-11
CN1248062A (zh) 2000-03-22
EP0720226A3 (de) 1997-11-19
EP0720226A2 (de) 1996-07-03
DE69535551T2 (de) 2008-04-30
KR960028730A (ko) 1996-07-22
KR100239286B1 (ko) 2000-01-15
CN1130306A (zh) 1996-09-04
EP0720226B1 (de) 2007-08-08
CN1051641C (zh) 2000-04-19
CN1153267C (zh) 2004-06-09
US5686353A (en) 1997-11-11

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