DE69524516T2 - Verfahren zur Herstellung eines Bipolatransistors - Google Patents

Verfahren zur Herstellung eines Bipolatransistors

Info

Publication number
DE69524516T2
DE69524516T2 DE69524516T DE69524516T DE69524516T2 DE 69524516 T2 DE69524516 T2 DE 69524516T2 DE 69524516 T DE69524516 T DE 69524516T DE 69524516 T DE69524516 T DE 69524516T DE 69524516 T2 DE69524516 T2 DE 69524516T2
Authority
DE
Germany
Prior art keywords
manufacturing
bipolar transistor
bipolar
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69524516T
Other languages
English (en)
Other versions
DE69524516D1 (de
Inventor
Timothy S Henderson
Darrell G Hill
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69524516D1 publication Critical patent/DE69524516D1/de
Application granted granted Critical
Publication of DE69524516T2 publication Critical patent/DE69524516T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821—Collector regions of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/6631—Bipolar junction transistors [BJT] with an active layer made of a group 13/15 material
    • H01L29/66318—Heterojunction transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/737—Hetero-junction transistors
    • H01L29/7371—Vertical transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/072—Heterojunctions
DE69524516T 1994-08-09 1995-08-09 Verfahren zur Herstellung eines Bipolatransistors Expired - Lifetime DE69524516T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/287,741 US5445976A (en) 1994-08-09 1994-08-09 Method for producing bipolar transistor having reduced base-collector capacitance

Publications (2)

Publication Number Publication Date
DE69524516D1 DE69524516D1 (de) 2002-01-24
DE69524516T2 true DE69524516T2 (de) 2002-07-04

Family

ID=23104139

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69524516T Expired - Lifetime DE69524516T2 (de) 1994-08-09 1995-08-09 Verfahren zur Herstellung eines Bipolatransistors

Country Status (6)

Country Link
US (1) US5445976A (de)
EP (1) EP0703607B1 (de)
JP (1) JPH0864610A (de)
KR (1) KR100379208B1 (de)
DE (1) DE69524516T2 (de)
TW (1) TW275134B (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5298438A (en) * 1992-08-31 1994-03-29 Texas Instruments Incorporated Method of reducing extrinsic base-collector capacitance in bipolar transistors
US5700701A (en) * 1992-10-30 1997-12-23 Texas Instruments Incorporated Method for reducing junction capacitance and increasing current gain in collector-up bipolar transistors
US5702958A (en) * 1994-08-09 1997-12-30 Texas Instruments Incorporated Method for the fabrication of bipolar transistors
US5485025A (en) * 1994-12-02 1996-01-16 Texas Instruments Incorporated Depleted extrinsic emitter of collector-up heterojunction bipolar transistor
US5665614A (en) * 1995-06-06 1997-09-09 Hughes Electronics Method for making fully self-aligned submicron heterojunction bipolar transistor
US5625206A (en) * 1996-06-03 1997-04-29 Lucent Technologies Inc. High-speed double-heterostructure bipolar transistor devices
US5859447A (en) * 1997-05-09 1999-01-12 Yang; Edward S. Heterojunction bipolar transistor having heterostructure ballasting emitter
US6060402A (en) * 1998-07-23 2000-05-09 The Whitaker Corporation Process for selective recess etching of epitaxial field effect transistors with a novel etch-stop layer
DE19834491A1 (de) 1998-07-31 2000-02-03 Daimler Chrysler Ag Anordnung und Verfahren zur Herstellung eines Heterobipolartransistors
JP3509682B2 (ja) * 2000-01-31 2004-03-22 シャープ株式会社 ヘテロ接合バイポーラトランジスタおよびその製造方法、並びに、通信装置
EP1274133A3 (de) * 2001-07-04 2003-01-22 Sumitomo Chemical Company, Limited Dünnschicht-Kristallwafer mit einem pn Übergang und Verfahren zur Herstellung
JP3507828B2 (ja) 2001-09-11 2004-03-15 シャープ株式会社 ヘテロ接合バイポーラトランジスタ及びその製造方法
JP2004327904A (ja) * 2003-04-28 2004-11-18 Renesas Technology Corp バイポーラトランジスタおよびその製造方法
WO2009107087A1 (en) * 2008-02-28 2009-09-03 Nxp B.V. Semiconductor device and method of manufacture thereof
US9105488B2 (en) * 2010-11-04 2015-08-11 Skyworks Solutions, Inc. Devices and methodologies related to structures having HBT and FET
US9059138B2 (en) 2012-01-25 2015-06-16 International Business Machines Corporation Heterojunction bipolar transistor with reduced sub-collector length, method of manufacture and design structure
KR102250612B1 (ko) 2012-06-14 2021-05-10 스카이워크스 솔루션즈, 인코포레이티드 고조파 종단 회로를 포함하는 전력 증폭기 모듈 및 관련된 시스템, 장치, 및 방법
US11355586B2 (en) * 2020-10-22 2022-06-07 Walter Tony WOHLMUTH Heterojuction bipolar transistor
US11728380B2 (en) 2021-06-24 2023-08-15 Globalfoundries U.S. Inc. Bipolar transistor with base horizontally displaced from collector

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3751972T2 (de) * 1986-04-01 1997-05-22 Matsushita Electric Ind Co Ltd Bipolarer Transistor
JPH01238161A (ja) * 1988-03-18 1989-09-22 Fujitsu Ltd 半導体装置及びその製造方法
JP2574862B2 (ja) * 1988-04-15 1997-01-22 富士通株式会社 ホットエレクトロントランジスタ及びその製造方法
CA1318418C (en) * 1988-09-28 1993-05-25 Richard Norman Nottenburg Heterostructure bipolar transistor
JPH02159036A (ja) * 1988-12-13 1990-06-19 Matsushita Electric Ind Co Ltd バイポーラトランジスタの製造方法
JPH02235341A (ja) * 1989-03-08 1990-09-18 Matsushita Electric Ind Co Ltd ヘテロ接合バイポーラトランジスタ
JP2808145B2 (ja) * 1989-08-24 1998-10-08 富士通株式会社 半導体装置
JPH03108339A (ja) * 1989-09-22 1991-05-08 Hitachi Ltd ヘテロ接合バイポーラトランジスタおよびその製造方法
JPH03291942A (ja) * 1990-04-09 1991-12-24 Fujitsu Ltd ヘテロ接合半導体装置の製造方法
JPH0414831A (ja) * 1990-05-08 1992-01-20 Sony Corp 配線形成方法
US5118382A (en) * 1990-08-10 1992-06-02 Ibm Corporation Elimination of etch stop undercut
DE69128123T2 (de) * 1990-08-31 1998-03-05 Texas Instruments Inc Verfahren zum Herstellen selbst-ausrichtender bipolarer Transistoren mit Heteroübergang
US5270223A (en) * 1991-06-28 1993-12-14 Texas Instruments Incorporated Multiple layer wide bandgap collector structure for bipolar transistors
US5298438A (en) * 1992-08-31 1994-03-29 Texas Instruments Incorporated Method of reducing extrinsic base-collector capacitance in bipolar transistors

Also Published As

Publication number Publication date
DE69524516D1 (de) 2002-01-24
TW275134B (de) 1996-05-01
EP0703607B1 (de) 2001-12-12
KR100379208B1 (ko) 2003-07-18
JPH0864610A (ja) 1996-03-08
US5445976A (en) 1995-08-29
EP0703607A3 (de) 1996-04-24
KR960009213A (ko) 1996-03-22
EP0703607A2 (de) 1996-03-27

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