DE69519145T2 - Parallelprozessorvorrichtung - Google Patents
ParallelprozessorvorrichtungInfo
- Publication number
- DE69519145T2 DE69519145T2 DE69519145T DE69519145T DE69519145T2 DE 69519145 T2 DE69519145 T2 DE 69519145T2 DE 69519145 T DE69519145 T DE 69519145T DE 69519145 T DE69519145 T DE 69519145T DE 69519145 T2 DE69519145 T2 DE 69519145T2
- Authority
- DE
- Germany
- Prior art keywords
- processor device
- parallel processor
- parallel
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/8015—One dimensional arrays, e.g. rings, linear arrays, buses
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6207805A JPH0877002A (ja) | 1994-08-31 | 1994-08-31 | 並列プロセッサ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69519145D1 DE69519145D1 (de) | 2000-11-23 |
DE69519145T2 true DE69519145T2 (de) | 2001-04-05 |
Family
ID=16545795
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69519145T Expired - Fee Related DE69519145T2 (de) | 1994-08-31 | 1995-08-29 | Parallelprozessorvorrichtung |
DE69526685T Expired - Lifetime DE69526685D1 (de) | 1994-08-31 | 1995-08-29 | Parallelprozessorvorrichtung |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69526685T Expired - Lifetime DE69526685D1 (de) | 1994-08-31 | 1995-08-29 | Parallelprozessorvorrichtung |
Country Status (5)
Country | Link |
---|---|
US (2) | US5666169A (de) |
EP (3) | EP0973101B1 (de) |
JP (1) | JPH0877002A (de) |
KR (1) | KR960008527A (de) |
DE (2) | DE69519145T2 (de) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0877002A (ja) * | 1994-08-31 | 1996-03-22 | Sony Corp | 並列プロセッサ装置 |
JP3573406B2 (ja) * | 1999-02-26 | 2004-10-06 | キヤノン株式会社 | 画像処理装置 |
CN1223398C (zh) * | 1999-12-23 | 2005-10-19 | 陶氏环球技术公司 | 催化装置 |
US6725360B1 (en) * | 2000-03-31 | 2004-04-20 | Intel Corporation | Selectively processing different size data in multiplier and ALU paths in parallel |
US6535948B1 (en) * | 2000-05-31 | 2003-03-18 | Agere Systems Inc. | Serial interface unit |
US7225320B2 (en) * | 2000-12-28 | 2007-05-29 | Koninklijke Philips Electronics N.V. | Control architecture for a high-throughput multi-processor channel decoding system |
AU2002240742A1 (en) * | 2001-03-02 | 2002-09-19 | Astana Semiconductor Corp. | Apparatus for variable word length computing in an array processor |
US8427490B1 (en) | 2004-05-14 | 2013-04-23 | Nvidia Corporation | Validating a graphics pipeline using pre-determined schedules |
US8624906B2 (en) | 2004-09-29 | 2014-01-07 | Nvidia Corporation | Method and system for non stalling pipeline instruction fetching from memory |
US8738891B1 (en) * | 2004-11-15 | 2014-05-27 | Nvidia Corporation | Methods and systems for command acceleration in a video processor via translation of scalar instructions into vector instructions |
JP4893621B2 (ja) * | 2005-05-20 | 2012-03-07 | ソニー株式会社 | 信号処理装置 |
US9092170B1 (en) | 2005-10-18 | 2015-07-28 | Nvidia Corporation | Method and system for implementing fragment operation processing across a graphics bus interconnect |
WO2008010291A2 (fr) * | 2006-07-21 | 2008-01-24 | Fujitsu Limited | Procédé et dispositif permettant de traiter des données liées à la variabilité dimensionnelle d'un système d'ordinateur simultané |
US8532288B2 (en) * | 2006-12-01 | 2013-09-10 | International Business Machines Corporation | Selectively isolating processor elements into subsets of processor elements |
US8683126B2 (en) * | 2007-07-30 | 2014-03-25 | Nvidia Corporation | Optimal use of buffer space by a storage controller which writes retrieved data directly to a memory |
US8659601B1 (en) | 2007-08-15 | 2014-02-25 | Nvidia Corporation | Program sequencer for generating indeterminant length shader programs for a graphics processor |
US8698819B1 (en) | 2007-08-15 | 2014-04-15 | Nvidia Corporation | Software assisted shader merging |
US8411096B1 (en) | 2007-08-15 | 2013-04-02 | Nvidia Corporation | Shader program instruction fetch |
US9024957B1 (en) | 2007-08-15 | 2015-05-05 | Nvidia Corporation | Address independent shader program loading |
US9064333B2 (en) | 2007-12-17 | 2015-06-23 | Nvidia Corporation | Interrupt handling techniques in the rasterizer of a GPU |
US8780123B2 (en) * | 2007-12-17 | 2014-07-15 | Nvidia Corporation | Interrupt handling techniques in the rasterizer of a GPU |
US8923385B2 (en) * | 2008-05-01 | 2014-12-30 | Nvidia Corporation | Rewind-enabled hardware encoder |
US8681861B2 (en) * | 2008-05-01 | 2014-03-25 | Nvidia Corporation | Multistandard hardware video encoder |
US8489851B2 (en) * | 2008-12-11 | 2013-07-16 | Nvidia Corporation | Processing of read requests in a memory controller using pre-fetch mechanism |
JP5568884B2 (ja) * | 2009-04-02 | 2014-08-13 | セイコーエプソン株式会社 | 映像処理装置、映像処理方法 |
GB2516288B (en) | 2013-07-18 | 2015-04-08 | Imagination Tech Ltd | Image processing system |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL8303536A (nl) * | 1983-10-14 | 1985-05-01 | Philips Nv | Geintegreerde schakeling op grote schaal welke verdeeld is in isochrone gebieden, werkwijze voor het machinaal ontwerpen van zo een geintegreerde schakeling, en werkwijze voor het machinaal testen van zo een geintegreerde schakeling. |
US4602275A (en) * | 1984-03-19 | 1986-07-22 | Rca Corporation | Television memory system |
CA1258319A (en) * | 1985-07-26 | 1989-08-08 | Milton J. Kimmel | Configurable parallel pipeline image processing system |
DE3854337T2 (de) * | 1987-06-09 | 1996-02-01 | Sony Corp | Bewegungskompensierte Interpolation von digitalen Fernsehbildern. |
US5249047A (en) * | 1987-10-27 | 1993-09-28 | Canon Kabushiki Kaisha | Predictive coding system |
EP0317218B1 (de) * | 1987-11-13 | 1998-01-28 | Texas Instruments Incorporated | Serieller Videoprozessor und Verfahren |
US5130797A (en) * | 1989-02-27 | 1992-07-14 | Mitsubishi Denki Kabushiki Kaisha | Digital signal processing system for parallel processing of subsampled data |
US5598545A (en) * | 1989-10-13 | 1997-01-28 | Texas Instruments Incorporated | Circuitry and method for performing two operating instructions during a single clock in a processing device |
KR0184865B1 (ko) * | 1989-10-13 | 1999-05-15 | 엔. 라이스 머레트 | 데이타 프로세싱 디바이스 |
US5187575A (en) * | 1989-12-29 | 1993-02-16 | Massachusetts Institute Of Technology | Source adaptive television system |
EP0444368B1 (de) * | 1990-02-28 | 1997-12-29 | Texas Instruments France | Ein SIMD-Prozessor als digitales Filter |
US5115309A (en) * | 1990-09-10 | 1992-05-19 | At&T Bell Laboratories | Method and apparatus for dynamic channel bandwidth allocation among multiple parallel video coders |
FR2692702A1 (fr) * | 1992-06-17 | 1993-12-24 | Philips Electronique Lab | Dispositif de traitement de données ayant une architecture à instruction commune agissant sur des données multiples. |
US5510842A (en) * | 1994-05-04 | 1996-04-23 | Matsushita Electric Corporation Of America | Parallel architecture for a high definition television video decoder having multiple independent frame memories |
JPH0877002A (ja) * | 1994-08-31 | 1996-03-22 | Sony Corp | 並列プロセッサ装置 |
-
1994
- 1994-08-31 JP JP6207805A patent/JPH0877002A/ja not_active Abandoned
-
1995
- 1995-08-28 US US08/519,719 patent/US5666169A/en not_active Expired - Fee Related
- 1995-08-29 DE DE69519145T patent/DE69519145T2/de not_active Expired - Fee Related
- 1995-08-29 EP EP99203228A patent/EP0973101B1/de not_active Expired - Lifetime
- 1995-08-29 EP EP95306000A patent/EP0701219B1/de not_active Expired - Lifetime
- 1995-08-29 EP EP99203227A patent/EP0973100A1/de not_active Withdrawn
- 1995-08-29 DE DE69526685T patent/DE69526685D1/de not_active Expired - Lifetime
- 1995-08-31 KR KR1019950028878A patent/KR960008527A/ko not_active Application Discontinuation
-
1997
- 1997-04-07 US US08/834,562 patent/US5850268A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5666169A (en) | 1997-09-09 |
KR960008527A (ko) | 1996-03-22 |
DE69519145D1 (de) | 2000-11-23 |
US5850268A (en) | 1998-12-15 |
EP0701219A1 (de) | 1996-03-13 |
EP0973100A1 (de) | 2000-01-19 |
EP0973101A1 (de) | 2000-01-19 |
DE69526685D1 (de) | 2002-06-13 |
EP0973101B1 (de) | 2002-05-08 |
EP0701219B1 (de) | 2000-10-18 |
JPH0877002A (ja) | 1996-03-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |