DE69518958T2 - Spritzgegossene BGA-Packung - Google Patents

Spritzgegossene BGA-Packung

Info

Publication number
DE69518958T2
DE69518958T2 DE69518958T DE69518958T DE69518958T2 DE 69518958 T2 DE69518958 T2 DE 69518958T2 DE 69518958 T DE69518958 T DE 69518958T DE 69518958 T DE69518958 T DE 69518958T DE 69518958 T2 DE69518958 T2 DE 69518958T2
Authority
DE
Germany
Prior art keywords
injection molded
bga package
molded bga
package
injection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69518958T
Other languages
English (en)
Other versions
DE69518958D1 (de
Inventor
Juan Exposito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of DE69518958D1 publication Critical patent/DE69518958D1/de
Application granted granted Critical
Publication of DE69518958T2 publication Critical patent/DE69518958T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
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    • H01ELECTRIC ELEMENTS
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
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    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01029Copper [Cu]
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    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
DE69518958T 1994-07-21 1995-07-20 Spritzgegossene BGA-Packung Expired - Fee Related DE69518958T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9409251A FR2722915B1 (fr) 1994-07-21 1994-07-21 Boitier bga a moulage par injection

Publications (2)

Publication Number Publication Date
DE69518958D1 DE69518958D1 (de) 2000-11-02
DE69518958T2 true DE69518958T2 (de) 2001-03-22

Family

ID=9465764

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69518958T Expired - Fee Related DE69518958T2 (de) 1994-07-21 1995-07-20 Spritzgegossene BGA-Packung

Country Status (5)

Country Link
US (1) US5841192A (de)
EP (1) EP0693777B1 (de)
JP (1) JP2778539B2 (de)
DE (1) DE69518958T2 (de)
FR (1) FR2722915B1 (de)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2834017B2 (ja) * 1995-01-27 1998-12-09 日本電気株式会社 半導体装置及びその製造方法
US6962829B2 (en) * 1996-10-31 2005-11-08 Amkor Technology, Inc. Method of making near chip size integrated circuit package
JP3695893B2 (ja) * 1996-12-03 2005-09-14 沖電気工業株式会社 半導体装置とその製造方法および実装方法
US5795818A (en) * 1996-12-06 1998-08-18 Amkor Technology, Inc. Integrated circuit chip to substrate interconnection and method
US6001672A (en) 1997-02-25 1999-12-14 Micron Technology, Inc. Method for transfer molding encapsulation of a semiconductor die with attached heat sink
JP3210881B2 (ja) * 1997-06-05 2001-09-25 ソニーケミカル株式会社 Bgaパッケージ基板
JP3134815B2 (ja) * 1997-06-27 2001-02-13 日本電気株式会社 半導体装置
US6114189A (en) * 1997-09-10 2000-09-05 Lsi Logic Corp. Molded array integrated circuit package
US5888850A (en) * 1997-09-29 1999-03-30 International Business Machines Corporation Method for providing a protective coating and electronic package utilizing same
US6038136A (en) * 1997-10-29 2000-03-14 Hestia Technologies, Inc. Chip package with molded underfill
US6495083B2 (en) 1997-10-29 2002-12-17 Hestia Technologies, Inc. Method of underfilling an integrated circuit chip
US6324069B1 (en) 1997-10-29 2001-11-27 Hestia Technologies, Inc. Chip package with molded underfill
JP3460559B2 (ja) * 1997-12-12 2003-10-27 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
US6380001B1 (en) * 1998-01-29 2002-04-30 Vlsi Technology, Inc. Flexible pin count package for semiconductor device
US6002169A (en) * 1998-06-15 1999-12-14 Lsi Logic Corporation Thermally enhanced tape ball grid array package
JP3784976B2 (ja) * 1998-12-22 2006-06-14 ローム株式会社 半導体装置
JP2000323623A (ja) * 1999-05-13 2000-11-24 Mitsubishi Electric Corp 半導体装置
US20020030257A1 (en) * 1999-06-18 2002-03-14 Joseph M. Brand Semiconductor device utiling an encapsulant for locking a semiconductor die to circuit substrate
JP3706533B2 (ja) * 2000-09-20 2005-10-12 三洋電機株式会社 半導体装置および半導体モジュール
US7173336B2 (en) * 2000-01-31 2007-02-06 Sanyo Electric Co., Ltd. Hybrid integrated circuit device
US6916683B2 (en) * 2000-05-11 2005-07-12 Micron Technology, Inc. Methods of fabricating a molded ball grid array
US6400574B1 (en) 2000-05-11 2002-06-04 Micron Technology, Inc. Molded ball grid array
JP2002057237A (ja) * 2000-08-08 2002-02-22 Rohm Co Ltd 絶縁フィルムを用いたbga型半導体装置
US6838319B1 (en) 2000-08-31 2005-01-04 Micron Technology, Inc. Transfer molding and underfilling method and apparatus including orienting the active surface of a semiconductor substrate substantially vertically
KR20020057358A (ko) * 2001-01-04 2002-07-11 마이클 디. 오브라이언 멀티칩 모듈 패키지 및 제조방법
US6462273B1 (en) * 2001-03-16 2002-10-08 Micron Technology, Inc. Semiconductor card and method of fabrication
US7220615B2 (en) 2001-06-11 2007-05-22 Micron Technology, Inc. Alternative method used to package multimedia card by transfer molding
KR100944695B1 (ko) * 2001-06-27 2010-02-26 신꼬오덴기 고교 가부시키가이샤 위치 정보를 갖는 배선 기판
JP2003110077A (ja) * 2001-10-02 2003-04-11 Mitsubishi Electric Corp 半導体装置
EP1328015A3 (de) * 2002-01-11 2003-12-03 Hesse & Knipps GmbH Verfahren zum Flip-Chip-Bonden
US6825067B2 (en) * 2002-12-10 2004-11-30 St Assembly Test Services Pte Ltd Mold cap anchoring method for molded flex BGA packages
US7193314B2 (en) * 2003-01-14 2007-03-20 Silicon Integrated Systems Corp. Semiconductor devices and substrates used in thereof
US7675152B2 (en) * 2005-09-01 2010-03-09 Texas Instruments Incorporated Package-on-package semiconductor assembly
JP5096683B2 (ja) * 2006-03-03 2012-12-12 ルネサスエレクトロニクス株式会社 半導体装置
US7944034B2 (en) * 2007-06-22 2011-05-17 Texas Instruments Incorporated Array molded package-on-package having redistribution lines
JP5079475B2 (ja) * 2007-12-05 2012-11-21 新光電気工業株式会社 電子部品実装用パッケージ
JP4901888B2 (ja) * 2009-01-30 2012-03-21 三菱電機株式会社 電子基板の防湿処理方法
US8753926B2 (en) * 2010-09-14 2014-06-17 Qualcomm Incorporated Electronic packaging with a variable thickness mold cap
KR101963883B1 (ko) * 2012-07-05 2019-04-01 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
KR101902996B1 (ko) * 2012-07-09 2018-10-01 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
US9030000B2 (en) * 2013-06-14 2015-05-12 Freescale Semiconductor, Inc. Mold cap for semiconductor device
JP6354285B2 (ja) * 2014-04-22 2018-07-11 オムロン株式会社 電子部品を埋設した樹脂構造体およびその製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779652A (en) * 1980-11-05 1982-05-18 Nec Corp Resin-sealed semiconductor device
JPS63146453A (ja) * 1986-12-10 1988-06-18 Matsushita Electric Ind Co Ltd 半導体パツケ−ジおよびその製造方法
JPH02150042A (ja) * 1988-11-30 1990-06-08 Nec Corp 混成集積回路
JPH0462865A (ja) * 1990-06-25 1992-02-27 Fujitsu Ltd 半導体装置及びその製造方法
US5293072A (en) * 1990-06-25 1994-03-08 Fujitsu Limited Semiconductor device having spherical terminals attached to the lead frame embedded within the package body
US5216278A (en) * 1990-12-04 1993-06-01 Motorola, Inc. Semiconductor device having a pad array carrier package
JPH0563109A (ja) * 1991-08-29 1993-03-12 New Japan Radio Co Ltd モールド型icパツケージ
DE69205257T2 (de) * 1991-11-12 1996-04-11 Johnson Electric Sa Zusammengebauter Kommutator.
US5557150A (en) * 1992-02-07 1996-09-17 Lsi Logic Corporation Overmolded semiconductor package
JPH05299563A (ja) * 1992-04-20 1993-11-12 Hitachi Ltd 半導体装置およびその製造方法
JPH0697666A (ja) * 1992-09-16 1994-04-08 Hitachi Ltd 電子装置
US5612576A (en) * 1992-10-13 1997-03-18 Motorola Self-opening vent hole in an overmolded semiconductor device

Also Published As

Publication number Publication date
FR2722915B1 (fr) 1997-01-24
JP2778539B2 (ja) 1998-07-23
EP0693777B1 (de) 2000-09-27
JPH0883868A (ja) 1996-03-26
DE69518958D1 (de) 2000-11-02
US5841192A (en) 1998-11-24
FR2722915A1 (fr) 1996-01-26
EP0693777A1 (de) 1996-01-24

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