DE69432401D1 - Vorrichtung zur Integrierung von Bus-Master-Besitzrecht von Lokalbuslast - Google Patents

Vorrichtung zur Integrierung von Bus-Master-Besitzrecht von Lokalbuslast

Info

Publication number
DE69432401D1
DE69432401D1 DE69432401T DE69432401T DE69432401D1 DE 69432401 D1 DE69432401 D1 DE 69432401D1 DE 69432401 T DE69432401 T DE 69432401T DE 69432401 T DE69432401 T DE 69432401T DE 69432401 D1 DE69432401 D1 DE 69432401D1
Authority
DE
Germany
Prior art keywords
integrating
load
bus
master ownership
local bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69432401T
Other languages
English (en)
Other versions
DE69432401T2 (de
Inventor
Chih-Siung Wu
Chen-Jen Kuo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE69432401D1 publication Critical patent/DE69432401D1/de
Application granted granted Critical
Publication of DE69432401T2 publication Critical patent/DE69432401T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/128—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
DE69432401T 1994-01-21 1994-12-28 Vorrichtung zur Integrierung von Bus-Master-Besitzrecht von Lokalbuslast Expired - Fee Related DE69432401T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US184295 1994-01-21
US08/184,295 US5611053A (en) 1994-01-21 1994-01-21 Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers

Publications (2)

Publication Number Publication Date
DE69432401D1 true DE69432401D1 (de) 2003-05-08
DE69432401T2 DE69432401T2 (de) 2004-03-04

Family

ID=22676341

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69432401T Expired - Fee Related DE69432401T2 (de) 1994-01-21 1994-12-28 Vorrichtung zur Integrierung von Bus-Master-Besitzrecht von Lokalbuslast

Country Status (6)

Country Link
US (2) US5611053A (de)
EP (1) EP0664514B1 (de)
JP (1) JPH07262131A (de)
KR (1) KR950033873A (de)
DE (1) DE69432401T2 (de)
TW (1) TW240300B (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5734872A (en) * 1994-09-19 1998-03-31 Kelly; Michael CPU interconnect system for a computer
JP3403284B2 (ja) * 1995-12-14 2003-05-06 インターナショナル・ビジネス・マシーンズ・コーポレーション 情報処理システム及びその制御方法
US5859985A (en) * 1996-01-14 1999-01-12 At&T Wireless Services, Inc. Arbitration controller for providing arbitration on a multipoint high speed serial bus using drivers having output enable pins
US5884050A (en) * 1996-06-21 1999-03-16 Digital Equipment Corporation Mechanism for high bandwidth DMA transfers in a PCI environment
US5805835A (en) * 1996-07-15 1998-09-08 Micron Electronics, Inc. Parallel architecture computer system and method
US5870570A (en) * 1996-10-29 1999-02-09 Vlsi Technology, Inc. Multiple bus agent integrated circuit device for connecting to an external bus
US6225165B1 (en) * 1998-05-13 2001-05-01 Micron Technology, Inc. High density SRAM cell with latched vertical transistors
SE520102C2 (sv) 1998-05-13 2003-05-27 Axis Ab Applikationsspecifik integrerad krets och sändtagarkrets
US7734852B1 (en) * 1998-08-06 2010-06-08 Ahern Frank W Modular computer system
US6070214A (en) * 1998-08-06 2000-05-30 Mobility Electronics, Inc. Serially linked bus bridge for expanding access over a first bus to a second bus
US7269680B1 (en) * 1998-08-06 2007-09-11 Tao Logic Systems Llc System enabling device communication in an expanded computing device
US6088752A (en) * 1998-08-06 2000-07-11 Mobility Electronics, Inc. Method and apparatus for exchanging information between buses in a portable computer and docking station through a bridge employing a serial link
US6622188B1 (en) 1998-09-30 2003-09-16 International Business Machines Corporation 12C bus expansion apparatus and method therefor
US6330646B1 (en) * 1999-01-08 2001-12-11 Intel Corporation Arbitration mechanism for a computer system having a unified memory architecture
CA2284947C (en) 1999-10-04 2005-12-20 Storagequest Inc. Apparatus and method for managing data storage
IL136781A (en) * 2000-02-06 2008-11-03 Coppergate Comm Ltd Digital data communication system for subscribers
EP1188120B1 (de) 2000-02-14 2006-06-07 Tao Logic Systems LLC Rechnerankoppelsystem und verfahren
EP1653373B1 (de) 2000-02-14 2013-11-13 Tao Logic Systems LLC Busbrücke
US6594719B1 (en) 2000-04-19 2003-07-15 Mobility Electronics Inc. Extended cardbus/pc card controller with split-bridge ™technology
US6483203B1 (en) * 2000-06-08 2002-11-19 3Com Corporation Single unit integrated transformer assembly
US6889278B1 (en) * 2001-04-04 2005-05-03 Cisco Technology, Inc. Method and apparatus for fast acknowledgement and efficient servicing of interrupt sources coupled to high latency paths
US6823441B1 (en) 2001-04-20 2004-11-23 Daimlerchrysler Corporation Method of multiplexed address and data bus
US20030004672A1 (en) * 2001-06-29 2003-01-02 National Instruments Corporation Meta-routing tool for a measurement system
US6907503B2 (en) * 2001-09-27 2005-06-14 Daimlerchrysler Corporation Dual port RAM communication protocol
JP2006351108A (ja) * 2005-06-16 2006-12-28 Oki Electric Ind Co Ltd 半導体記憶装置
US7890736B2 (en) * 2005-11-08 2011-02-15 St-Ericsson Sa Control device with flag registers for synchronization of communications between cores
US8295287B2 (en) * 2010-01-27 2012-10-23 National Instruments Corporation Network traffic shaping for reducing bus jitter on a real time controller

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4124889A (en) * 1975-12-24 1978-11-07 Computer Automation, Inc. Distributed input/output controller system
US4313160A (en) * 1976-08-17 1982-01-26 Computer Automation, Inc. Distributed input/output controller system
US5067071A (en) * 1985-02-27 1991-11-19 Encore Computer Corporation Multiprocessor computer system employing a plurality of tightly coupled processors with interrupt vector bus
US4716525A (en) * 1985-04-15 1987-12-29 Concurrent Computer Corporation Peripheral controller for coupling data buses having different protocol and transfer rates
JPS6218748A (ja) * 1985-07-17 1987-01-27 Mitsubishi Electric Corp 半導体集積回路装置
US5426767A (en) * 1987-08-03 1995-06-20 Compaq Computer Corporation Method for distinguishing between a 286-type central processing unit and a 386-type central processing unit
US5193193A (en) * 1988-09-14 1993-03-09 Silicon Graphics, Inc. Bus control system for arbitrating requests with predetermined on/off time limitations
US4902986B1 (en) * 1989-01-30 1998-09-01 Credence Systems Corp Phased locked loop to provide precise frequency and phase tracking of two signals
US5321827A (en) * 1989-08-02 1994-06-14 Advanced Logic Research, Inc. Computer system with modular upgrade capability
US5297272A (en) * 1989-08-02 1994-03-22 Advanced Logic Research, Inc. Apparatus for automatically disabling and isolating a computer's original processor upon installation of a processor upgrade card
US5347637A (en) * 1989-08-08 1994-09-13 Cray Research, Inc. Modular input/output system for supercomputers
US5146461A (en) * 1989-11-13 1992-09-08 Solbourne Computer, Inc. Memory error correction system distributed on a high performance multiprocessor bus and method therefor
EP0472814B1 (de) * 1990-08-31 1996-12-18 International Business Machines Corporation Kanäle in einem Rechnerein-Ausgabesystem
JPH04162658A (ja) * 1990-10-26 1992-06-08 Hitachi Ltd 半導体装置
US5191581A (en) * 1990-12-07 1993-03-02 Digital Equipment Corporation Method and apparatus for providing high performance interconnection between interface circuits coupled to information buses
US5274763A (en) * 1990-12-28 1993-12-28 Apple Computer, Inc. Data path apparatus for IO adapter
JP3017809B2 (ja) * 1991-01-09 2000-03-13 株式会社東芝 アナログ・デジタル混載半導体集積回路装置
US5305319A (en) * 1991-01-31 1994-04-19 Chips And Technologies, Inc. FIFO for coupling asynchronous channels
US5335329A (en) * 1991-07-18 1994-08-02 Texas Microsystems, Inc. Apparatus for providing DMA functionality to devices located in a bus expansion chassis
EP0529142A1 (de) * 1991-08-30 1993-03-03 Acer Incorporated Ausbaubare und abbaubare Rechner
US5379386A (en) * 1991-09-05 1995-01-03 International Business Machines Corp. Micro channel interface controller
JP3466212B2 (ja) * 1991-09-17 2003-11-10 インテル・コーポレーション コンピュータシステム
US5218239A (en) * 1991-10-03 1993-06-08 National Semiconductor Corporation Selectable edge rate cmos output buffer circuit
US5388217A (en) * 1991-12-13 1995-02-07 Cray Research, Inc. Distributing system for multi-processor input and output using channel adapters
JP2953482B2 (ja) * 1992-01-17 1999-09-27 日本電気株式会社 Ｃｍｏｓ集積回路
KR950002162B1 (ko) * 1992-02-12 1995-03-14 삼성전자주식회사 Cpu 로직의 자동 절환 장치
US5426739A (en) * 1992-03-16 1995-06-20 Opti, Inc. Local bus - I/O Bus Computer Architecture
US5388224A (en) * 1992-04-24 1995-02-07 Digital Equipment Corporation Processor identification mechanism for a multiprocessor system
US5345357A (en) * 1992-06-05 1994-09-06 At&T Bell Laboratories ESD protection of output buffers
US5418911A (en) * 1992-06-09 1995-05-23 Intel Corporation Data path switch method and apparatus that provides capacitive load isolation
GB2267984A (en) * 1992-06-16 1993-12-22 Thorn Emi Electronics Ltd Multiplexing bus interface.
US5319571A (en) * 1992-11-24 1994-06-07 Exide Electronics UPS system with improved network communications
US5392407A (en) * 1992-12-24 1995-02-21 Ncr Corporation Multi-port processor with peripheral component interconnect port and rambus port
US5394526A (en) * 1993-02-01 1995-02-28 Lsc, Inc. Data server for transferring selected blocks of remote file to a distributed computer network involving only single data transfer operation
US5396602A (en) * 1993-05-28 1995-03-07 International Business Machines Corp. Arbitration logic for multiple bus computer system
US5513329A (en) * 1993-07-15 1996-04-30 Dell Usa, L.P. Modular host local expansion upgrade
US5404460A (en) * 1994-01-28 1995-04-04 Vlsi Technology, Inc. Method for configuring multiple identical serial I/O devices to unique addresses through a serial bus

Also Published As

Publication number Publication date
KR950033873A (ko) 1995-12-26
US5682483A (en) 1997-10-28
EP0664514B1 (de) 2003-04-02
DE69432401T2 (de) 2004-03-04
EP0664514A1 (de) 1995-07-26
TW240300B (en) 1995-02-11
US5611053A (en) 1997-03-11
JPH07262131A (ja) 1995-10-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee