DE69330630T2 - Nichtleitende randschicht für integrierten stapel von ic chips - Google Patents

Nichtleitende randschicht für integrierten stapel von ic chips

Info

Publication number
DE69330630T2
DE69330630T2 DE69330630T DE69330630T DE69330630T2 DE 69330630 T2 DE69330630 T2 DE 69330630T2 DE 69330630 T DE69330630 T DE 69330630T DE 69330630 T DE69330630 T DE 69330630T DE 69330630 T2 DE69330630 T2 DE 69330630T2
Authority
DE
Germany
Prior art keywords
chips
edge layer
conductive edge
integrated stack
stack
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69330630T
Other languages
English (en)
Other versions
DE69330630D1 (de
Inventor
K Miyake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nytell Software LLC
Original Assignee
Irvine Sensors Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Irvine Sensors Corp filed Critical Irvine Sensors Corp
Application granted granted Critical
Publication of DE69330630D1 publication Critical patent/DE69330630D1/de
Publication of DE69330630T2 publication Critical patent/DE69330630T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06524—Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06527—Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06551—Conductive connections on the side of the device
DE69330630T 1992-05-15 1993-05-05 Nichtleitende randschicht für integrierten stapel von ic chips Expired - Lifetime DE69330630T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US88466092A 1992-05-15 1992-05-15
PCT/US1993/004462 WO1993023873A1 (en) 1992-05-15 1993-05-05 Non-conductive end layer for integrated stack of ic chips

Publications (2)

Publication Number Publication Date
DE69330630D1 DE69330630D1 (de) 2001-09-27
DE69330630T2 true DE69330630T2 (de) 2002-06-13

Family

ID=25385082

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69330630T Expired - Lifetime DE69330630T2 (de) 1992-05-15 1993-05-05 Nichtleitende randschicht für integrierten stapel von ic chips

Country Status (5)

Country Link
US (1) US5424920A (de)
EP (1) EP0596075B1 (de)
JP (1) JP3544974B2 (de)
DE (1) DE69330630T2 (de)
WO (1) WO1993023873A1 (de)

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US6714625B1 (en) * 1992-04-08 2004-03-30 Elm Technology Corporation Lithography device for semiconductor circuit pattern generation
US5567654A (en) * 1994-09-28 1996-10-22 International Business Machines Corporation Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging
US5592364A (en) * 1995-01-24 1997-01-07 Staktek Corporation High density integrated circuit module with complex electrical interconnect rails
US5763943A (en) * 1996-01-29 1998-06-09 International Business Machines Corporation Electronic modules with integral sensor arrays
JPH09283652A (ja) * 1996-04-15 1997-10-31 Nec Corp 電子デバイス組立体
US5892203A (en) * 1996-05-29 1999-04-06 International Business Machines Corporation Apparatus for making laminated integrated circuit devices
US5772835A (en) * 1996-05-29 1998-06-30 Ibm Corporation Vacuum oven chamber for making laminated integrated circuit devices
US5793116A (en) * 1996-05-29 1998-08-11 Mcnc Microelectronic packaging using arched solder columns
US5772815A (en) * 1996-05-29 1998-06-30 International Business Machines Corporation Method for making laminated integrated circuit devices
US5735196A (en) * 1996-05-29 1998-04-07 Ibm Corporation Apparatus for applying a force to laminated integrated circuit devices
US5813113A (en) * 1996-12-09 1998-09-29 International Business Machines Corporation Fixture for making laminated integrated circuit devices
US5903437A (en) * 1997-01-17 1999-05-11 International Business Machines Corporation High density edge mounting of chips
US5818107A (en) * 1997-01-17 1998-10-06 International Business Machines Corporation Chip stacking by edge metallization
US5915167A (en) * 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
US6551857B2 (en) 1997-04-04 2003-04-22 Elm Technology Corporation Three dimensional structure integrated circuits
US6215184B1 (en) * 1998-02-19 2001-04-10 Texas Instruments Incorporated Optimized circuit design layout for high performance ball grid array packages
US5990472A (en) * 1997-09-29 1999-11-23 Mcnc Microelectronic radiation detectors for detecting and emitting radiation signals
EP1025617B1 (de) * 1997-10-27 2006-01-18 Discovery Semiconductors, Inc. Mikrosatelliten mit integrierten schaltkreisen
US6617681B1 (en) 1999-06-28 2003-09-09 Intel Corporation Interposer and method of making same
US6404043B1 (en) * 2000-06-21 2002-06-11 Dense-Pac Microsystems, Inc. Panel stacking of BGA devices to form three-dimensional modules
US6674161B1 (en) * 2000-10-03 2004-01-06 Rambus Inc. Semiconductor stacked die devices
US7440449B2 (en) * 2000-10-06 2008-10-21 Irvine Sensors Corp. High speed switching module comprised of stacked layers incorporating t-connect structures
WO2002039802A2 (en) * 2000-11-10 2002-05-16 Unitive Electronics, Inc. Methods of positioning components using liquid prime movers and related structures
US6748994B2 (en) * 2001-04-11 2004-06-15 Avery Dennison Corporation Label applicator, method and label therefor
US6560109B2 (en) 2001-09-07 2003-05-06 Irvine Sensors Corporation Stack of multilayer modules with heat-focusing metal layer
US6717061B2 (en) 2001-09-07 2004-04-06 Irvine Sensors Corporation Stacking of multilayer modules
US6734370B2 (en) * 2001-09-07 2004-05-11 Irvine Sensors Corporation Multilayer modules with flexible substrates
EP1472730A4 (de) * 2002-01-16 2010-04-14 Mann Alfred E Found Scient Res Platzsparende kapselung elektronischer schaltungen
US7777321B2 (en) * 2002-04-22 2010-08-17 Gann Keith D Stacked microelectronic layer and module with three-axis channel T-connects
US7511369B2 (en) * 2002-04-22 2009-03-31 Irvine Sensors Corp. BGA-scale stacks comprised of layers containing integrated circuit die and a method for making the same
US6806559B2 (en) * 2002-04-22 2004-10-19 Irvine Sensors Corporation Method and apparatus for connecting vertically stacked integrated circuit chips
US7531898B2 (en) * 2002-06-25 2009-05-12 Unitive International Limited Non-Circular via holes for bumping pads and related structures
US7547623B2 (en) * 2002-06-25 2009-06-16 Unitive International Limited Methods of forming lead free solder bumps
AU2003256360A1 (en) * 2002-06-25 2004-01-06 Unitive International Limited Methods of forming electronic structures including conductive shunt layers and related structures
WO2004015764A2 (en) 2002-08-08 2004-02-19 Leedy Glenn J Vertical system integration
WO2004038798A2 (en) 2002-10-22 2004-05-06 Unitive International Limited Stacked electronic structures including offset substrates
TWI225899B (en) * 2003-02-18 2005-01-01 Unitive Semiconductor Taiwan C Etching solution and method for manufacturing conductive bump using the etching solution to selectively remove barrier layer
US20050046034A1 (en) 2003-09-03 2005-03-03 Micron Technology, Inc. Apparatus and method for high density multi-chip structures
US7049216B2 (en) * 2003-10-14 2006-05-23 Unitive International Limited Methods of providing solder structures for out plane connections
WO2005101499A2 (en) 2004-04-13 2005-10-27 Unitive International Limited Methods of forming solder bumps on exposed metal pads and related structures
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US7932615B2 (en) * 2006-02-08 2011-04-26 Amkor Technology, Inc. Electronic devices including solder bumps on compliant dielectric layers
US7674701B2 (en) 2006-02-08 2010-03-09 Amkor Technology, Inc. Methods of forming metal layers using multi-layer lift-off patterns
US7928549B2 (en) * 2006-09-19 2011-04-19 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit devices with multi-dimensional pad structures
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KR101774938B1 (ko) 2011-08-31 2017-09-06 삼성전자 주식회사 지지대를 갖는 반도체 패키지 및 그 형성 방법

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Also Published As

Publication number Publication date
WO1993023873A1 (en) 1993-11-25
EP0596075A1 (de) 1994-05-11
JPH08500211A (ja) 1996-01-09
JP3544974B2 (ja) 2004-07-21
EP0596075B1 (de) 2001-08-22
EP0596075A4 (en) 1994-06-15
US5424920A (en) 1995-06-13
DE69330630D1 (de) 2001-09-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: APROLASE DEVELOPMENT CO., LLC, WILMINGTON, DEL, US