DE69329059D1 - Verfahren und Gerät für sequentielle Rückordnung - Google Patents

Verfahren und Gerät für sequentielle Rückordnung

Info

Publication number
DE69329059D1
DE69329059D1 DE69329059T DE69329059T DE69329059D1 DE 69329059 D1 DE69329059 D1 DE 69329059D1 DE 69329059 T DE69329059 T DE 69329059T DE 69329059 T DE69329059 T DE 69329059T DE 69329059 D1 DE69329059 D1 DE 69329059D1
Authority
DE
Germany
Prior art keywords
reordering method
sequential
sequential reordering
reordering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69329059T
Other languages
English (en)
Other versions
DE69329059T2 (de
Inventor
Robert Nicolas Louis Peschi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Original Assignee
Alcatel SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel SA filed Critical Alcatel SA
Application granted granted Critical
Publication of DE69329059D1 publication Critical patent/DE69329059D1/de
Publication of DE69329059T2 publication Critical patent/DE69329059T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/16—Arrangements for providing special services to substations
    • H04L12/18—Arrangements for providing special services to substations for broadcast or conference, e.g. multicast
    • H04L12/1881—Arrangements for providing special services to substations for broadcast or conference, e.g. multicast with schedule organisation, e.g. priority, sequence management
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H04L49/201—Multicast operation; Broadcast operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5645—Connectionless
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/565—Sequence integrity
DE69329059T 1993-06-29 1993-06-29 Verfahren und Gerät für sequentielle Rückordnung Expired - Fee Related DE69329059T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP93201896A EP0633678B1 (de) 1993-06-29 1993-06-29 Verfahren und Gerät für sequentielle Rückordnung

Publications (2)

Publication Number Publication Date
DE69329059D1 true DE69329059D1 (de) 2000-08-24
DE69329059T2 DE69329059T2 (de) 2001-03-22

Family

ID=8213938

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69329059T Expired - Fee Related DE69329059T2 (de) 1993-06-29 1993-06-29 Verfahren und Gerät für sequentielle Rückordnung

Country Status (6)

Country Link
US (1) US5548593A (de)
EP (1) EP0633678B1 (de)
AU (1) AU677840B2 (de)
CA (1) CA2126916A1 (de)
DE (1) DE69329059T2 (de)
ES (1) ES2148197T3 (de)

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US6147996A (en) 1995-08-04 2000-11-14 Cisco Technology, Inc. Pipelined multiple issue packet switch
JPH0974419A (ja) * 1995-09-06 1997-03-18 Fujitsu Ltd 複数データユニットを用いてメッセージを伝送する通信システムにおける同時発生メッセージ制御方式
FI955814A (fi) * 1995-12-01 1997-06-02 Nokia Mobile Phones Ltd Solujen osoitus ATM-järjestelmän soluvirrassa
JPH09270804A (ja) * 1996-04-03 1997-10-14 Toshiba Corp Ａｔｍ交換機
US5963551A (en) * 1996-09-30 1999-10-05 Innomedia Pte Ltd. System and method for dynamically reconfigurable packet transmission
US7751370B2 (en) 2001-07-13 2010-07-06 Qualcomm Incorporated Method and apparatus for forward link rate scheduling
US5928331A (en) * 1997-10-30 1999-07-27 Matsushita Electric Industrial Co., Ltd. Distributed internet protocol-based real-time multimedia streaming architecture
DE19900245B4 (de) * 1998-01-07 2005-09-15 National Semiconductor Corp.(N.D.Ges.D.Staates Delaware), Santa Clara Vorrichtung und Verfahren zum Senden von Daten von einem USB-Endpunkt an einen USB-Host
US6122743A (en) * 1998-03-31 2000-09-19 Siemens Information And Communication Networks, Inc. System for providing enhanced security for transactions transmitted through a distributed network
FR2788183B1 (fr) * 1998-12-31 2001-03-30 Cit Alcatel Procede de resequencement de blocs de donnees, dans un systeme de commutation asynchrone, blocs de donnees, element de commutation et module terminal correspondants
US6983350B1 (en) 1999-08-31 2006-01-03 Intel Corporation SDRAM controller for parallel processor architecture
US7546444B1 (en) 1999-09-01 2009-06-09 Intel Corporation Register set used in multithreaded parallel processor architecture
US6532509B1 (en) * 1999-12-22 2003-03-11 Intel Corporation Arbitrating command requests in a parallel multi-threaded processing system
US6694380B1 (en) 1999-12-27 2004-02-17 Intel Corporation Mapping requests from a processing unit that uses memory-mapped input-output space
US6661794B1 (en) 1999-12-29 2003-12-09 Intel Corporation Method and apparatus for gigabit packet assignment for multithreaded packet processing
US6381242B1 (en) * 2000-08-29 2002-04-30 Netrake Corporation Content processor
US7681018B2 (en) 2000-08-31 2010-03-16 Intel Corporation Method and apparatus for providing large register address space while maximizing cycletime performance for a multi-threaded register file set
US6934760B1 (en) * 2001-02-04 2005-08-23 Cisco Technology, Inc. Method and apparatus for resequencing of packets into an original ordering using multiple resequencing components
US6832261B1 (en) 2001-02-04 2004-12-14 Cisco Technology, Inc. Method and apparatus for distributed resequencing and reassembly of subdivided packets
US7092393B1 (en) 2001-02-04 2006-08-15 Cisco Technology, Inc. Method and apparatus for distributed reassembly of subdivided packets using multiple reassembly components
US7889742B2 (en) * 2001-09-29 2011-02-15 Qualcomm, Incorporated Method and system for improving data throughput
US8089940B2 (en) 2001-10-05 2012-01-03 Qualcomm Incorporated Method and system for efficient and reliable data packet transmission
US7895239B2 (en) 2002-01-04 2011-02-22 Intel Corporation Queue arrays in network devices
FR2837055B1 (fr) * 2002-03-06 2004-06-11 Viaccess Sa Protocole de controle d'acces, par plages de durees specifiques, a des informations embrouillees
US7051245B2 (en) * 2002-11-30 2006-05-23 International Business Machines Corporation System and method for handling out-of-order data supplied by a real-time feed
US7480308B1 (en) 2004-03-29 2009-01-20 Cisco Technology, Inc. Distributing packets and packets fragments possibly received out of sequence into an expandable set of queues of particular use in packet resequencing and reassembly
US9014192B2 (en) 2005-03-21 2015-04-21 Qualcomm Incorporated Method and apparatus for improving data transmission reliability in a wireless communications system
US7965708B2 (en) * 2005-06-07 2011-06-21 Cisco Technology, Inc. Method and apparatus for using meta-packets in a packet processing system
JP4658142B2 (ja) * 2005-11-30 2011-03-23 富士通株式会社 通信装置およびフレーム制御方法
US20090168723A1 (en) 2007-11-27 2009-07-02 Qualcomm Incorporated Method and apparatus for handling out-of-order packets during handover in a wireless communication system
US9729350B1 (en) * 2010-05-07 2017-08-08 Amazon Technologies, Inc. Maintaining packet order in network flows over an autonomous network

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55140347A (en) * 1979-04-20 1980-11-01 Oki Electric Ind Co Ltd Information sequence security system
US4858941A (en) * 1987-07-23 1989-08-22 Becker John H Tire spray control device
EP0438415B1 (de) * 1989-08-09 1995-01-18 BELL TELEPHONE MANUFACTURING COMPANY Naamloze Vennootschap Sequentielle rückordnung für einen vermittlungsknoten
DE3942977A1 (de) * 1989-12-23 1991-06-27 Standard Elektrik Lorenz Ag Verfahren zum wiederherstellen der richtigen zellfolge, insbesondere in einer atm-vermittlungsstelle, sowie ausgangseinheit hierfuer
DE4008078A1 (de) * 1990-03-14 1991-09-19 Standard Elektrik Lorenz Ag Kopierfaehige atm-vermittlungsstelle
DE4008080A1 (de) * 1990-03-14 1991-09-19 Standard Elektrik Lorenz Ag Atm-vermittlungsstelle

Also Published As

Publication number Publication date
DE69329059T2 (de) 2001-03-22
AU6479494A (en) 1995-01-12
CA2126916A1 (en) 1994-12-30
US5548593A (en) 1996-08-20
EP0633678B1 (de) 2000-07-19
AU677840B2 (en) 1997-05-08
EP0633678A1 (de) 1995-01-11
ES2148197T3 (es) 2000-10-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: ALCATEL LUCENT, PARIS, FR

8339 Ceased/non-payment of the annual fee